diff options
| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-02-27 23:14:43 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-02-27 23:14:43 +0000 |
| commit | a103801be3696e5e296766dd70d3d4774283c256 (patch) | |
| tree | 8b2ab04f54b1d0a6eb83abb6de034c94db79ae4d | |
| parent | e4968d3556b862b4bdf950f6d70516fce710dfe1 (diff) | |
| download | nuttx-a103801be3696e5e296766dd70d3d4774283c256.tar.gz nuttx-a103801be3696e5e296766dd70d3d4774283c256.tar.bz2 nuttx-a103801be3696e5e296766dd70d3d4774283c256.zip | |
Add logic to support the FSMC SRAM in the NuttX heap
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4433 42af7a65-404d-4744-a932-0658087f49c3
21 files changed, 896 insertions, 429 deletions
diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog index d3a9b3e62..08e2bb545 100644 --- a/nuttx/ChangeLog +++ b/nuttx/ChangeLog @@ -2514,3 +2514,5 @@ * Makefile: Use the more common .hex extension for Intel hex files instead of more precise .ihx extension. This change has ripple effects to many build- related scripts and programs and could cause some short-term problems. + * configs/stm3240g-eval/, arch/arm/src/stm32/up_allocateheap.c: Add support + for the 16-mbit SRAM on-board the STM3240G-EVAL board. diff --git a/nuttx/arch/arm/src/stm32/stm32_allocateheap.c b/nuttx/arch/arm/src/stm32/stm32_allocateheap.c index b097a9644..be7862e11 100644 --- a/nuttx/arch/arm/src/stm32/stm32_allocateheap.c +++ b/nuttx/arch/arm/src/stm32/stm32_allocateheap.c @@ -54,35 +54,208 @@ /**************************************************************************** * Private Definitions ****************************************************************************/ +/* Internal SRAM is available in all members of the STM32 family. The + * following definitions must be provided to specify the size and + * location of internal(system) SRAM: + * + * CONFIG_DRAM_END : End address (+1) of SRAM (F1 family only, the + * : F4 family uses the a priori end of SRAM) + * + * The F4 family also contains internal TCM SRAM. This SRAM is different + * because it cannot be used for DMA. So if DMA needed, then the following + * should be defined to exclude TCM SRAM from the heap: + * + * CONFIG_STM32_TCMEXCLUDE : Exclude TCM SRAM from the HEAP + * + * In addition to internal SRAM, SRAM may also be available through the FSMC. + * In order to use FSMC SRAM, the following additional things need to be + * present in the NuttX configuration file: + * + * CONFIG_STM32_FSMC=y : Enables the FSMC + * CONFIG_STM32_FSMC_SRAM=y : Indicates that SRAM is available via the + * FSMC (as opposed to an LCD or FLASH). + * CONFIG_HEAP2_BASE : The base address of the SRAM in the FSMC + * address space + * CONFIG_HEAP2_END : The end (+1) of the SRAM in the FSMC + * address space + * CONFIG_MM_REGIONS : Must be set to a large enough value to + * include the FSMC SRAM (as determined by the rules provided below) + */ + +#ifndef CONFIG_STM32_FSMC +# undef CONFIG_STM32_FSMC_SRAM +#endif -/* For the STM312F10xxx family, all SRAM is in a contiguous block starting - * at g_heapbase and extending through CONFIG_DRAM_END (my apologies for - * the bad naming). +/* For the STM312F10xxx family, all internal SRAM is in one contiguous block + * starting at g_heapbase and extending through CONFIG_DRAM_END (my apologies for + * the bad naming). In addition, external FSMC SRAM may be available. */ #if defined(CONFIG_STM32_STM32F10XX) + /* Set the end of system SRAM */ + # define SRAM1_END CONFIG_DRAM_END + /* Check if external FSMC SRAM is provided */ + +# if CONFIG_STM32_FSMC_SRAM +# if CONFIG_MM_REGIONS < 2 +# warning "FSMC SRAM not included in the heap" +# undef CONFIG_STM32_FSMC_SRAM +# elif CONFIG_MM_REGIONS > 2 +# error "CONFIG_MM_REGIONS > 2 but I don't know what any of the region(s) are" +# undef CONFIG_MM_REGIONS +# define CONFIG_MM_REGIONS 2 +# endif +# elif CONFIG_MM_REGIONS > 1 +# error "CONFIG_MM_REGIONS > 1 but I don't know what any of the region(s) are" +# endif + + /* The STM32 F1 has not TCM SRAM */ + +# undef CONFIG_STM32_TCMEXCLUDE +# define CONFIG_STM32_TCMEXCLUDE 1 + /* All members of the STM32F40xxx family have 192Kb in three banks: * - * 1) 112Kb of SRAM beginning at address 0x2000:0000 - * 2) 16Kb of SRAM beginning at address 0x2001:c000 + * 1) 112Kb of System SRAM beginning at address 0x2000:0000 + * 2) 16Kb of System SRAM beginning at address 0x2001:c000 * 3) 64Kb of TCM SRAM beginning at address 0x1000:0000 * * As determined by ld.script, g_heapbase lies in the 112Kb memory * region and that extends to 0x2001:0000. But the first and second memory * regions are contiguous and treated as one in this logic that extends to * 0x2002:0000. + * + * As a complication, it appears that TCM SRAM cannot be used for DMA. So, if + * STM32 DMA is enabled, TCM SRAM should probably be excluded from the heap. + * + * In addition, external FSMC SRAM may be available. */ #elif defined(CONFIG_STM32_STM32F40XX) + /* Set the end of system SRAM */ + # define SRAM1_END 0x20020000 + + /* Set the range of TCM SRAM as well (although we may not use it) */ + # define SRAM2_START 0x10000000 # define SRAM2_END 0x10010000 + + /* There are 4 possible SRAM configurations: + * + * Configuration 1. System SRAM (only) + * CONFIG_MM_REGIONS == 1 + * CONFIG_STM32_FSMC_SRAM NOT defined + * CONFIG_STM32_TCMEXCLUDE defined + * Configuration 2. System SRAM and TCM SRAM + * CONFIG_MM_REGIONS == 2 + * CONFIG_STM32_FSMC_SRAM NOT defined + * CONFIG_STM32_TCMEXCLUDE NOT defined + * Configuration 3. System SRAM and FSMC SRAM + * CONFIG_MM_REGIONS == 2 + * CONFIG_STM32_FSMC_SRAM defined + * CONFIG_STM32_TCMEXCLUDE defined + * Configuration 4. System SRAM, TCM SRAM, and FSMC SRAM + * CONFIG_MM_REGIONS == 3 + * CONFIG_STM32_FSMC_SRAM defined + * CONFIG_STM32_TCMEXCLUDE NOT defined + * + * Let's make sure that all definitions are consitent before doing + * anything else + */ + +# if defined(CONFIG_STM32_FSMC_SRAM) + + /* Configuration 3 or 4. External SRAM is available. CONFIG_MM_REGIONS + * should be at least 2. + */ + +# if CONFIG_MM_REGIONS < 2 + /* Only one memory region. Force Configuration 1 */ + +# warning "FSMC SRAM (and TCM SRAM) excluded from the heap" +# undef CONFIG_STM32_FSMC_SRAM +# undef CONFIG_STM32_TCMEXCLUDE +# define CONFIG_STM32_TCMEXCLUDE 1 + + /* CONFIG_MM_REGIONS may be 3 if TCM SRAM is included in the head */ + +# elif CONFIG_MM_REGIONS > 2 + + /* More than two memory regions. This is okay if TCM SRAM is not + * disabled. + */ + +# if defined(CONFIG_STM32_TCMEXCLUDE) + + /* Configuration 3: CONFIG_MM_REGIONS should have been 2 */ + +# error "CONFIG_MM_REGIONS > 2 but I don't know what any of the region(s) are" +# undef CONFIG_MM_REGIONS +# define CONFIG_MM_REGIONS 2 +# else + + /* Configuration 4: DMA should be disabled and CONFIG_MM_REGIONS + * should be 3. + */ + +# ifdef (CONFIG_STM32_DMA) +# warning "TCM SRAM is included in the heap AND DMA is enabled" +# endif +# if CONFIG_MM_REGIONS != 3 +# error "CONFIG_MM_REGIONS > 3 but I don't know what any of the region(s) are" +# undef CONFIG_MM_REGIONS +# define CONFIG_MM_REGIONS 3 +# endif +# endif + + /* CONFIG_MM_REGIONS is exactly 2. We cannot support both TCM SRAM and + * FSMC SRAM. + */ + +# elif !defined(CONFIG_STM32_TCMEXCLUDE) +# error "CONFIG_MM_REGIONS == 2, cannot support both TCM SRAM and FSMC SRAM" +# undef CONFIG_STM32_TCMEXCLUDE +# define CONFIG_STM32_TCMEXCLUDE 1 +# endif + +# elif !defined(CONFIG_STM32_TCMEXCLUDE) + + /* Configuration 2: FSMC SRAM is not used, but TCM SRAM is requested. DMA + * should be disabled and CONFIG_MM_REGIONS should be 2. + */ + +# ifdef (CONFIG_STM32_DMA) +# warning "TCM SRAM is included in the heap AND DMA is enabled" +# endif +# if CONFIG_MM_REGIONS < 2 +# error "TCM SRAM excluded from the heap because CONFIG_MM_REGIONS < 2" +# undef CONFIG_STM32_TCMEXCLUDE +# define CONFIG_STM32_TCMEXCLUDE 1 +# elif CONFIG_MM_REGIONS > 2 +# error "CONFIG_MM_REGIONS > 2 but I don't know what any of the region(s) are" +# undef CONFIG_MM_REGIONS +# define CONFIG_MM_REGIONS 2 +# endif +# endif #else # error "Unsupported STM32 chip" #endif +/* If FSMC SRAM is going to be used as heap, then verify that the starting + * address and size of the external SRAM region has been provided in the + * configuration. + */ + +#ifdef CONFIG_STM32_FSMC_SRAM +# if !defined(CONFIG_HEAP2_BASE) || !defined(CONFIG_HEAP2_END) +# error "CONFIG_HEAP2_BASE and CONFIG_HEAP2_END must be provided" +# undef CONFIG_STM32_FSMC_SRAM +# endif +#endif + /**************************************************************************** * Private Data ****************************************************************************/ @@ -123,41 +296,18 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size) ****************************************************************************/ #if CONFIG_MM_REGIONS > 1 -# if defined(CONFIG_STM32_STM32F40XX) -# if defined(CONFIG_HEAP2_BASE) && defined(CONFIG_HEAP2_END) -# if CONFIG_MM_REGIONS > 3 -# error "CONFIG_MM_REGIONS > 3 but I don't know what all of the regions are" -# endif -# elif CONFIG_MM_REGIONS > 2 -# error "CONFIG_MM_REGIONS > 2 but I don't know what all of the regions are" -# endif - void up_addregion(void) { /* Add the STM32F40xxx TCM SRAM heap region. */ +#ifndef CONFIG_STM32_TCMEXCLUDE mm_addregion((FAR void*)SRAM2_START, SRAM2_END-SRAM2_START); +#endif /* Add the user specified heap region. */ -# if CONFIG_MM_REGIONS > 2 && defined(CONFIG_HEAP2_BASE) && defined(CONFIG_HEAP2_END) +#ifdef CONFIG_STM32_FSMC_SRAM mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE); # endif } - -# elif defined(CONFIG_HEAP2_BASE) && defined(CONFIG_HEAP2_END) -# if CONFIG_MM_REGIONS > 2 -# error "CONFIG_MM_REGIONS > 2 but I don't know what all of the regions are" -# endif - -void up_addregion(void) -{ - /* Add the user specified heap region. */ - - mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE); -} - -# else -# error "CONFIG_MM_REGIONS > 1 but I don't know what any of the region(s) are" -# endif #endif diff --git a/nuttx/arch/arm/src/stm32/stm32_i2c.c b/nuttx/arch/arm/src/stm32/stm32_i2c.c index 4439cfec0..1a1facdd2 100644 --- a/nuttx/arch/arm/src/stm32/stm32_i2c.c +++ b/nuttx/arch/arm/src/stm32/stm32_i2c.c @@ -122,6 +122,16 @@ #define CONFIG_STM32_I2CTIMEOTICKS \ (SEC2TICK(CONFIG_STM32_I2CTIMEOSEC) + MSEC2TICK(CONFIG_STM32_I2CTIMEOMS)) +/* On the STM32F103ZE, there is an internal conflict between I2C1 and FSMC. In that + * case, it is necessary to disable FSMC before each I2C1 access and re-enable FSMC + * when the I2C access completes. + */ + +#undef I2C1_FSMC_CONFLICT +#if defined(CONFIG_STM32_STM32F10XX) && defined(CONFIG_STM32_FSMC) && defined(CONFIG_STM32_I2C1) +# define I2C1_FSMC_CONFLICT +#endif + /* Debug ****************************************************************************/ /* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */ @@ -263,7 +273,7 @@ static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv); static inline void stm32_i2c_clrstart(FAR struct stm32_i2c_priv_s *priv); static inline void stm32_i2c_sendstop(FAR struct stm32_i2c_priv_s *priv); static inline uint32_t stm32_i2c_getstatus(FAR struct stm32_i2c_priv_s *priv); -#if defined(CONFIG_STM32_FSMC) && defined (CONFIG_STM32_I2C1) +#ifdef I2C1_FSMC_CONFLICT static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv); static inline void stm32_i2c_enablefsmc(uint32_t ahbenr); #endif @@ -907,9 +917,12 @@ static inline uint32_t stm32_i2c_getstatus(FAR struct stm32_i2c_priv_s *priv) * FSMC must be disable while accessing I2C1 because it uses a common resource * (LBAR) * + * NOTE: This is an issue with the STM32F103ZE, but may not be an issue with other + * STM32s. You may need to experiment + * ************************************************************************************/ -#if defined(CONFIG_STM32_FSMC) && defined (CONFIG_STM32_I2C1) +#ifdef I2C1_FSMC_CONFLICT static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv) { uint32_t ret = 0; @@ -954,7 +967,7 @@ static inline void stm32_i2c_enablefsmc(uint32_t ahbenr) #else # define stm32_i2c_disablefsmc(priv) (0) # define stm32_i2c_enablefsmc(ahbenr) -#endif +#endif /* I2C1_FSMC_CONFLICT */ /************************************************************************************ * Name: stm32_i2c_isr @@ -1478,7 +1491,7 @@ static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *ms * will not complete normally if the FSMC is enabled. */ -#if !defined(CONFIG_STM32_FSMC) || !defined (CONFIG_STM32_I2C1) +#ifndef I2C1_FSMC_CONFLICT stm32_i2c_sem_waitstop(priv); #endif @@ -1619,7 +1632,7 @@ static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *ms * will not complete normally if the FSMC is enabled. */ -#if defined(CONFIG_STM32_FSMC) && defined (CONFIG_STM32_I2C1) +#ifdef I2C1_FSMC_CONFLICT stm32_i2c_sem_waitstop(priv); #endif diff --git a/nuttx/configs/stm3240g-eval/README.txt b/nuttx/configs/stm3240g-eval/README.txt index b41e49212..d2d1748ee 100755 --- a/nuttx/configs/stm3240g-eval/README.txt +++ b/nuttx/configs/stm3240g-eval/README.txt @@ -17,6 +17,7 @@ Contents - PWM - CAN - FPU + - FSMC SRAM - STM3240G-EVAL-specific Configuration Options - Configurations @@ -108,18 +109,7 @@ GNU Toolchain Options and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path appears in your PATH variable before /usr/bin, then you will get the wrong gcc when you try to build host executables. This will cause to strange, uninterpretable - errors build some host binaries in tools/ when you first make. Here is my - workaround kludge. - - 1. Edit the setenv.sh to put the Atollic toolchain at the beginning of the PATH - 2. Source the setenv.sh file: . ./setenv.sh. A side effect of this is that it - will set an environment variable called PATH_ORIG. - 3. Then go back to the original patch: export PATH=$PATH_ORIG - 4. Then make. The make will build all of the host executable but will fail - when it gets to the first ARM binary. - 5. Then source setenv.sh again: . ./setenv.sh. That will correct the PATH - again. When you do make again, the host executables are already made and - now the correct PATH is in place for the ARM build. + errors build some host binaries in tools/ when you first make. Also, the Atollic toolchains are the only toolchains that have built-in support for the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will @@ -440,156 +430,236 @@ See the section above on Toolchains, NOTE 2, for explanations for some of the configuration settings. Some of the usual settings are just not supported by the "Lite" version of the Atollic toolchain. +FSMC SRAM +========= + +On-board SRAM +------------- + +A 16 Mbit SRAM is connected to the STM32F407IGH6 FSMC bus which shares the same +I/Os with the CAN1 bus. Jumper settings: + + JP1: Connect PE4 to SRAM as A20 + JP2: onnect PE3 to SRAM as A19 + +JP3 and JP10 must not be fitted for SRAM and LCD application. JP3 and JP10 +select CAN1 or CAN2 if fitted; neither if not fitted. + +The on-board SRAM can be configured by setting + + CONFIG_STM32_FSMC=y + CONFIG_STM32_FSMC_SRAM=y + CONFIG_HEAP2_BASE=0x64000000 + CONFIG_HEAP2_END=(0x64000000+(2*1024*1024)) + CONFIG_MM_REGIONS=2 (or =3, see below) + +Configuration Options +--------------------- +Internal SRAM is available in all members of the STM32 family. The F4 family +also contains internal TCM SRAM. This SRAM is different because it cannot +be used for DMA. So if DMA needed, then the following should be defined +to exclude TCM SRAM from the heap: + + CONFIG_STM32_TCMEXCLUDE : Exclude TCM SRAM from the HEAP + +In addition to internal SRAM, SRAM may also be available through the FSMC. +In order to use FSMC SRAM, the following additional things need to be +present in the NuttX configuration file: + + CONFIG_STM32_FSMC=y : Enables the FSMC + CONFIG_STM32_FSMC_SRAM=y : Indicates that SRAM is available via the + FSMC (as opposed to an LCD or FLASH). + CONFIG_HEAP2_BASE : The base address of the SRAM in the FSMC + address space + CONFIG_HEAP2_END : The end (+1) of the SRAM in the FSMC + address space + CONFIG_MM_REGIONS : Must be set to a large enough value to + include the FSMC SRAM + +SRAM Configurations +------------------- +There are 4 possible SRAM configurations: + + Configuration 1. System SRAM (only) + CONFIG_MM_REGIONS == 1 + CONFIG_STM32_FSMC_SRAM NOT defined + CONFIG_STM32_TCMEXCLUDE defined + Configuration 2. System SRAM and TCM SRAM + CONFIG_MM_REGIONS == 2 + CONFIG_STM32_FSMC_SRAM NOT defined + CONFIG_STM32_TCMEXCLUDE NOT defined + Configuration 3. System SRAM and FSMC SRAM + CONFIG_MM_REGIONS == 2 + CONFIG_STM32_FSMC_SRAM defined + CONFIG_STM32_TCMEXCLUDE defined + Configuration 4. System SRAM, TCM SRAM, and FSMC SRAM + CONFIG_MM_REGIONS == 3 + CONFIG_STM32_FSMC_SRAM defined + CONFIG_STM32_TCMEXCLUDE NOT defined + STM3240G-EVAL-specific Configuration Options ============================================ - CONFIG_ARCH - Identifies the arch/ subdirectory. This should - be set to: + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: - CONFIG_ARCH=arm + CONFIG_ARCH=arm - CONFIG_ARCH_family - For use in C code: + CONFIG_ARCH_family - For use in C code: - CONFIG_ARCH_ARM=y + CONFIG_ARCH_ARM=y - CONFIG_ARCH_architecture - For use in C code: + CONFIG_ARCH_architecture - For use in C code: - CONFIG_ARCH_CORTEXM4=y + CONFIG_ARCH_CORTEXM4=y - CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory - CONFIG_ARCH_CHIP=stm32 + CONFIG_ARCH_CHIP=stm32 - CONFIG_ARCH_CHIP_name - For use in C code to identify the exact - chip: + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: - CONFIG_ARCH_CHIP_STM32F407IG=y + CONFIG_ARCH_CHIP_STM32F407IG=y CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock configuration features. CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n - CONFIG_ARCH_BOARD - Identifies the configs subdirectory and - hence, the board that supports the particular chip or SoC. + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=stm3240g_eval (for the STM3240G-EVAL development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_STM3240G_EVAL=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) - CONFIG_ARCH_BOARD=stm3240g_eval (for the STM3240G-EVAL development board) + CONFIG_DRAM_SIZE - Describes the installed DRAM (SRAM in this case): - CONFIG_ARCH_BOARD_name - For use in C code + CONFIG_DRAM_SIZE=0x00010000 (64Kb) - CONFIG_ARCH_BOARD_STM3240G_EVAL=y + CONFIG_DRAM_START - The start address of installed DRAM - CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation - of delay loops + CONFIG_DRAM_START=0x20000000 - CONFIG_ENDIAN_BIG - define if big endian (default is little - endian) + CONFIG_DRAM_END - Last address+1 of installed RAM - CONFIG_DRAM_SIZE - Describes the installed DRAM (SRAM in this case): + CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE) - CONFIG_DRAM_SIZE=0x00010000 (64Kb) + CONFIG_STM32_TCMEXCLUDE - Exclude TCM SRAM from the HEAP - CONFIG_DRAM_START - The start address of installed DRAM + In addition to internal SRAM, SRAM may also be available through the FSMC. + In order to use FSMC SRAM, the following additional things need to be + present in the NuttX configuration file: - CONFIG_DRAM_START=0x20000000 + CONFIG_STM32_FSMC_SRAM - Indicates that SRAM is available via the + FSMC (as opposed to an LCD or FLASH). - CONFIG_DRAM_END - Last address+1 of installed RAM + CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space - CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE) + CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space - CONFIG_ARCH_IRQPRIO - The STM3240xxx supports interrupt prioritization + CONFIG_ARCH_IRQPRIO - The STM3240xxx supports interrupt prioritization - CONFIG_ARCH_IRQPRIO=y + CONFIG_ARCH_IRQPRIO=y - CONFIG_ARCH_FPU - The STM3240xxx supports a floating point unit (FPU) + CONFIG_ARCH_FPU - The STM3240xxx supports a floating point unit (FPU) - CONFIG_ARCH_FPU=y + CONFIG_ARCH_FPU=y - CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that - have LEDs + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs - CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt - stack. If defined, this symbol is the size of the interrupt - stack in bytes. If not defined, the user task stacks will be - used during interrupt handling. + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. - CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions - CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. - CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that - cause a 100 second delay during boot-up. This 100 second delay - serves no purpose other than it allows you to calibratre - CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure - the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until - the delay actually is 100 seconds. + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. Individual subsystems can be enabled: - AHB1 - ---- - CONFIG_STM32_CRC - CONFIG_STM32_BKPSRAM - CONFIG_STM32_CCMDATARAM - CONFIG_STM32_DMA1 - CONFIG_STM32_DMA2 - CONFIG_STM32_ETHMAC - CONFIG_STM32_OTGHS - - AHB2 - ---- - CONFIG_STM32_DCMI - CONFIG_STM32_CRYP - CONFIG_STM32_HASH - CONFIG_STM32_RNG - CONFIG_STM32_OTGFS - - AHB3 - ---- - CONFIG_STM32_FSMC - - APB1 - ---- - CONFIG_STM32_TIM2 - CONFIG_STM32_TIM3 - CONFIG_STM32_TIM4 - CONFIG_STM32_TIM5 - CONFIG_STM32_TIM6 - CONFIG_STM32_TIM7 - CONFIG_STM32_TIM12 - CONFIG_STM32_TIM13 - CONFIG_STM32_TIM14 - CONFIG_STM32_WWDG - CONFIG_STM32_SPI2 - CONFIG_STM32_SPI3 - CONFIG_STM32_USART2 - CONFIG_STM32_USART3 - CONFIG_STM32_UART4 - CONFIG_STM32_UART5 - CONFIG_STM32_I2C1 - CONFIG_STM32_I2C2 - CONFIG_STM32_I2C3 - CONFIG_STM32_CAN1 - CONFIG_STM32_CAN2 - CONFIG_STM32_DAC1 - CONFIG_STM32_DAC2 - CONFIG_STM32_PWR -- Required for RTC - - APB2 - ---- - CONFIG_STM32_TIM1 - CONFIG_STM32_TIM8 - CONFIG_STM32_USART1 - CONFIG_STM32_USART6 - CONFIG_STM32_ADC1 - CONFIG_STM32_ADC2 - CONFIG_STM32_ADC3 - CONFIG_STM32_SDIO - CONFIG_STM32_SPI1 - CONFIG_STM32_SYSCFG - CONFIG_STM32_TIM9 - CONFIG_STM32_TIM10 - CONFIG_STM32_TIM11 + AHB1 + ---- + CONFIG_STM32_CRC + CONFIG_STM32_BKPSRAM + CONFIG_STM32_CCMDATARAM + CONFIG_STM32_DMA1 + CONFIG_STM32_DMA2 + CONFIG_STM32_ETHMAC + CONFIG_STM32_OTGHS + + AHB2 + ---- + CONFIG_STM32_DCMI + CONFIG_STM32_CRYP + CONFIG_STM32_HASH + CONFIG_STM32_RNG + CONFIG_STM32_OTGFS + + AHB3 + ---- + CONFIG_STM32_FSMC + + APB1 + ---- + CONFIG_STM32_TIM2 + CONFIG_STM32_TIM3 + CONFIG_STM32_TIM4 + CONFIG_STM32_TIM5 + CONFIG_STM32_TIM6 + CONFIG_STM32_TIM7 + CONFIG_STM32_TIM12 + CONFIG_STM32_TIM13 + CONFIG_STM32_TIM14 + CONFIG_STM32_WWDG + CONFIG_STM32_SPI2 + CONFIG_STM32_SPI3 + CONFIG_STM32_USART2 + CONFIG_STM32_USART3 + CONFIG_STM32_UART4 + CONFIG_STM32_UART5 + CONFIG_STM32_I2C1 + CONFIG_STM32_I2C2 + CONFIG_STM32_I2C3 + CONFIG_STM32_CAN1 + CONFIG_STM32_CAN2 + CONFIG_STM32_DAC1 + CONFIG_STM32_DAC2 + CONFIG_STM32_PWR -- Required for RTC + + APB2 + ---- + CONFIG_STM32_TIM1 + CONFIG_STM32_TIM8 + CONFIG_STM32_USART1 + CONFIG_STM32_USART6 + CONFIG_STM32_ADC1 + CONFIG_STM32_ADC2 + CONFIG_STM32_ADC3 + CONFIG_STM32_SDIO + CONFIG_STM32_SPI1 + CONFIG_STM32_SYSCFG + CONFIG_STM32_TIM9 + CONFIG_STM32_TIM10 + CONFIG_STM32_TIM11 Timer and I2C devices may need to the following to force power to be applied unconditionally at power up. (Otherwise, the device is powered when it is @@ -605,16 +675,16 @@ STM3240G-EVAL-specific Configuration Options to assign the timer (n) for used by the ADC or DAC, but then you also have to configure which ADC or DAC (m) it is assigned to. - CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 - CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 - CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 - CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14 - CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2 + CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 + CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 + CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 + CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14 + CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2 For each timer that is enabled for PWM usage, we need the following additional configuration settings: - CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} + CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} NOTE: The STM32 timers are each capable of generating different signals on each of the four channels with different duty cycles. That capability is @@ -622,78 +692,78 @@ STM3240G-EVAL-specific Configuration Options JTAG Enable settings (by default JTAG-DP and SW-DP are disabled): - CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) - CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) - but without JNTRST. - CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled + CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + but without JNTRST. + CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled STM3240xxx specific device driver settings - CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART m (m=4,5) for the console and ttys0 (default is the USART1). - CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. - This specific the size of the receive buffer - CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before - being sent. This specific the size of the transmit buffer - CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be - CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. - CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity - CONFIG_U[S]ARTn_2STOP - Two stop bits - - CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI - support. Non-interrupt-driven, poll-waiting is recommended if the - interrupt rate would be to high in the interrupt driven case. - CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. - Cannot be used with CONFIG_STM32_SPI_INTERRUPT. - - CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO - and CONFIG_STM32_DMA2. - CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128 - CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. - Default: Medium - CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: - 4-bit transfer mode. - - CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board - CONFIG_STM32_MII - Support Ethernet MII interface - CONFIG_STM32_MII_MCO1 - Use MCO1 to clock the MII interface - CONFIG_STM32_MII_MCO2 - Use MCO2 to clock the MII interface - CONFIG_STM32_RMII - Support Ethernet RMII interface - CONFIG_STM32_AUTONEG - Use PHY autonegotion to determine speed and mode - CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this - may be defined to select full duplex mode. Default: half-duplex - CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this - may be defined to select 100 MBps speed. Default: 10 Mbps - CONFIG_STM32_PHYSR - This must be provided if CONFIG_STM32_AUTONEG is - defined. The PHY status register address may diff from PHY to PHY. This - configuration sets the address of the PHY status register. - CONFIG_STM32_PHYSR_SPEED - This must be provided if CONFIG_STM32_AUTONEG is - defined. This provides bit mask indicating 10 or 100MBps speed. - CONFIG_STM32_PHYSR_100MBPS - This must be provided if CONFIG_STM32_AUTONEG is - defined. This provides the value of the speed bit(s) indicating 100MBps speed. - CONFIG_STM32_PHYSR_MODE - This must be provided if CONFIG_STM32_AUTONEG is - defined. This provide bit mask indicating full or half duplex modes. - CONFIG_STM32_PHYSR_FULLDUPLEX - This must be provided if CONFIG_STM32_AUTONEG is - defined. This provides the value of the mode bits indicating full duplex mode. - CONFIG_STM32_ETH_PTP - Precision Time Protocol (PTP). Not supported - but some hooks are indicated with this condition. + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI + support. Non-interrupt-driven, poll-waiting is recommended if the + interrupt rate would be to high in the interrupt driven case. + CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. + Cannot be used with CONFIG_STM32_SPI_INTERRUPT. + + CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO + and CONFIG_STM32_DMA2. + CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. + Default: Medium + CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: + 4-bit transfer mode. + + CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board + CONFIG_STM32_MII - Support Ethernet MII interface + CONFIG_STM32_MII_MCO1 - Use MCO1 to clock the MII interface + CONFIG_STM32_MII_MCO2 - Use MCO2 to clock the MII interface + CONFIG_STM32_RMII - Support Ethernet RMII interface + CONFIG_STM32_AUTONEG - Use PHY autonegotion to determine speed and mode + CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this + may be defined to select full duplex mode. Default: half-duplex + CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this + may be defined to select 100 MBps speed. Default: 10 Mbps + CONFIG_STM32_PHYSR - This must be provided if CONFIG_STM32_AUTONEG is + defined. The PHY status register address may diff from PHY to PHY. This + configuration sets the address of the PHY status register. + CONFIG_STM32_PHYSR_SPEED - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provides bit mask indicating 10 or 100MBps speed. + CONFIG_STM32_PHYSR_100MBPS - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provides the value of the speed bit(s) indicating 100MBps speed. + CONFIG_STM32_PHYSR_MODE - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provide bit mask indicating full or half duplex modes. + CONFIG_STM32_PHYSR_FULLDUPLEX - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provides the value of the mode bits indicating full duplex mode. + CONFIG_STM32_ETH_PTP - Precision Time Protocol (PTP). Not supported + but some hooks are indicated with this condition. STM3240G-EVAL CAN Configuration - CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or - CONFIG_STM32_CAN2 must also be defined) - CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. - Default: 8 - CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. - Default: 4 - CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback - mode for testing. The STM32 CAN driver does support loopback mode. - CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. - CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. - CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 - CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 - CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an - dump of all CAN registers. + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or + CONFIG_STM32_CAN2 must also be defined) + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback + mode for testing. The STM32 CAN driver does support loopback mode. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an + dump of all CAN registers. STM3240G-EVAL LCD Hardware Configuration @@ -703,10 +773,10 @@ Configurations Each STM3240G-EVAL configuration is maintained in a sudirectory and can be selected as follow: - cd tools - ./configure.sh stm3240g-eval/<subdir> - cd - - . ./setenv.sh + cd tools + ./configure.sh stm3240g-eval/<subdir> + cd - + . ./setenv.sh Where <subdir> is one of the following: diff --git a/nuttx/configs/stm3240g-eval/dhcpd/defconfig b/nuttx/configs/stm3240g-eval/dhcpd/defconfig index 0fa433c4f..049b8f696 100644 --- a/nuttx/configs/stm3240g-eval/dhcpd/defconfig +++ b/nuttx/configs/stm3240g-eval/dhcpd/defconfig @@ -121,6 +121,29 @@ CONFIG_STM32_JTAG_NOJNTRST_ENABLE=n CONFIG_STM32_JTAG_SW_ENABLE=n # +# On-chip TCM SRAM configuration +# +# CONFIG_STM32_TCMEXCLUDE - Exclude TCM SRAM from the HEAP. You would need +# to do this if DMA is enabled to prevent non-DMA-able TCM memory from +# being a part of the stack. +# + +# +# On-board FSMC SRAM configuration +# +# CONFIG_STM32_FSMC - Required. See below +# CONFIG_MM_REGIONS - Required. Must be 2 or 3 (see above) +# +# CONFIG_STM32_FSMC_SRAM=y - Indicates that SRAM is available via the +# FSMC (as opposed to an LCD or FLASH). +# CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space +# CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space +# +CONFIG_STM32_FSMC_SRAM=y +CONFIG_HEAP2_BASE=0x64000000 +CONFIG_HEAP2_END=(0x64000000+(2*1024*1024)) + +# # Individual subsystems can be enabled: # # Individual subsystems can be enabled: diff --git a/nuttx/configs/stm3240g-eval/dhcpd/setenv.sh b/nuttx/configs/stm3240g-eval/dhcpd/setenv.sh index e16c4a7fd..9fcb08906 100755 --- a/nuttx/configs/stm3240g-eval/dhcpd/setenv.sh +++ b/nuttx/configs/stm3240g-eval/dhcpd/setenv.sh @@ -59,9 +59,11 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ # These are the Cygwin paths to the locations where I installed the Atollic # toolchain under windows. You will also have to edit this if you install -# the CodeSourcery toolchain in any other location -#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" -#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" # This the Cygwin path to the location where I build the buildroot # toolchain. diff --git a/nuttx/configs/stm3240g-eval/include/board.h b/nuttx/configs/stm3240g-eval/include/board.h index 6704b552f..3c8b552e4 100755 --- a/nuttx/configs/stm3240g-eval/include/board.h +++ b/nuttx/configs/stm3240g-eval/include/board.h @@ -257,6 +257,28 @@ #define BUTTON_TAMPER_BIT (1 << BUTTON_TAMPER) #define BUTTON_USER_BIT (1 << BUTTON_USER) +/* SRAM definitions *****************************************************************/ +/* The 16 Mbit SRAM is connected to the STM32F407IGH6 FSMC bus which shares the same + * I/Os with the CAN1 bus. Jumper settings: + * + * JP1: Connect PE4 to SRAM as A20 + * JP2: onnect PE3 to SRAM as A19 + * + * JP3 and JP10 must not be fitted for SRAM and LCD application. JP3 and JP10 + * select CAN1 or CAN2 if fitted; neither if not fitted. + */ + +#if defined(CONFIG_STM32_FSMC) && defined(CONFIG_STM32_FSMC_SRAM) +# if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2) +# error "The STM3240G-EVAL cannot support both CAN and FSMC SRAM" +# endif +#endif + +/* This is the Bank1 SRAM2 address: */ + +#define BOARD_SRAM_BASE 0x64000000 +#define BOARD_SRAM_SIZE (2*1024*1024) + /* Alternate function pin selections ************************************************/ /* UART3: diff --git a/nuttx/configs/stm3240g-eval/nettest/defconfig b/nuttx/configs/stm3240g-eval/nettest/defconfig index d73597d8a..851aa05a1 100644 --- a/nuttx/configs/stm3240g-eval/nettest/defconfig +++ b/nuttx/configs/stm3240g-eval/nettest/defconfig @@ -121,6 +121,29 @@ CONFIG_STM32_JTAG_NOJNTRST_ENABLE=n CONFIG_STM32_JTAG_SW_ENABLE=n # +# On-chip TCM SRAM configuration +# +# CONFIG_STM32_TCMEXCLUDE - Exclude TCM SRAM from the HEAP. You would need +# to do this if DMA is enabled to prevent non-DMA-able TCM memory from +# being a part of the stack. +# + +# +# On-board FSMC SRAM configuration +# +# CONFIG_STM32_FSMC - Required. See below +# CONFIG_MM_REGIONS - Required. Must be 2 or 3 (see above) +# +# CONFIG_STM32_FSMC_SRAM=y - Indicates that SRAM is available via the +# FSMC (as opposed to an LCD or FLASH). +# CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space +# CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space +# +CONFIG_STM32_FSMC_SRAM=y +CONFIG_HEAP2_BASE=0x64000000 +CONFIG_HEAP2_END=(0x64000000+(2*1024*1024)) + +# # Individual subsystems can be enabled: # # Individual subsystems can be enabled: diff --git a/nuttx/configs/stm3240g-eval/nettest/setenv.sh b/nuttx/configs/stm3240g-eval/nettest/setenv.sh index ee3c15ba1..2d3414d27 100755 --- a/nuttx/configs/stm3240g-eval/nettest/setenv.sh +++ b/nuttx/configs/stm3240g-eval/nettest/setenv.sh @@ -59,9 +59,11 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ # These are the Cygwin paths to the locations where I installed the Atollic # toolchain under windows. You will also have to edit this if you install -# the CodeSourcery toolchain in any other location -#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" -#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" # This the Cygwin path to the location where I build the buildroot # toolchain. diff --git a/nuttx/configs/stm3240g-eval/nsh/defconfig b/nuttx/configs/stm3240g-eval/nsh/defconfig index 654d3342f..5a8646541 100644 --- a/nuttx/configs/stm3240g-eval/nsh/defconfig +++ b/nuttx/configs/stm3240g-eval/nsh/defconfig @@ -121,6 +121,29 @@ CONFIG_STM32_JTAG_NOJNTRST_ENABLE=n CONFIG_STM32_JTAG_SW_ENABLE=n # +# On-chip TCM SRAM configuration +# +# CONFIG_STM32_TCMEXCLUDE - Exclude TCM SRAM from the HEAP. You would need +# to do this if DMA is enabled to prevent non-DMA-able TCM memory from +# being a part of the stack. +# + +# +# On-board FSMC SRAM configuration +# +# CONFIG_STM32_FSMC - Required. See below +# CONFIG_MM_REGIONS - Required. Must be 2 or 3 (see above) +# +# CONFIG_STM32_FSMC_SRAM=y - Indicates that SRAM is available via the +# FSMC (as opposed to an LCD or FLASH). +# CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space +# CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space +# +CONFIG_STM32_FSMC_SRAM=y +CONFIG_HEAP2_BASE=0x64000000 +CONFIG_HEAP2_END=(0x64000000+(2*1024*1024)) + +# # Individual subsystems can be enabled: # # Individual subsystems can be enabled: diff --git a/nuttx/configs/stm3240g-eval/nsh/setenv.sh b/nuttx/configs/stm3240g-eval/nsh/setenv.sh index 8d502cbe5..4d92d6bbf 100755 --- a/nuttx/configs/stm3240g-eval/nsh/setenv.sh +++ b/nuttx/configs/stm3240g-eval/nsh/setenv.sh @@ -59,9 +59,11 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ # These are the Cygwin paths to the locations where I installed the Atollic # toolchain under windows. You will also have to edit this if you install -# the CodeSourcery toolchain in any other location -#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" -#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" # This the Cygwin path to the location where I build the buildroot # toolchain. diff --git a/nuttx/configs/stm3240g-eval/nsh2/defconfig b/nuttx/configs/stm3240g-eval/nsh2/defconfig index c2425a0ee..4a7d22042 100644 --- a/nuttx/configs/stm3240g-eval/nsh2/defconfig +++ b/nuttx/configs/stm3240g-eval/nsh2/defconfig @@ -121,6 +121,30 @@ CONFIG_STM32_JTAG_NOJNTRST_ENABLE=n CONFIG_STM32_JTAG_SW_ENABLE=n # +# On-chip TCM SRAM configuration +# +# CONFIG_STM32_TCMEXCLUDE - Exclude TCM SRAM from the HEAP. You would need +# to do this if DMA is enabled to prevent non-DMA-able TCM memory from +# being a part of the stack. +# +CONFIG_STM32_TCMEXCLUDE=y + +# +# On-board FSMC SRAM configuration +# +# CONFIG_STM32_FSMC - Required. See below +# CONFIG_MM_REGIONS - Required. Must be 2 or 3 (see above) +# +# CONFIG_STM32_FSMC_SRAM=y - Indicates that SRAM is available via the +# FSMC (as opposed to an LCD or FLASH). +# CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space +# CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space +# +CONFIG_STM32_FSMC_SRAM=y +CONFIG_HEAP2_BASE=0x64000000 +CONFIG_HEAP2_END=(0x64000000+(2*1024*1024)) + +# # Individual subsystems can be enabled: # # Individual subsystems can be enabled: diff --git a/nuttx/configs/stm3240g-eval/nsh2/setenv.sh b/nuttx/configs/stm3240g-eval/nsh2/setenv.sh index 4604aa72e..944f77734 100755 --- a/nuttx/configs/stm3240g-eval/nsh2/setenv.sh +++ b/nuttx/configs/stm3240g-eval/nsh2/setenv.sh @@ -59,9 +59,11 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ # These are the Cygwin paths to the locations where I installed the Atollic # toolchain under windows. You will also have to edit this if you install -# the CodeSourcery toolchain in any other location -#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" -#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" # This the Cygwin path to the location where I build the buildroot # toolchain. diff --git a/nuttx/configs/stm3240g-eval/ostest/defconfig b/nuttx/configs/stm3240g-eval/ostest/defconfig index b2481d915..dae06e1cf 100644 --- a/nuttx/configs/stm3240g-eval/ostest/defconfig +++ b/nuttx/configs/stm3240g-eval/ostest/defconfig @@ -121,6 +121,29 @@ CONFIG_STM32_JTAG_NOJNTRST_ENABLE=n CONFIG_STM32_JTAG_SW_ENABLE=n # +# On-chip TCM SRAM configuration +# +# CONFIG_STM32_TCMEXCLUDE - Exclude TCM SRAM from the HEAP. You would need +# to do this if DMA is enabled to prevent non-DMA-able TCM memory from +# being a part of the stack. +# + +# +# On-board FSMC SRAM configuration +# +# CONFIG_STM32_FSMC - Required. See below +# CONFIG_MM_REGIONS - Required. Must be 2 or 3 (see above) +# +# CONFIG_STM32_FSMC_SRAM=y - Indicates that SRAM is available via the +# FSMC (as opposed to an LCD or FLASH). +# CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space +# CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space +# +CONFIG_STM32_FSMC_SRAM=y +CONFIG_HEAP2_BASE=0x64000000 +CONFIG_HEAP2_END=(0x64000000+(2*1024*1024)) + +# # Individual subsystems can be enabled: # # Individual subsystems can be enabled: diff --git a/nuttx/configs/stm3240g-eval/ostest/setenv.sh b/nuttx/configs/stm3240g-eval/ostest/setenv.sh index 7bd407845..29786ec2f 100755 --- a/nuttx/configs/stm3240g-eval/ostest/setenv.sh +++ b/nuttx/configs/stm3240g-eval/ostest/setenv.sh @@ -59,9 +59,11 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ # These are the Cygwin paths to the locations where I installed the Atollic # toolchain under windows. You will also have to edit this if you install -# the CodeSourcery toolchain in any other location -#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" -#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" # This the Cygwin path to the location where I build the buildroot # toolchain. diff --git a/nuttx/configs/stm3240g-eval/telnetd/defconfig b/nuttx/configs/stm3240g-eval/telnetd/defconfig index 43a5b7c44..3380c187f 100644 --- a/nuttx/configs/stm3240g-eval/telnetd/defconfig +++ b/nuttx/configs/stm3240g-eval/telnetd/defconfig @@ -121,6 +121,29 @@ CONFIG_STM32_JTAG_NOJNTRST_ENABLE=n CONFIG_STM32_JTAG_SW_ENABLE=n # +# On-chip TCM SRAM configuration +# +# CONFIG_STM32_TCMEXCLUDE - Exclude TCM SRAM from the HEAP. You would need +# to do this if DMA is enabled to prevent non-DMA-able TCM memory from +# being a part of the stack. +# + +# +# On-board FSMC SRAM configuration +# +# CONFIG_STM32_FSMC - Required. See below +# CONFIG_MM_REGIONS - Required. Must be 2 or 3 (see above) +# +# CONFIG_STM32_FSMC_SRAM=y - Indicates that SRAM is available via the +# FSMC (as opposed to an LCD or FLASH). +# CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space +# CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space +# +CONFIG_STM32_FSMC_SRAM=y +CONFIG_HEAP2_BASE=0x64000000 +CONFIG_HEAP2_END=(0x64000000+(2*1024*1024)) + +# # Individual subsystems can be enabled: # # Individual subsystems can be enabled: diff --git a/nuttx/configs/stm3240g-eval/telnetd/setenv.sh b/nuttx/configs/stm3240g-eval/telnetd/setenv.sh index 148a28d52..c022d1d9b 100755 --- a/nuttx/configs/stm3240g-eval/telnetd/setenv.sh +++ b/nuttx/configs/stm3240g-eval/telnetd/setenv.sh @@ -59,9 +59,11 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ # These are the Cygwin paths to the locations where I installed the Atollic # toolchain under windows. You will also have to edit this if you install -# the CodeSourcery toolchain in any other location -#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" -#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" # This the Cygwin path to the location where I build the buildroot # toolchain. diff --git a/nuttx/configs/stm32f4discovery/README.txt b/nuttx/configs/stm32f4discovery/README.txt index d770496b2..15542a2ed 100755 --- a/nuttx/configs/stm32f4discovery/README.txt +++ b/nuttx/configs/stm32f4discovery/README.txt @@ -16,6 +16,7 @@ Contents - UARTs - Timer Inputs/Outputs - FPU + - FSMC SRAM - STM32F4Discovery-specific Configuration Options - Configurations @@ -105,18 +106,7 @@ GNU Toolchain Options and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path appears in your PATH variable before /usr/bin, then you will get the wrong gcc when you try to build host executables. This will cause to strange, uninterpretable - errors build some host binaries in tools/ when you first make. Here is my - workaround kludge. - - 1. Edit the setenv.sh to put the Atollic toolchain at the beginning of the PATH - 2. Source the setenv.sh file: . ./setenv.sh. A side effect of this is that it - will set an environment variable called PATH_ORIG. - 3. Then go back to the original patch: export PATH=$PATH_ORIG - 4. Then make. The make will build all of the host executable but will fail - when it gets to the first ARM binary. - 5. Then source setenv.sh again: . ./setenv.sh. That will correct the PATH - again. When you do make again, the host executables are already made and - now the correct PATH is in place for the ARM build. + errors build some host binaries in tools/ when you first make. Also, the Atollic toolchains are the only toolchains that have built-in support for the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will @@ -431,6 +421,58 @@ options as used with the Atollic toolchain in the Make.defs file: ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard +FSMC SRAM +========= + +On-board SRAM +------------- +The STM32F4Discovery has no on-board SRAM. The information here is only for +reference in case you choose to add some. + +Configuration Options +--------------------- +Internal SRAM is available in all members of the STM32 family. The F4 family +also contains internal TCM SRAM. This SRAM is different because it cannot +be used for DMA. So if DMA needed, then the following should be defined +to exclude TCM SRAM from the heap: + + CONFIG_STM32_TCMEXCLUDE : Exclude TCM SRAM from the HEAP + +In addition to internal SRAM, SRAM may also be available through the FSMC. +In order to use FSMC SRAM, the following additional things need to be +present in the NuttX configuration file: + + CONFIG_STM32_FSMC=y : Enables the FSMC + CONFIG_STM32_FSMC_SRAM=y : Indicates that SRAM is available via the + FSMC (as opposed to an LCD or FLASH). + CONFIG_HEAP2_BASE : The base address of the SRAM in the FSMC + address space + CONFIG_HEAP2_END : The end (+1) of the SRAM in the FSMC + address space + CONFIG_MM_REGIONS : Must be set to a large enough value to + include the FSMC SRAM + +SRAM Configurations +------------------- +There are 4 possible SRAM configurations: + + Configuration 1. System SRAM (only) + CONFIG_MM_REGIONS == 1 + CONFIG_STM32_FSMC_SRAM NOT defined + CONFIG_STM32_TCMEXCLUDE defined + Configuration 2. System SRAM and TCM SRAM + CONFIG_MM_REGIONS == 2 + CONFIG_STM32_FSMC_SRAM NOT defined + CONFIG_STM32_TCMEXCLUDE NOT defined + Configuration 3. System SRAM and FSMC SRAM + CONFIG_MM_REGIONS == 2 + CONFIG_STM32_FSMC_SRAM defined + CONFIG_STM32_TCMEXCLUDE defined + Configuration 4. System SRAM, TCM SRAM, and FSMC SRAM + CONFIG_MM_REGIONS == 3 + CONFIG_STM32_FSMC_SRAM defined + CONFIG_STM32_TCMEXCLUDE NOT defined + Configuration Changes --------------------- @@ -461,153 +503,166 @@ by the "Lite" version of the Atollic toolchain. STM32F4Discovery-specific Configuration Options =============================================== - CONFIG_ARCH - Identifies the arch/ subdirectory. This should - be set to: + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: - CONFIG_ARCH=arm + CONFIG_ARCH=arm - CONFIG_ARCH_family - For use in C code: + CONFIG_ARCH_family - For use in C code: - CONFIG_ARCH_ARM=y + CONFIG_ARCH_ARM=y - CONFIG_ARCH_architecture - For use in C code: + CONFIG_ARCH_architecture - For use in C code: - CONFIG_ARCH_CORTEXM4=y + CONFIG_ARCH_CORTEXM4=y - CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory - CONFIG_ARCH_CHIP=stm32 + CONFIG_ARCH_CHIP=stm32 - CONFIG_ARCH_CHIP_name - For use in C code to identify the exact - chip: + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: - CONFIG_ARCH_CHIP_STM32F407IG=y + CONFIG_ARCH_CHIP_STM32F407IG=y CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock configuration features. CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n - CONFIG_ARCH_BOARD - Identifies the configs subdirectory and - hence, the board that supports the particular chip or SoC. + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=STM32F4Discovery (for the STM32F4Discovery development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) - CONFIG_ARCH_BOARD=STM32F4Discovery (for the STM32F4Discovery development board) + CONFIG_DRAM_SIZE - Describes the installed DRAM (SRAM in this case): - CONFIG_ARCH_BOARD_name - For use in C code + CONFIG_DRAM_SIZE=0x00010000 (64Kb) - CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y + CONFIG_DRAM_START - The start address of installed DRAM - CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation - of delay loops + CONFIG_DRAM_START=0x20000000 - CONFIG_ENDIAN_BIG - define if big endian (default is little - endian) + CONFIG_DRAM_END - Last address+1 of installed RAM - CONFIG_DRAM_SIZE - Describes the installed DRAM (SRAM in this case): + CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE) - CONFIG_DRAM_SIZE=0x00010000 (64Kb) + CONFIG_STM32_TCMEXCLUDE - Exclude TCM SRAM from the HEAP - CONFIG_DRAM_START - The start address of installed DRAM + In addition to internal SRAM, SRAM may also be available through the FSMC. + In order to use FSMC SRAM, the following additional things need to be + present in the NuttX configuration file: - CONFIG_DRAM_START=0x20000000 + CONFIG_STM32_FSMC_SRAM - Indicates that SRAM is available via the + FSMC (as opposed to an LCD or FLASH). - CONFIG_DRAM_END - Last address+1 of installed RAM + CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space - CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE) + CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space - CONFIG_ARCH_IRQPRIO - The STM3240xxx supports interrupt prioritization + CONFIG_ARCH_IRQPRIO - The STM3240xxx supports interrupt prioritization - CONFIG_ARCH_IRQPRIO=y + CONFIG_ARCH_IRQPRIO=y - CONFIG_ARCH_FPU - The STM3240xxx supports a floating point unit (FPU) + CONFIG_ARCH_FPU - The STM3240xxx supports a floating point unit (FPU) - CONFIG_ARCH_FPU=y + CONFIG_ARCH_FPU=y - CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that - have LEDs + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs - CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt - stack. If defined, this symbol is the size of the interrupt - stack in bytes. If not defined, the user task stacks will be - used during interrupt handling. + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. - CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions - CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. - CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that - cause a 100 second delay during boot-up. This 100 second delay - serves no purpose other than it allows you to calibratre - CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure - the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until - the delay actually is 100 seconds. + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. Individual subsystems can be enabled: - AHB1 - ---- - CONFIG_STM32_CRC - CONFIG_STM32_BKPSRAM - CONFIG_STM32_CCMDATARAM - CONFIG_STM32_DMA1 - CONFIG_STM32_DMA2 - CONFIG_STM32_ETHMAC - CONFIG_STM32_OTGHS - - AHB2 - ---- - CONFIG_STM32_DCMI - CONFIG_STM32_CRYP - CONFIG_STM32_HASH - CONFIG_STM32_RNG - CONFIG_STM32_OTGFS - - AHB3 - ---- - CONFIG_STM32_FSMC - - APB1 - ---- - CONFIG_STM32_TIM2 - CONFIG_STM32_TIM3 - CONFIG_STM32_TIM4 - CONFIG_STM32_TIM5 - CONFIG_STM32_TIM6 - CONFIG_STM32_TIM7 - CONFIG_STM32_TIM12 - CONFIG_STM32_TIM13 - CONFIG_STM32_TIM14 - CONFIG_STM32_WWDG - CONFIG_STM32_SPI2 - CONFIG_STM32_SPI3 - CONFIG_STM32_USART2 - CONFIG_STM32_USART3 - CONFIG_STM32_UART4 - CONFIG_STM32_UART5 - CONFIG_STM32_I2C1 - CONFIG_STM32_I2C2 - CONFIG_STM32_I2C3 - CONFIG_STM32_CAN1 - CONFIG_STM32_CAN2 - CONFIG_STM32_DAC1 - CONFIG_STM32_DAC2 - CONFIG_STM32_PWR -- Required for RTC - - APB2 - ---- - CONFIG_STM32_TIM1 - CONFIG_STM32_TIM8 - CONFIG_STM32_USART1 - CONFIG_STM32_USART6 - CONFIG_STM32_ADC1 - CONFIG_STM32_ADC2 - CONFIG_STM32_ADC3 - CONFIG_STM32_SDIO - CONFIG_STM32_SPI1 - CONFIG_STM32_SYSCFG - CONFIG_STM32_TIM9 - CONFIG_STM32_TIM10 - CONFIG_STM32_TIM11 + AHB1 + ---- + CONFIG_STM32_CRC + CONFIG_STM32_BKPSRAM + CONFIG_STM32_CCMDATARAM + CONFIG_STM32_DMA1 + CONFIG_STM32_DMA2 + CONFIG_STM32_ETHMAC + CONFIG_STM32_OTGHS + + AHB2 + ---- + CONFIG_STM32_DCMI + CONFIG_STM32_CRYP + CONFIG_STM32_HASH + CONFIG_STM32_RNG + CONFIG_STM32_OTGFS + + AHB3 + ---- + CONFIG_STM32_FSMC + + APB1 + ---- + CONFIG_STM32_TIM2 + CONFIG_STM32_TIM3 + CONFIG_STM32_TIM4 + CONFIG_STM32_TIM5 + CONFIG_STM32_TIM6 + CONFIG_STM32_TIM7 + CONFIG_STM32_TIM12 + CONFIG_STM32_TIM13 + CONFIG_STM32_TIM14 + CONFIG_STM32_WWDG + CONFIG_STM32_SPI2 + CONFIG_STM32_SPI3 + CONFIG_STM32_USART2 + CONFIG_STM32_USART3 + CONFIG_STM32_UART4 + CONFIG_STM32_UART5 + CONFIG_STM32_I2C1 + CONFIG_STM32_I2C2 + CONFIG_STM32_I2C3 + CONFIG_STM32_CAN1 + CONFIG_STM32_CAN2 + CONFIG_STM32_DAC1 + CONFIG_STM32_DAC2 + CONFIG_STM32_PWR -- Required for RTC + + APB2 + ---- + CONFIG_STM32_TIM1 + CONFIG_STM32_TIM8 + CONFIG_STM32_USART1 + CONFIG_STM32_USART6 + CONFIG_STM32_ADC1 + CONFIG_STM32_ADC2 + CONFIG_STM32_ADC3 + CONFIG_STM32_SDIO + CONFIG_STM32_SPI1 + CONFIG_STM32_SYSCFG + CONFIG_STM32_TIM9 + CONFIG_STM32_TIM10 + CONFIG_STM32_TIM11 Timer and I2C devices may need to the following to force power to be applied unconditionally at power up. (Otherwise, the device is powered when it is @@ -623,16 +678,16 @@ STM32F4Discovery-specific Configuration Options to assign the timer (n) for used by the ADC or DAC, but then you also have to configure which ADC or DAC (m) it is assigned to. - CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 - CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 - CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 - CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14 - CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2 + CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 + CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 + CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 + CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14 + CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2 For each timer that is enabled for PWM usage, we need the following additional configuration settings: - CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} + CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} NOTE: The STM32 timers are each capable of generating different signals on each of the four channels with different duty cycles. That capability is @@ -640,60 +695,60 @@ STM32F4Discovery-specific Configuration Options JTAG Enable settings (by default only SW-DP is enabled): - CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) - CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) - but without JNTRST. - CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled + CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + but without JNTRST. + CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled STM3240xxx specific device driver settings - CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART m (m=4,5) for the console and ttys0 (default is the USART1). - CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. - This specific the size of the receive buffer - CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before - being sent. This specific the size of the transmit buffer - CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be - CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. - CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity - CONFIG_U[S]ARTn_2STOP - Two stop bits + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits STM3240xxx CAN Configuration - CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or - CONFIG_STM32_CAN2 must also be defined) - CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default - Standard 11-bit IDs. - CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. - Default: 8 - CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. - Default: 4 - CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback - mode for testing. The STM32 CAN driver does support loopback mode. - CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. - CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. - CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 - CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 - CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an - dump of all CAN registers. + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or + CONFIG_STM32_CAN2 must also be defined) + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback + mode for testing. The STM32 CAN driver does support loopback mode. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an + dump of all CAN registers. STM3240xxx SPI Configuration - CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI - support. Non-interrupt-driven, poll-waiting is recommended if the - interrupt rate would be to high in the interrupt driven case. - CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. - Cannot be used with CONFIG_STM32_SPI_INTERRUPT. + CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI + support. Non-interrupt-driven, poll-waiting is recommended if the + interrupt rate would be to high in the interrupt driven case. + CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. + Cannot be used with CONFIG_STM32_SPI_INTERRUPT. STM3240xxx DMA Configuration - CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO - and CONFIG_STM32_DMA2. - CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128 - CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. - Default: Medium - CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: - 4-bit transfer mode. + CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO + and CONFIG_STM32_DMA2. + CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. + Default: Medium + CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: + 4-bit transfer mode. Configurations ============== @@ -701,10 +756,10 @@ Configurations Each STM32F4Discovery configuration is maintained in a sudirectory and can be selected as follow: - cd tools - ./configure.sh STM32F4Discovery/<subdir> - cd - - . ./setenv.sh + cd tools + ./configure.sh STM32F4Discovery/<subdir> + cd - + . ./setenv.sh Where <subdir> is one of the following: diff --git a/nuttx/configs/stm32f4discovery/nsh/setenv.sh b/nuttx/configs/stm32f4discovery/nsh/setenv.sh index c131e3b76..65a7a3ab4 100755 --- a/nuttx/configs/stm32f4discovery/nsh/setenv.sh +++ b/nuttx/configs/stm32f4discovery/nsh/setenv.sh @@ -59,9 +59,11 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ # These are the Cygwin paths to the locations where I installed the Atollic # toolchain under windows. You will also have to edit this if you install -# the CodeSourcery toolchain in any other location -#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" -#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" # This the Cygwin path to the location where I build the buildroot # toolchain. diff --git a/nuttx/configs/stm32f4discovery/ostest/setenv.sh b/nuttx/configs/stm32f4discovery/ostest/setenv.sh index 3028955c1..d67f434d0 100755 --- a/nuttx/configs/stm32f4discovery/ostest/setenv.sh +++ b/nuttx/configs/stm32f4discovery/ostest/setenv.sh @@ -59,9 +59,11 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ # These are the Cygwin paths to the locations where I installed the Atollic # toolchain under windows. You will also have to edit this if you install -# the CodeSourcery toolchain in any other location -#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" -#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" # This the Cygwin path to the location where I build the buildroot # toolchain. diff --git a/nuttx/net/uip/uip_tcpinput.c b/nuttx/net/uip/uip_tcpinput.c index 593f55b55..a8e8032e9 100644 --- a/nuttx/net/uip/uip_tcpinput.c +++ b/nuttx/net/uip/uip_tcpinput.c @@ -184,7 +184,7 @@ void uip_tcpinput(struct uip_driver_s *dev) conn->crefs = 1; if (uip_accept(dev, conn, tmp16) != OK) { - /* No, then we have to give the connection back */ + /* No, then we have to give the connection back and drop the packet */ conn->crefs = 0; uip_tcpfree(conn); |