Tiva Timer: Add support to select alternate clock source and 32-bit register concatenation mode.

3 files changed, 158 insertions, 106 deletions

diff --git a/nuttx/arch/arm/src/tiva/chip/tiva_timer.h b/nuttx/arch/arm/src/tiva/chip/tiva_timer.h
index 54a4e1257..c2efdb2c7 100644
--- a/nuttx/arch/arm/src/tiva/chip/tiva_timer.h
+++ b/nuttx/arch/arm/src/tiva/chip/tiva_timer.h
@@ -587,126 +587,126 @@
 /* GPTM Synchronize (GPTM0 only) */
 
 #if defined(CONFIG_ARCH_CHIP_LM4F) || defined(CONFIG_ARCH_CHIP_TM4C)
-#  define TIMER_SYNC_SYNCT_NONE        0         /* GPTMn is not affected */
-#  define TIMER_SYNC_SYNCT_TA          1         /* Timer A timeout event triggered */
-#  define TIMER_SYNC_SYNCT_TB          2         /* Timer B timeout event triggered */
-#  define TIMER_SYNC_SYNCT_TATB        3         /* Both  Timer A/B timeout event triggered */
+#  define TIMER_SYNC_NONE              0         /* GPTMn is not affected */
+#  define TIMER_SYNC_TA                1         /* Timer A timeout event triggered */
+#  define TIMER_SYNC_TB                2         /* Timer B timeout event triggered */
+#  define TIMER_SYNC_TATB              3         /* Both  Timer A/B timeout event triggered */
 
 #  define TIMER_SYNC_SYNCT_SHIFT(i)    ((i) << 1) /* Synchronize GPTMi timer i */
 #  define TIMER_SYNC_SYNCT_MASK(i)     (3 << TIMER_SYNC_SYNCT_SHIFT(i))
 #    define TIMER_SYNC_SYNCT(i,n)      ((uint32_t)(n) << TIMER_SYNC_SYNCT_SHIFT(i))
-#    define TIMER_SYNC_SYNCT_NONE(i)   TIMER_SYNC_SYNCT(i,TIMER_SYNC_SYNCT_NONE)
-#    define TIMER_SYNC_SYNCT_TA(i)     TIMER_SYNC_SYNCT(i,TIMER_SYNC_SYNCT_TA)
-#    define TIMER_SYNC_SYNCT_TB(i)     TIMER_SYNC_SYNCT(i,TIMER_SYNC_SYNCT_TB)
-#    define TIMER_SYNC_SYNCT_TATB(i)   TIMER_SYNC_SYNCT(i,TIMER_SYNC_SYNCT_TATB)
+#    define TIMER_SYNC_SYNCT_NONE(i)   TIMER_SYNC_SYNCT(i,TIMER_SYNC_NONE)
+#    define TIMER_SYNC_SYNCT_TA(i)     TIMER_SYNC_SYNCT(i,TIMER_SYNC_TA)
+#    define TIMER_SYNC_SYNCT_TB(i)     TIMER_SYNC_SYNCT(i,TIMER_SYNC_TB)
+#    define TIMER_SYNC_SYNCT_TATB(i)   TIMER_SYNC_SYNCT(i,TIMER_SYNC_TATB)
 
 #  define TIMER_SYNC_SYNCT0_SHIFT      (0)       /* Bits 0-1: Synchronize GPTM timer 0 */
 #  define TIMER_SYNC_SYNCT0_MASK       (3 << TIMER_SYNC_SYNCT0_SHIFT)
 #    define TIMER_SYNC_SYNCT0(n)       ((uint32_t)(n) << TIMER_SYNC_SYNCT0_SHIFT)
-#    define TIMER_SYNC_SYNCT0_NONE     TIMER_SYNC_SYNCT0(TIMER_SYNC_SYNCT_NONE)
-#    define TIMER_SYNC_SYNCT0_TA       TIMER_SYNC_SYNCT0(TIMER_SYNC_SYNCT_TA)
-#    define TIMER_SYNC_SYNCT0_TB       TIMER_SYNC_SYNCT0(TIMER_SYNC_SYNCT_TB)
-#    define TIMER_SYNC_SYNCT0_TATB     TIMER_SYNC_SYNCT0(TIMER_SYNC_SYNCT_TATB)
+#    define TIMER_SYNC_SYNCT0_NONE     TIMER_SYNC_SYNCT0(TIMER_SYNC_NONE)
+#    define TIMER_SYNC_SYNCT0_TA       TIMER_SYNC_SYNCT0(TIMER_SYNC_TA)
+#    define TIMER_SYNC_SYNCT0_TB       TIMER_SYNC_SYNCT0(TIMER_SYNC_TB)
+#    define TIMER_SYNC_SYNCT0_TATB     TIMER_SYNC_SYNCT0(TIMER_SYNC_TATB)
 #  define TIMER_SYNC_SYNCT1_SHIFT      (2)       /* Synchronize GPTM timer 1 */
 #  define TIMER_SYNC_SYNCT1_MASK       (3 << TIMER_SYNC_SYNCT1_SHIFT)
 #    define TIMER_SYNC_SYNCT1(n)       ((uint32_t)(n) << TIMER_SYNC_SYNCT1_SHIFT)
-#    define TIMER_SYNC_SYNCT1_NONE     TIMER_SYNC_SYNCT1(TIMER_SYNC_SYNCT_NONE)
-#    define TIMER_SYNC_SYNCT1_TA       TIMER_SYNC_SYNCT1(TIMER_SYNC_SYNCT_TA)
-#    define TIMER_SYNC_SYNCT1_TB       TIMER_SYNC_SYNCT1(TIMER_SYNC_SYNCT_TB)
-#    define TIMER_SYNC_SYNCT1_TATB     TIMER_SYNC_SYNCT1(TIMER_SYNC_SYNCT_TATB)
+#    define TIMER_SYNC_SYNCT1_NONE     TIMER_SYNC_SYNCT1(TIMER_SYNC_NONE)
+#    define TIMER_SYNC_SYNCT1_TA       TIMER_SYNC_SYNCT1(TIMER_SYNC_TA)
+#    define TIMER_SYNC_SYNCT1_TB       TIMER_SYNC_SYNCT1(TIMER_SYNC_TB)
+#    define TIMER_SYNC_SYNCT1_TATB     TIMER_SYNC_SYNCT1(TIMER_SYNC_TATB)
 #  define TIMER_SYNC_SYNCT2_SHIFT      (4)       /* Synchronize GPTM timer 2 */
 #  define TIMER_SYNC_SYNCT2_MASK       (3 << )
 #    define TIMER_SYNC_SYNCT2(n)       ((uint32_t)(n) << TIMER_SYNC_SYNCT2_SHIFT)
-#    define TIMER_SYNC_SYNCT2_NONE     TIMER_SYNC_SYNCT2(TIMER_SYNC_SYNCT_NONE)
-#    define TIMER_SYNC_SYNCT2_TA       TIMER_SYNC_SYNCT2(TIMER_SYNC_SYNCT_TA)
-#    define TIMER_SYNC_SYNCT2_TB       TIMER_SYNC_SYNCT2(TIMER_SYNC_SYNCT_TB)
-#    define TIMER_SYNC_SYNCT2_TATB     TIMER_SYNC_SYNCT2(TIMER_SYNC_SYNCT_TATB)
+#    define TIMER_SYNC_SYNCT2_NONE     TIMER_SYNC_SYNCT2(TIMER_SYNC_NONE)
+#    define TIMER_SYNC_SYNCT2_TA       TIMER_SYNC_SYNCT2(TIMER_SYNC_TA)
+#    define TIMER_SYNC_SYNCT2_TB       TIMER_SYNC_SYNCT2(TIMER_SYNC_TB)
+#    define TIMER_SYNC_SYNCT2_TATB     TIMER_SYNC_SYNCT2(TIMER_SYNC_TATB)
 #  define TIMER_SYNC_SYNCT3_SHIFT      (6)       /* Synchronize GPTM timer 3 */
 #  define TIMER_SYNC_SYNCT3_MASK       (3 << )
 #    define TIMER_SYNC_SYNCT3(n)       ((uint32_t)(n) << TIMER_SYNC_SYNCT3_SHIFT)
-#    define TIMER_SYNC_SYNCT3_NONE     TIMER_SYNC_SYNCT3(TIMER_SYNC_SYNCT_NONE)
-#    define TIMER_SYNC_SYNCT3_TA       TIMER_SYNC_SYNCT3(TIMER_SYNC_SYNCT_TA)
-#    define TIMER_SYNC_SYNCT3_TB       TIMER_SYNC_SYNCT3(TIMER_SYNC_SYNCT_TB)
-#    define TIMER_SYNC_SYNCT3_TATB     TIMER_SYNC_SYNCT3(TIMER_SYNC_SYNCT_TATB)
+#    define TIMER_SYNC_SYNCT3_NONE     TIMER_SYNC_SYNCT3(TIMER_SYNC_NONE)
+#    define TIMER_SYNC_SYNCT3_TA       TIMER_SYNC_SYNCT3(TIMER_SYNC_TA)
+#    define TIMER_SYNC_SYNCT3_TB       TIMER_SYNC_SYNCT3(TIMER_SYNC_TB)
+#    define TIMER_SYNC_SYNCT3_TATB     TIMER_SYNC_SYNCT3(TIMER_SYNC_TATB)
 #  define TIMER_SYNC_SYNCT4_SHIFT      (8)       /* Synchronize GPTM timer 4 */
 #  define TIMER_SYNC_SYNCT4_MASK       (3 << )
 #    define TIMER_SYNC_SYNCT4(n)       ((uint32_t)(n) << TIMER_SYNC_SYNCT4_SHIFT)
-#    define TIMER_SYNC_SYNCT4_NONE     TIMER_SYNC_SYNCT4(TIMER_SYNC_SYNCT_NONE)
-#    define TIMER_SYNC_SYNCT4_TA       TIMER_SYNC_SYNCT4(TIMER_SYNC_SYNCT_TA)
-#    define TIMER_SYNC_SYNCT4_TB       TIMER_SYNC_SYNCT4(TIMER_SYNC_SYNCT_TB)
-#    define TIMER_SYNC_SYNCT4_TATB     TIMER_SYNC_SYNCT4(TIMER_SYNC_SYNCT_TATB)
+#    define TIMER_SYNC_SYNCT4_NONE     TIMER_SYNC_SYNCT4(TIMER_SYNC_NONE)
+#    define TIMER_SYNC_SYNCT4_TA       TIMER_SYNC_SYNCT4(TIMER_SYNC_TA)
+#    define TIMER_SYNC_SYNCT4_TB       TIMER_SYNC_SYNCT4(TIMER_SYNC_TB)
+#    define TIMER_SYNC_SYNCT4_TATB     TIMER_SYNC_SYNCT4(TIMER_SYNC_TATB)
 #  define TIMER_SYNC_SYNCT5_SHIFT      (10)      /* Synchronize GPTM timer 5 */
 #  define TIMER_SYNC_SYNCT5_MASK       (3 << )
 #    define TIMER_SYNC_SYNCT5(n)       ((uint32_t)(n) << TIMER_SYNC_SYNCT5_SHIFT)
-#    define TIMER_SYNC_SYNCT5_NONE     TIMER_SYNC_SYNCT5(TIMER_SYNC_SYNCT_NONE)
-#    define TIMER_SYNC_SYNCT5_TA       TIMER_SYNC_SYNCT5(TIMER_SYNC_SYNCT_TA)
-#    define TIMER_SYNC_SYNCT5_TB       TIMER_SYNC_SYNCT5(TIMER_SYNC_SYNCT_TB)
-#    define TIMER_SYNC_SYNCT5_TATB     TIMER_SYNC_SYNCT5(TIMER_SYNC_SYNCT_TATB)
+#    define TIMER_SYNC_SYNCT5_NONE     TIMER_SYNC_SYNCT5(TIMER_SYNC_NONE)
+#    define TIMER_SYNC_SYNCT5_TA       TIMER_SYNC_SYNCT5(TIMER_SYNC_TA)
+#    define TIMER_SYNC_SYNCT5_TB       TIMER_SYNC_SYNCT5(TIMER_SYNC_TB)
+#    define TIMER_SYNC_SYNCT5_TATB     TIMER_SYNC_SYNCT5(TIMER_SYNC_TATB)
 #  define TIMER_SYNC_SYNCT6_SHIFT      (12)      /* Synchronize GPTM timer 6 */
 #  define TIMER_SYNC_SYNCT6_MASK       (3 << )
 #    define TIMER_SYNC_SYNCT6(n)       ((uint32_t)(n) << TIMER_SYNC_SYNCT6_SHIFT)
-#    define TIMER_SYNC_SYNCT6_NONE     TIMER_SYNC_SYNCT6(TIMER_SYNC_SYNCT_NONE)
-#    define TIMER_SYNC_SYNCT6_TA       TIMER_SYNC_SYNCT6(TIMER_SYNC_SYNCT_TA)
-#    define TIMER_SYNC_SYNCT6_TB       TIMER_SYNC_SYNCT6(TIMER_SYNC_SYNCT_TB)
-#    define TIMER_SYNC_SYNCT6_TATB     TIMER_SYNC_SYNCT6(TIMER_SYNC_SYNCT_TATB)
+#    define TIMER_SYNC_SYNCT6_NONE     TIMER_SYNC_SYNCT6(TIMER_SYNC_NONE)
+#    define TIMER_SYNC_SYNCT6_TA       TIMER_SYNC_SYNCT6(TIMER_SYNC_TA)
+#    define TIMER_SYNC_SYNCT6_TB       TIMER_SYNC_SYNCT6(TIMER_SYNC_TB)
+#    define TIMER_SYNC_SYNCT6_TATB     TIMER_SYNC_SYNCT6(TIMER_SYNC_TATB)
 #  define TIMER_SYNC_SYNCT7_SHIFT      (14)      /* Synchronize GPTM timer 7 */
 #  define TIMER_SYNC_SYNCT7_MASK       (3 << )
 #    define TIMER_SYNC_SYNCT7(n)       ((uint32_t)(n) << TIMER_SYNC_SYNCT7_SHIFT)
-#    define TIMER_SYNC_SYNCT7_NONE     TIMER_SYNC_SYNCT7(TIMER_SYNC_SYNCT_NONE)
-#    define TIMER_SYNC_SYNCT7_TA       TIMER_SYNC_SYNCT7(TIMER_SYNC_SYNCT_TA)
-#    define TIMER_SYNC_SYNCT7_TB       TIMER_SYNC_SYNCT7(TIMER_SYNC_SYNCT_TB)
-#    define TIMER_SYNC_SYNCT7_TATB     TIMER_SYNC_SYNCT7(TIMER_SYNC_SYNCT_TATB)
+#    define TIMER_SYNC_SYNCT7_NONE     TIMER_SYNC_SYNCT7(TIMER_SYNC_NONE)
+#    define TIMER_SYNC_SYNCT7_TA       TIMER_SYNC_SYNCT7(TIMER_SYNC_TA)
+#    define TIMER_SYNC_SYNCT7_TB       TIMER_SYNC_SYNCT7(TIMER_SYNC_TB)
+#    define TIMER_SYNC_SYNCT7_TATB     TIMER_SYNC_SYNCT7(TIMER_SYNC_TATB)
 
-#  define TIMER_SYNC_SYNCWT_SHIFT(1)   ((i) << 1) /* Synchronize GPTMi 32/64-Bit Timer i */
+#  define TIMER_SYNC_SYNCWT_SHIFT(i)   ((i) << 1) /* Synchronize GPTMi 32/64-Bit Timer i */
 #  define TIMER_SYNC_SYNCWT_MASK(i)    (3 << TIMER_SYNC_SYNCT_SHIFT(i))
 #    define TIMER_SYNC_SYNCWT(i,n)     ((uint32_t)(n) << TIMER_SYNC_SYNCT_SHIFT(i))
-#    define TIMER_SYNC_SYNCWT_NONE(i)  TIMER_SYNC_SYNCT(i,TIMER_SYNC_SYNCT_NONE)
-#    define TIMER_SYNC_SYNCWT_TA(i)    TIMER_SYNC_SYNCT(i,TIMER_SYNC_SYNCT_TA)
-#    define TIMER_SYNC_SYNCWT_TB(i)    TIMER_SYNC_SYNCT(i,TIMER_SYNC_SYNCT_TB)
-#    define TIMER_SYNC_SYNCWT_TATB(i)  TIMER_SYNC_SYNCT(i,TIMER_SYNC_SYNCT_TATB)
+#    define TIMER_SYNC_SYNCWT_NONE(i)  TIMER_SYNC_SYNCT(i,TIMER_SYNC_NONE)
+#    define TIMER_SYNC_SYNCWT_TA(i)    TIMER_SYNC_SYNCT(i,TIMER_SYNC_TA)
+#    define TIMER_SYNC_SYNCWT_TB(i)    TIMER_SYNC_SYNCT(i,TIMER_SYNC_TB)
+#    define TIMER_SYNC_SYNCWT_TATB(i)  TIMER_SYNC_SYNCT(i,TIMER_SYNC_TATB)
 
 #  define TIMER_SYNC_SYNCWT0_SHIFT     (12)      /* Synchronize WTM 32/64-Bit wide timer 0 */
 #  define TIMER_SYNC_SYNCWT0_MASK      (3 << TIMER_SYNC_SYNCWT0_SHIFT)
 #    define TIMER_SYNC_SYNCWT0(n)      ((uint32_t)(n) << TIMER_SYNC_SYNCWT0_SHIFT)
-#    define TIMER_SYNC_SYNCWT0_NONE    TIMER_SYNC_SYNCWT0(TIMER_SYNC_SYNCT_NONE)
-#    define TIMER_SYNC_SYNCWT0_TA      TIMER_SYNC_SYNCWT0(TIMER_SYNC_SYNCT_TA)
-#    define TIMER_SYNC_SYNCWT0_TB      TIMER_SYNC_SYNCWT0(TIMER_SYNC_SYNCT_TB)
-#    define TIMER_SYNC_SYNCWT0_TATB    TIMER_SYNC_SYNCWT0(TIMER_SYNC_SYNCT_TATB)
+#    define TIMER_SYNC_SYNCWT0_NONE    TIMER_SYNC_SYNCWT0(TIMER_SYNC_NONE)
+#    define TIMER_SYNC_SYNCWT0_TA      TIMER_SYNC_SYNCWT0(TIMER_SYNC_TA)
+#    define TIMER_SYNC_SYNCWT0_TB      TIMER_SYNC_SYNCWT0(TIMER_SYNC_TB)
+#    define TIMER_SYNC_SYNCWT0_TATB    TIMER_SYNC_SYNCWT0(TIMER_SYNC_TATB)
 #  define TIMER_SYNC_SYNCWT1_SHIFT     (14)      /* Synchronize WTM 32/64-Bit wide timer 1 */
 #  define TIMER_SYNC_SYNCWT1_MASK      (3 << )
 #    define TIMER_SYNC_SYNCWT1(n)      ((uint32_t)(n) << TIMER_SYNC_SYNCWT1_SHIFT)
-#    define TIMER_SYNC_SYNCWT1_NONE    TIMER_SYNC_SYNCWT1(TIMER_SYNC_SYNCT_NONE)
-#    define TIMER_SYNC_SYNCWT1_TA      TIMER_SYNC_SYNCWT1(TIMER_SYNC_SYNCT_TA)
-#    define TIMER_SYNC_SYNCWT1_TB      TIMER_SYNC_SYNCWT1(TIMER_SYNC_SYNCT_TB)
-#    define TIMER_SYNC_SYNCWT1_TATB    TIMER_SYNC_SYNCWT1(TIMER_SYNC_SYNCT_TATB)
+#    define TIMER_SYNC_SYNCWT1_NONE    TIMER_SYNC_SYNCWT1(TIMER_SYNC_NONE)
+#    define TIMER_SYNC_SYNCWT1_TA      TIMER_SYNC_SYNCWT1(TIMER_SYNC_TA)
+#    define TIMER_SYNC_SYNCWT1_TB      TIMER_SYNC_SYNCWT1(TIMER_SYNC_TB)
+#    define TIMER_SYNC_SYNCWT1_TATB    TIMER_SYNC_SYNCWT1(TIMER_SYNC_TATB)
 #  define TIMER_SYNC_SYNCWT2_SHIFT     (16)      /* Synchronize WTM 32/64-Bit wide timer 2 */
 #  define TIMER_SYNC_SYNCWT2_MASK      (3 << )
 #    define TIMER_SYNC_SYNCWT2(n)      ((uint32_t)(n) << TIMER_SYNC_SYNCWT2_SHIFT)
-#    define TIMER_SYNC_SYNCWT2_NONE    TIMER_SYNC_SYNCWT2(TIMER_SYNC_SYNCT_NONE)
-#    define TIMER_SYNC_SYNCWT2_TA      TIMER_SYNC_SYNCWT2(TIMER_SYNC_SYNCT_TA)
-#    define TIMER_SYNC_SYNCWT2_TB      TIMER_SYNC_SYNCWT2(TIMER_SYNC_SYNCT_TB)
-#    define TIMER_SYNC_SYNCWT2_TATB    TIMER_SYNC_SYNCWT2(TIMER_SYNC_SYNCT_TATB)
+#    define TIMER_SYNC_SYNCWT2_NONE    TIMER_SYNC_SYNCWT2(TIMER_SYNC_NONE)
+#    define TIMER_SYNC_SYNCWT2_TA      TIMER_SYNC_SYNCWT2(TIMER_SYNC_TA)
+#    define TIMER_SYNC_SYNCWT2_TB      TIMER_SYNC_SYNCWT2(TIMER_SYNC_TB)
+#    define TIMER_SYNC_SYNCWT2_TATB    TIMER_SYNC_SYNCWT2(TIMER_SYNC_TATB)
 #  define TIMER_SYNC_SYNCWT3_SHIFT     (18)      /* Synchronize WTM 32/64-Bit wide timer 3 */
 #  define TIMER_SYNC_SYNCWT3_MASK      (3 << )
 #    define TIMER_SYNC_SYNCWT3(n)      ((uint32_t)(n) << TIMER_SYNC_SYNCWT3_SHIFT)
-#    define TIMER_SYNC_SYNCWT3_NONE    TIMER_SYNC_SYNCWT3(TIMER_SYNC_SYNCT_NONE)
-#    define TIMER_SYNC_SYNCWT3_TA      TIMER_SYNC_SYNCWT3(TIMER_SYNC_SYNCT_TA)
-#    define TIMER_SYNC_SYNCWT3_TB      TIMER_SYNC_SYNCWT3(TIMER_SYNC_SYNCT_TB)
-#    define TIMER_SYNC_SYNCWT3_TATB    TIMER_SYNC_SYNCWT3(TIMER_SYNC_SYNCT_TATB)
+#    define TIMER_SYNC_SYNCWT3_NONE    TIMER_SYNC_SYNCWT3(TIMER_SYNC_NONE)
+#    define TIMER_SYNC_SYNCWT3_TA      TIMER_SYNC_SYNCWT3(TIMER_SYNC_TA)
+#    define TIMER_SYNC_SYNCWT3_TB      TIMER_SYNC_SYNCWT3(TIMER_SYNC_TB)
+#    define TIMER_SYNC_SYNCWT3_TATB    TIMER_SYNC_SYNCWT3(TIMER_SYNC_TATB)
 #  define TIMER_SYNC_SYNCWT4_SHIFT     (20)      /* Synchronize WTM 32/64-Bit wide timer 4 */
 #  define TIMER_SYNC_SYNCWT4_MASK      (3 << )
 #    define TIMER_SYNC_SYNCWT4(n)      ((uint32_t)(n) << TIMER_SYNC_SYNCWT4_SHIFT)
-#    define TIMER_SYNC_SYNCWT4_NONE    TIMER_SYNC_SYNCWT4(TIMER_SYNC_SYNCT_NONE)
-#    define TIMER_SYNC_SYNCWT4_TA      TIMER_SYNC_SYNCWT4(TIMER_SYNC_SYNCT_TA)
-#    define TIMER_SYNC_SYNCWT4_TB      TIMER_SYNC_SYNCWT4(TIMER_SYNC_SYNCT_TB)
-#    define TIMER_SYNC_SYNCWT4_TATB    TIMER_SYNC_SYNCWT4(TIMER_SYNC_SYNCT_TATB)
+#    define TIMER_SYNC_SYNCWT4_NONE    TIMER_SYNC_SYNCWT4(TIMER_SYNC_NONE)
+#    define TIMER_SYNC_SYNCWT4_TA      TIMER_SYNC_SYNCWT4(TIMER_SYNC_TA)
+#    define TIMER_SYNC_SYNCWT4_TB      TIMER_SYNC_SYNCWT4(TIMER_SYNC_TB)
+#    define TIMER_SYNC_SYNCWT4_TATB    TIMER_SYNC_SYNCWT4(TIMER_SYNC_TATB)
 #  define TIMER_SYNC_SYNCWT5_SHIFT     (22)      /* Synchronize WTM 32/64-Bit wide timer 5 */
 #  define TIMER_SYNC_SYNCWT5_MASK      (3 << )
 #    define TIMER_SYNC_SYNCWT5(n)      ((uint32_t)(n) << TIMER_SYNC_SYNCWT5_SHIFT)
-#    define TIMER_SYNC_SYNCWT5_NONE    TIMER_SYNC_SYNCWT5(TIMER_SYNC_SYNCT_NONE)
-#    define TIMER_SYNC_SYNCWT5_TA      TIMER_SYNC_SYNCWT5(TIMER_SYNC_SYNCT_TA)
-#    define TIMER_SYNC_SYNCWT5_TB      TIMER_SYNC_SYNCWT5(TIMER_SYNC_SYNCT_TB)
-#    define TIMER_SYNC_SYNCWT5_TATB    TIMER_SYNC_SYNCWT5(TIMER_SYNC_SYNCT_TATB)
+#    define TIMER_SYNC_SYNCWT5_NONE    TIMER_SYNC_SYNCWT5(TIMER_SYNC_NONE)
+#    define TIMER_SYNC_SYNCWT5_TA      TIMER_SYNC_SYNCWT5(TIMER_SYNC_TA)
+#    define TIMER_SYNC_SYNCWT5_TB      TIMER_SYNC_SYNCWT5(TIMER_SYNC_TB)
+#    define TIMER_SYNC_SYNCWT5_TATB    TIMER_SYNC_SYNCWT5(TIMER_SYNC_TATB)
 #endif
 
 /* GPTM Interrupt Mask (IMR) */
@@ -718,6 +718,7 @@
 #  define TIMER_IMR_CAEIM              (1 << 2)  /* Bit 2:  GPTM Timer A Capture Mode Event Interrupt Mask */
 #  define TIMER_IMR_RTCIM              (1 << 3)  /* Bit 3:  GPTM RTC Interrupt Mask */
 #  define TIMER_IMR_TAMIM              (1 << 4)  /* Bit 4:  GPTM Timer A Match Interrupt Mask */
+#endif
 
 #if defined(CONFIG_ARCH_CHIP_TM4C129)
 #  define TIMER_IMR_DMAAIM             (1 << 5)  /* Bit 5:  GPTM Timer A DMA Done Interrupt Mask */
diff --git a/nuttx/arch/arm/src/tiva/tiva_timer.c b/nuttx/arch/arm/src/tiva/tiva_timer.c
index 858f1de32..4f15c93e0 100644
--- a/nuttx/arch/arm/src/tiva/tiva_timer.c
+++ b/nuttx/arch/arm/src/tiva/tiva_timer.c
@@ -50,6 +50,7 @@
 
 #include "up_arch.h"
 #include "chip/tiva_syscontrol.h"
+#include "chip/tiva_timer.h"
 
 #include "tiva_enableclks.h"
 #include "tiva_enablepwr.h"
@@ -298,10 +299,12 @@ static int tiva_oneshot_periodic_mode32(struct tiva_gptmstate_s *priv,
    *    NOTE: The TAEN bit was cleared when the timer was reset prior to
    *    calling this function.
    *
-   * 2. Write the GPTM Configuration Register (GPTMCFG) with a value of
-   *    0x0000.0000.
+   * 2. Write the GPTM Configuration Register (GPTMCFG) to select 32-bit
+   *    operation.
    */
 
+   tiva_putreg(priv, TIVA_TIMER_CFG_OFFSET, TIMER_CFG_CFG_32);
+
   /* 3. Configure the TnMR field in the GPTM Timer n Mode Register
    *   (GPTMTnMR):
    *    a. Write a value of 0x1 for One-Shot mode.
@@ -359,11 +362,13 @@ static int tiva_oneshot_periodic_mode16(struct tiva_gptmstate_s *priv,
    *    NOTE: The TnEN bit was cleared when the timer was reset prior to
    *    calling this function.
    *
-   * 2. Write the GPTM Configuration Register (GPTMCFG) with a value of
-   *    0x0000.0000.
-   */
-
-  /* 3. Configure the TnMR field in the GPTM Timer n Mode Register
+   * 2. Write the GPTM Configuration Register (GPTMCFG) to select 16-bit
+   *    operation.
+   *
+   *    NOTE: 16-bit mode of operation was already selected in
+   *    tiva_gptm_configure() before this function was called.
+   *
+   * 3. Configure the TnMR field in the GPTM Timer n Mode Register
    *   (GPTMTnMR):
    *    a. Write a value of 0x1 for One-Shot mode.
    *    b. Write a value of 0x2 for Periodic mode.
@@ -422,11 +427,15 @@ static int tiva_rtc_mode32(struct tiva_gptmstate_s *priv,
    * 2. If the timer has been operating in a different mode prior to this,
    *    clear any residual set bits in the GPTM Timer n Mode (GPTMTnMR)
    *    register before reconfiguring.
+   *
+   *    NOTE: The TAMR and TBMR registers were cleared when the timer
+   *    was reset prior to calling this function.
+   *
+   * 3. Write the GPTM Configuration Register (GPTMCFG) with a to select
+   *    the 32-bit RTC mode.
    */
 
-  /* 3. Write the GPTM Configuration Register (GPTMCFG) with a value of
-   *    0x0000.0001.
-   */
+   tiva_putreg(priv, TIVA_TIMER_CFG_OFFSET, TIMER_CFG_CFG_RTC);
 
   /* 4. Write the match value to the GPTM Timer n Match Register
    *    (GPTMTnMATCHR).
@@ -477,11 +486,13 @@ static int tiva_input_edgecount_mode16(struct tiva_gptmstate_s *priv,
    *    NOTE: The TnEN bit was cleared when the timer was reset prior to
    *    calling this function.
    *
-   * 2. Write the GPTM Configuration (GPTMCFG) register with a value of
-   *    0x0000.0004.
-   */
-
-  /* 3. In the GPTM Timer Mode (GPTMTnMR) register, write the TnCMR field to
+   * 2. Write the GPTM Configuration Register (GPTMCFG) to select 16-bit
+   *    operation.
+   *
+   *    NOTE: 16-bit mode of operation was already selected in
+   *    tiva_gptm_configure() before this function was called.
+   *
+   * 3. In the GPTM Timer Mode (GPTMTnMR) register, write the TnCMR field to
    *    0x0 and the TnMR field to 0x3.
    */
 
@@ -542,18 +553,30 @@ static int tiva_input_time_mode16(struct tiva_gptmstate_s *priv,
    *    NOTE: The TnEN bit was cleared when the timer was reset prior to
    *    calling this function.
    *
-   * 2. Write the GPTM Configuration (GPTMCFG) register with a value of
-   *    0x0000.0004.
+   * 2. Write the GPTM Configuration Register (GPTMCFG) to select 16-bit
+   *    operation.
+   *
+   *    NOTE: 16-bit mode of operation was already selected in
+   *    tiva_gptm_configure() before this function was called.
+   *
    * 3. In the GPTM Timer Mode (GPTMTnMR) register, write the TnCMR field to
    *    0x1 and the TnMR field to 0x3 and select a count direction by
    *    programming the TnCDIR bit.
-   * 4. Configure the type of event that the timer captures by writing the
+   */
+
+  /* 4. Configure the type of event that the timer captures by writing the
    *    TnEVENT field of the GPTM Control (GPTMCTL) register.
-   * 5. If a prescaler is to be used, write the prescale value to the GPTM
+   */
+
+  /* 5. If a prescaler is to be used, write the prescale value to the GPTM
    *    Timer n Prescale Register (GPTMTnPR).
-   * 6. Load the timer start value into the GPTM Timer n Interval Load
+   */
+
+  /* 6. Load the timer start value into the GPTM Timer n Interval Load
    *    (GPTMTnILR) register.
-   * 7. If interrupts are required, set the CnEIM bit in the GPTM Interrupt
+   */
+
+  /* 7. If interrupts are required, set the CnEIM bit in the GPTM Interrupt
    *    Mask (GPTMIMR) register.
    */
 #warning Missing Logic
@@ -598,11 +621,13 @@ static int tiva_pwm_mode16(struct tiva_gptmstate_s *priv,
    *    NOTE: The TnEN bit was cleared when the timer was reset prior to
    *    calling this function.
    *
-   * 2. Write the GPTM Configuration (GPTMCFG) register with a value of
-   *    0x0000.0004.
-   */
-
-  /* 3. In the GPTM Timer Mode (GPTMTnMR) register, set the TnAMS bit to
+   * 2. Write the GPTM Configuration Register (GPTMCFG) to select 16-bit
+   *    operation.
+   *
+   *    NOTE: 16-bit mode of operation was already selected in
+   *    tiva_gptm_configure() before this function was called.
+   *
+   * 3. In the GPTM Timer Mode (GPTMTnMR) register, set the TnAMS bit to
    *    0x1, the TnCMR bit to 0x0, and the TnMR field to 0x2.
    */
 
@@ -682,6 +707,8 @@ static int tiva_timer16_configure(struct tiva_gptmstate_s *priv,
                                   const struct tiva_timer16config_s *timer,
                                   int tmndx)
 {
+  /* Configure the timer per the selected mode */
+
   switch (timer->mode)
     {
     case TIMER16_MODE_NONE:
@@ -834,6 +861,31 @@ TIMER_HANDLE tiva_gptm_configure(const struct tiva_gptmconfig_s *gptm)
   while (!tiva_emac_periphrdy());
   up_udelay(250);
 
+  /* Select the alternal timer clock source is so reuested.  The general
+   * purpose timer has the capability of being clocked by either the system
+   * clock or an alternate clock source. By setting the ALTCLK bit in the
+   * GPTM Clock Configuration (GPTMCC) register, software can selects an
+   * alternate clock source as programmed in the Alternate Clock
+   * Configuration (ALTCLKCFG) register in the System Control Module. The
+   * alternate clock source options available are PIOSC, RTCOSC and LFIOSC.
+   *
+   * NOTE: The actual alternate clock source selection is a global property
+   * and cannot be configure on a timer-by-timer basis here.  That selection
+   * must be done by common logic early in the initialization sequence.
+   *
+   * In any case, the caller must provide us with the correct source
+   * frequency in gptm->frequency field.
+   */
+
+  if (gptm->alternate)
+    {
+      /* Enable the alternate clock source */
+
+      regval  = tiva_getreg(priv, TIVA_TIMER_CC_OFFSET);
+      regval |= TIMER_CC_ALTCLK;
+      tiva_putreg(priv, TIVA_TIMER_CC_OFFSET, regval);
+    }
+
   /* Then [re-]configure the timer into the new configuration */
 
   if (gptm->mode != TIMER16_MODE)
@@ -850,6 +902,12 @@ TIMER_HANDLE tiva_gptm_configure(const struct tiva_gptmconfig_s *gptm)
       const struct tiva_gptm16config_s *gptm16 =
         (const struct tiva_gptm16config_s *)gptm;
 
+      /* Write the GPTM Configuration Register (GPTMCFG) to select 16-bit
+       * operation.
+       */
+
+      tiva_putreg(priv, TIVA_TIMER_CFG_OFFSET, TIMER_CFG_CFG_16);
+
       /* Configure both 16-bit timers */
 
       ret = tiva_timer16_configure(priv, &gptm16->config[TIMER_A], TIMER_A);
diff --git a/nuttx/arch/arm/src/tiva/tiva_timer.h b/nuttx/arch/arm/src/tiva/tiva_timer.h
index b645eddb7..5ccd8b834 100644
--- a/nuttx/arch/arm/src/tiva/tiva_timer.h
+++ b/nuttx/arch/arm/src/tiva/tiva_timer.h
@@ -47,6 +47,8 @@
 
 #include <arch/tiva/chip.h>
 
+#include "chip/tiva_timer.h"
+
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
@@ -115,16 +117,6 @@ enum tiva_timer16mode_e
   TIMER16_MODE_PWM               /* 16-bit PWM output mode w/8-bit prescaler */
 };
 
-/* This enumeration describes the timer clock source */
-
-enum tiva_timersource_e
-{
-  TIMER_SOURCE_SYSCLK = 0,       /* Timer clock source is SysClk */
-  TIMER_SOURCE_PIOSC,            /* Timer clock source is PIOSC */
-  TIMER_SOURCE_RTCOSC,           /* Source is  Hibernation Module Real-time clock */
-  TIMER_SOURCE_LFIOSC            /* Timer clock source is LFI oscillator */
-};
-
 /* This structure describes the configuration of one 32-bit timer */
 
 struct tiva_timer32config_s
@@ -147,8 +139,9 @@ struct tiva_timer16config_s
 struct tiva_gptmconfig_s
 {
   uint8_t gptm;                  /* GPTM number */
-  uint8_t source;                /* See enum tiva_timersource_e */
   uint8_t mode;                  /* See enum tiva_timer32mode_e */
+  uint8_t alternate;             /* False: Use SysClk; True: Use alternate clock source */
+  uint32_t frequency;            /* Frequency of the selected clock source */
 };
 
 /* This structure is cast compatible with struct tiva_gptmconfig_s and