From 8a493edc7b8be421fb15f61f717ec2bd41ff52bc Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 9 Jan 2015 16:49:00 -0600 Subject: Tiva Timer: Add support for input clock prescaler in 16-bit one-shot/periodic modes --- nuttx/arch/arm/src/tiva/chip/tiva_timer.h | 12 ------------ nuttx/arch/arm/src/tiva/tiva_timer.c | 13 +++++++++---- nuttx/arch/arm/src/tiva/tiva_timer.h | 1 + 3 files changed, 10 insertions(+), 16 deletions(-) diff --git a/nuttx/arch/arm/src/tiva/chip/tiva_timer.h b/nuttx/arch/arm/src/tiva/chip/tiva_timer.h index f5253842b..9e91a3c91 100644 --- a/nuttx/arch/arm/src/tiva/chip/tiva_timer.h +++ b/nuttx/arch/arm/src/tiva/chip/tiva_timer.h @@ -725,24 +725,12 @@ #define TIMER_TnPR_TnPSR_MASK (0xff << TIMER_TnPR_TnPSR_SHIFT) # define TIMER_TnPR_TnPSR(n) ((uint32_t)(n) << TIMER_TnPR_TnPSR_SHIFT) -#if 0 -# define TIMER_TnPR_TnPSRH_SHIFT (8) /* Bits 8-15: GPTM Timer A/B Prescale High word */ -# define TIMER_TnPR_TnPSRH_MASK (0xff << TIMER_TnPR_TnPSRH_SHIFT) -# define TIMER_TnPR_TnPSRH(n) ((uint32_t)(n) << TIMER_TnPR_TnPSRH_SHIFT) -#endif - /* GPTM Timer A/B Prescale Match (TnPMR) */ #define TIMER_TnPMR_TnPSMR_SHIFT (0) /* Bits 0-8: GPTM Timer A/B Prescale Match */ #define TIMER_TnPMR_TnPSMR_MASK (0xff << TIMER_TnPMR_TnPSMR_SHIFT) # define TIMER_TnPMR_TnPSMR(n) ((uint32_t)(n) << TIMER_TnPMR_TnPSMR_SHIFT) -#if 0 -# define TIMER_TnPMR_TnPSMRH_SHIFT (8) /* Bits 8-15: GPTM Timer A/B Prescale Match High word */ -# define TIMER_TnPMR_TnPSMRH_MASK (0xff << TIMER_TnPMR_TnPSMRH_SHIFT) -# define TIMER_TnPMR_TnPSMRH(n) ((uint32_t)(n) << TIMER_TnPMR_TnPSMRH_SHIFT) -#endif - /* GPTM Timer A (TAR) (32-bit value) */ /* GPTM Timer B (TBR) (32-bit value) */ /* GPTM Timer A Value (TAV) (32-bit value) */ diff --git a/nuttx/arch/arm/src/tiva/tiva_timer.c b/nuttx/arch/arm/src/tiva/tiva_timer.c index a7e289f7c..31b18a871 100644 --- a/nuttx/arch/arm/src/tiva/tiva_timer.c +++ b/nuttx/arch/arm/src/tiva/tiva_timer.c @@ -88,7 +88,7 @@ struct tiva_gptmstate_s /* Variable state values */ - uint32_t frequency; /* Frequency of the input clock */ + uint32_t clkin; /* Frequency of the input clock */ uint32_t imr; /* Interrupt mask value. Zero if no interrupts */ #ifdef CONFIG_TIVA_TIMER_REGDEBUG @@ -975,12 +975,17 @@ static int tiva_oneshot_periodic_mode16(struct tiva_gptmstate_s *priv, */ #warning Missing Logic + /* Set the input clock pre-scaler value */ + + regoffset = tmndx ? TIVA_TIMER_TBPR_OFFSET : TIVA_TIMER_TAPR_OFFSET; + tiva_putreg(priv, regoffset, (uint32_t)timer->u.periodic.prescaler); + /* 5. Load the start value into the GPTM Timer n Interval Load Register * (GPTMTnILR). */ regoffset = tmndx ? TIVA_TIMER_TBILR_OFFSET : TIVA_TIMER_TAILR_OFFSET; - tiva_putreg(priv, regoffset, timer->u.periodic.interval); + tiva_putreg(priv, regoffset, (uint32_t)timer->u.periodic.interval); /* 6. If interrupts are required, set the appropriate bits in the GPTM * Interrupt Mask Register (GPTMIMR). @@ -1504,13 +1509,13 @@ TIMER_HANDLE tiva_gptm_configure(const struct tiva_gptmconfig_s *config) /* Remember the frequency of the input clock */ - priv->frequency = ALTCLK_FREQUENCY; + priv->clkin = ALTCLK_FREQUENCY; } else { /* Remember the frequency of the input clock */ - priv->frequency = SYSCLK_FREQUENCY; + priv->clkin = SYSCLK_FREQUENCY; } /* Then [re-]configure the timer into the new configuration */ diff --git a/nuttx/arch/arm/src/tiva/tiva_timer.h b/nuttx/arch/arm/src/tiva/tiva_timer.h index 5b9f8a3e6..6d6fa80cf 100644 --- a/nuttx/arch/arm/src/tiva/tiva_timer.h +++ b/nuttx/arch/arm/src/tiva/tiva_timer.h @@ -200,6 +200,7 @@ struct tiva_timer16config_s struct { + uint8_t prescaler; /* Prescaler-1: 0-255 corresponding to 1-256 */ uint16_t interval; /* Value for interval load register */ } periodic; -- cgit v1.2.3