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| author | Andrew Tridgell <andrew@tridgell.net> | 2014-12-30 16:07:47 +1100 |
|---|---|---|
| committer | Thomas Gubler <thomasgubler@gmail.com> | 2014-12-30 20:55:57 +0100 |
| commit | a8cea3a4da89457b3a8fc0fbb424a6af055453f0 (patch) | |
| tree | 5cc4467fd9bccfd33d748fb292255caeb589807e | |
| parent | b455d647b264ebe3390bbc1a3077de3117c1a1dd (diff) | |
| download | px4-firmware-a8cea3a4da89457b3a8fc0fbb424a6af055453f0.tar.gz px4-firmware-a8cea3a4da89457b3a8fc0fbb424a6af055453f0.tar.bz2 px4-firmware-a8cea3a4da89457b3a8fc0fbb424a6af055453f0.zip | |
l3gd20: use the I2C disable bit on l3gd20H
this seems to prevent a mpu6000 reset from causing an issue on the
l3gd20H
| -rw-r--r-- | src/drivers/l3gd20/l3gd20.cpp | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/src/drivers/l3gd20/l3gd20.cpp b/src/drivers/l3gd20/l3gd20.cpp index 63974a7df..3a0c05c9e 100644 --- a/src/drivers/l3gd20/l3gd20.cpp +++ b/src/drivers/l3gd20/l3gd20.cpp @@ -142,6 +142,7 @@ static const int ERROR = -1; #define ADDR_INT1_TSH_ZH 0x36 #define ADDR_INT1_TSH_ZL 0x37 #define ADDR_INT1_DURATION 0x38 +#define ADDR_LOW_ODR 0x39 /* Internal configuration values */ @@ -244,7 +245,7 @@ private: // this is used to support runtime checking of key // configuration registers to detect SPI bus errors and sensor // reset -#define L3GD20_NUM_CHECKED_REGISTERS 7 +#define L3GD20_NUM_CHECKED_REGISTERS 8 static const uint8_t _checked_registers[L3GD20_NUM_CHECKED_REGISTERS]; uint8_t _checked_values[L3GD20_NUM_CHECKED_REGISTERS]; uint8_t _checked_next; @@ -375,7 +376,8 @@ const uint8_t L3GD20::_checked_registers[L3GD20_NUM_CHECKED_REGISTERS] = { ADDR_ ADDR_CTRL_REG3, ADDR_CTRL_REG4, ADDR_CTRL_REG5, - ADDR_FIFO_CTRL_REG }; + ADDR_FIFO_CTRL_REG, + ADDR_LOW_ODR }; L3GD20::L3GD20(int bus, const char* path, spi_dev_e device, enum Rotation rotation) : SPI("L3GD20", path, bus, device, SPIDEV_MODE3, 11*1000*1000 /* will be rounded to 10.4 MHz, within margins for L3GD20 */), @@ -844,6 +846,11 @@ L3GD20::disable_i2c(void) uint8_t a = read_reg(0x05); write_reg(0x05, (0x20 | a)); if (read_reg(0x05) == (a | 0x20)) { + // this sets the I2C_DIS bit on the + // L3GD20H. The l3gd20 datasheet doesn't + // mention this register, but it does seem to + // accept it. + write_checked_reg(ADDR_LOW_ODR, 0x08); return; } } |