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authorGregory Nutt <gnutt@nuttx.org>2015-04-04 19:04:29 -0600
committerGregory Nutt <gnutt@nuttx.org>2015-04-04 19:04:29 -0600
commit7f9d3016cbac11a39083fe4d42625fe65c0d3666 (patch)
tree4e5138f7430ea45d05b65beab4fb99ae8db18815
parent432cabb07c8718b6a24be78fbc992ee702a2785e (diff)
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SAMV7: Apparently the data sheet is wrong, SDRAM clocking must be enabled at the PMC or the SDRAM does not work! The data sheet says that there is no clock control for SDRAMC
-rw-r--r--nuttx/arch/arm/src/samv7/samv71_periphclks.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/nuttx/arch/arm/src/samv7/samv71_periphclks.h b/nuttx/arch/arm/src/samv7/samv71_periphclks.h
index 6a360dba4..60ed117fe 100644
--- a/nuttx/arch/arm/src/samv7/samv71_periphclks.h
+++ b/nuttx/arch/arm/src/samv7/samv71_periphclks.h
@@ -118,7 +118,7 @@
#define sam_isi_enableclk() sam_enableperiph1(SAM_PID_ISI)
#define sam_pwm1_enableclk() sam_enableperiph1(SAM_PID_PWM1)
#define sam_fpu_enableclk()
-#define sam_sdramc_enableclk()
+#define sam_sdramc_enableclk() sam_enableperiph1(SAM_PID_SDRAMC)
#define sam_wdt1_enableclk()
#define sam_ccw_enableclk()
@@ -186,7 +186,7 @@
#define sam_isi_disableclk() sam_disableperiph1(SAM_PID_ISI)
#define sam_pwm1_disableclk() sam_disableperiph1(SAM_PID_PWM1)
#define sam_fpu_disableclk()
-#define sam_sdramc_disableclk()
+#define sam_sdramc_disableclk() sam_disableperiph1(SAM_PID_SDRAMC)
#define sam_wdt1_disableclk()
#define sam_ccw_disableclk()