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* Prep for NuttX-6.29 releasenuttx-6.29Gregory Nutt2013-07-314-637/+678
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* SAMA5: Delay loop calibrated; Correct sense of the RED LEDGregory Nutt2013-07-319-22/+59
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* SAMA5: Add an NSH configuration of the SAMA5D3x-EK boardGregory Nutt2013-07-319-24/+1291
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* SAMA5: Modification of some CPSR-related inline functionsGregory Nutt2013-07-313-11/+27
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* Fix Cortex-A CPSR register field definitionGregory Nutt2013-07-304-23/+28
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* SAMA5: Change mapping of vector tables to work around that fact that I don't ↵Gregory Nutt2013-07-304-5/+70
| | | | understand how the AXI MATRIX remap works
* ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and ↵Gregory Nutt2013-07-303-17/+70
| | | | caches; Should not remap ISRAM to address 0x0 unless we booted into ISRAM
* The last bit of a previous commit was still in the editorGregory Nutt2013-07-301-9/+2
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* More DAC changes from John WharingtonGregory Nutt2013-07-301-1/+3
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* Add ARMv7-A irqdisable() inline functionGregory Nutt2013-07-304-18/+62
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* STM32 F3 I2C driver from John WharingtonGregory Nutt2013-07-305-92/+2315
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* STM32 DAC DMA fixes from John WharingtonGregory Nutt2013-07-307-44/+362
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* SAMA5: More cache and mmu inline utility functionsGregory Nutt2013-07-295-11/+265
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* SAMA5: Separate cache operations into separate filesGregory Nutt2013-07-298-305/+524
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* Changes to ARMv7-A boot logic to handle the case where we execute out of NOR ↵Gregory Nutt2013-07-297-70/+139
| | | | FLASH
* SAMA5: Add a little NuttX debug program to help debugger programs in NOR flashGregory Nutt2013-07-299-23/+1013
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* Add SAMA5 HSMC register definitions and logic to reconfigure the NOR FLASHGregory Nutt2013-07-293-2/+607
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* SAMA5: Add file structure to support board-specific initialization of NOR flashGregory Nutt2013-07-299-22/+286
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* SAMA5: The ostest configuration have been converted to run out of NOR flash. ↵Gregory Nutt2013-07-2815-91/+313
| | | | There is more to be done, however
* SAMA5: Correct a clock configuration bug; clarify some MMU memory typesGregory Nutt2013-07-284-27/+88
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* SAMA5: Correct vector mappingGregory Nutt2013-07-285-96/+111
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* Removed unused ARMv7-A cache functionGregory Nutt2013-07-273-51/+42
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* SAMA5: Fix heap allocation bugsGregory Nutt2013-07-277-44/+38
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* SAMA5 page table is cached; need to flush the cache each time that the page ↵Gregory Nutt2013-07-275-362/+394
| | | | table is updated
* Correct an error in Cortex-A5 intermediate MMU mappingGregory Nutt2013-07-267-16/+56
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* Add a hello world configuration to help with the SAMA5 bringupGregory Nutt2013-07-2612-13/+931
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* Finally... renamed all CONFIG_DRAM_ settings to CONFIG_RAM_Gregory Nutt2013-07-26327-876/+881
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* SAMA5: If the page table is in high memory, make sure that it is excluded ↵Gregory Nutt2013-07-263-29/+63
| | | | from the heap
* Fix some bad page table definitions of last commitGregory Nutt2013-07-252-26/+26
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* Misc Cortex-A5 MMU-related fix -- still does not bootGregory Nutt2013-07-259-169/+293
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* Fix an uninitialized register error that crept into the ARM9 start up code ↵Gregory Nutt2013-07-244-114/+158
| | | | many years ago and was recently cloned into the Cortex-A5. Obviously no on has used NuttX with ARM9 for years
* Fix SAMA5 vector linking issueGregory Nutt2013-07-244-4/+5
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* Update SAMA5D3x-EK board configuration to support on-board UART connections, ↵Gregory Nutt2013-07-2412-85/+780
| | | | LEDs, and push buttons
* Revamp the way external memory regions are configured; Add logic to add ↵Gregory Nutt2013-07-2454-407/+1350
| | | | SAMA5 external memory regions to the heap
* Improve Cortex-A5 context switching so that a little less copying is doneGregory Nutt2013-07-2419-64/+187
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* ARMv7-N: Fix a copy error introduced in the previous check-inGregory Nutt2013-07-236-23/+62
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* Improve some ARMv7-A/M floating point register save time; Add floating point ↵Gregory Nutt2013-07-2339-147/+693
| | | | register save logic for ARMv7-A
* ARMv7-A: Need 8-byte stack alignment when callign C code from interrupt ↵Gregory Nutt2013-07-233-30/+75
| | | | handlers. This change needs to be ported to other ARM architectures as well
* SAMA5: Adapt clocking for different boot modes. New header files for AXI ↵Gregory Nutt2013-07-2320-226/+744
| | | | matrix, BSC, and SFR
* Add SAMA5D3 pin multiplexing definitionsGregory Nutt2013-07-235-62/+465
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* Add SAMA5 GPIO configuration supportGregory Nutt2013-07-2210-201/+1680
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* Add support SAMA5 UART and serial driverGregory Nutt2013-07-225-2/+2044
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* SAMA5 clock configuration should now agree with Atmel sample code; Added ↵Gregory Nutt2013-07-225-115/+443
| | | | header file with macros to enable and disable peripheral clocking
* Add SAMA5 clock logic. Cloned from SAM3U and not yet verifiedGregory Nutt2013-07-2210-11/+1202
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* SAMA5 interrupt handling logicGregory Nutt2013-07-2210-105/+821
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* SAMA5/Cortex-A: Improve irqsave/restore inlines + add irqenable. Add ↵Gregory Nutt2013-07-215-18/+266
| | | | skeleton file for SAMA5 interrupt management. Also change from last commit that was left in the editor
* Add system timer logic for the SAMA5Gregory Nutt2013-07-216-4/+248
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* Add some preliminary linker scripts in order to begin building the SAMA5 targetGregory Nutt2013-07-214-2/+399
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* A few more Cortex-A5 and SAMA5 filesGregory Nutt2013-07-2116-231/+1833
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* Misc Cortex-A5 changes include new file for cache operationsGregory Nutt2013-07-2014-183/+961
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