From 32ff8af133c4d385a8dd40c756cf9fecaaf407c4 Mon Sep 17 00:00:00 2001 From: patacongo Date: Fri, 10 Apr 2009 23:31:35 +0000 Subject: Add irq initialization git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1696 42af7a65-404d-4744-a932-0658087f49c3 --- nuttx/arch/arm/src/imx/Make.defs | 4 +- nuttx/arch/arm/src/imx/imx_aitc.h | 2 + nuttx/arch/arm/src/imx/imx_irq.c | 143 ++++++++++++++++++++++++++++++++++ nuttx/configs/mx1ads/ostest/defconfig | 7 ++ 4 files changed, 154 insertions(+), 2 deletions(-) create mode 100644 nuttx/arch/arm/src/imx/imx_irq.c diff --git a/nuttx/arch/arm/src/imx/Make.defs b/nuttx/arch/arm/src/imx/Make.defs index d71fb6e75..3d9b67972 100644 --- a/nuttx/arch/arm/src/imx/Make.defs +++ b/nuttx/arch/arm/src/imx/Make.defs @@ -46,8 +46,8 @@ CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \ up_undefinedinsn.c up_usestack.c CHIP_ASRCS = #imx_lowputc.S imx_restart.S -CHIP_CSRCS = imx_boot.c imx_gpio.c imx_allocateheap.c # imx_decodeirq.c \ - #imx_irq.c imx_serial.c imx_timerisr.c imx_framebuffer.c +CHIP_CSRCS = imx_boot.c imx_gpio.c imx_allocateheap.c imx_irq.c \ + # imx_decodeirq.c imx_serial.c imx_timerisr.c imx_framebuffer.c ifeq ($(CONFIG_USBDEV),y) CHIP_CSRCS += imx_usbdev.c diff --git a/nuttx/arch/arm/src/imx/imx_aitc.h b/nuttx/arch/arm/src/imx/imx_aitc.h index 065f24a7d..b73e70fa9 100644 --- a/nuttx/arch/arm/src/imx/imx_aitc.h +++ b/nuttx/arch/arm/src/imx/imx_aitc.h @@ -62,6 +62,7 @@ #define AITC_NIPRIORITY2_OFFSET 0x0034 #define AITC_NIPRIORITY1_OFFSET 0x0038 #define AITC_NIPRIORITY0_OFFSET 0x003c +#define AITC_NIPRIORITY_OFFSET(n) (AITC_NIPRIORITY7_OFFSET + 4*(7-(n))) #define AITC_NIVECSR_OFFSET 0x0040 #define AITC_FIVECSR_OFFSET 0x0044 #define AITC_INTSRCH_OFFSET 0x0048 @@ -91,6 +92,7 @@ #define IMX_AITC_NIPRIORITY2 (IMX_AITC_VBASE + AITC_NIPRIORITY2_OFFSET) #define IMX_AITC_NIPRIORITY1 (IMX_AITC_VBASE + AITC_NIPRIORITY1_OFFSET) #define IMX_AITC_NIPRIORITY0 (IMX_AITC_VBASE + AITC_NIPRIORITY0_OFFSET) +#define IMX_AITC_NIPRIORITY(n) (IMX_AITC_VBASE + AITC_NIPRIORITY_OFFSET(n))) #define IMX_AITC_NIVECSR (IMX_AITC_VBASE + AITC_NIVECSR_OFFSET) #define IMX_AITC_FIVECSR (IMX_AITC_VBASE + AITC_FIVECSR_OFFSET) #define IMX_AITC_INTSRCH (IMX_AITC_VBASE + AITC_INTSRCH_OFFSET) diff --git a/nuttx/arch/arm/src/imx/imx_irq.c b/nuttx/arch/arm/src/imx/imx_irq.c new file mode 100644 index 000000000..2e53db08e --- /dev/null +++ b/nuttx/arch/arm/src/imx/imx_irq.c @@ -0,0 +1,143 @@ +/**************************************************************************** + * arch/arm/src/imc/imx_irq.c + * arch/arm/src/chip/imx_irq.c + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +#include "up_arch.h" +#include "os_internal.h" +#include "up_internal.h" + +/**************************************************************************** + * Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +uint32 *current_regs; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Funtions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_irqinitialize + ****************************************************************************/ + +void up_irqinitialize(void) +{ + /* Clear, disable and configure all interrupts. */ + + putreg32(0, IMX_AITC_INTENABLEH); + putreg32(0, IMX_AITC_INTENABLEL); + + /* currents_regs is non-NULL only while processing an interrupt */ + + current_regs = NULL; + + /* Set masking of normal interrupts by priority. Writing all ones + * (or -1) to the NIMASK register sets the normal interrupt mask to + * -1 and does not disable any normal interrupt priority levels. + */ + +#ifndef CONFIG_SUPPRESS_INTERRUPTS + putreg32(-1, IMX_AITC_NIMASK); /* -1: No priority levels masked */ + + /* Initialize FIQs */ + +#ifdef CONFIG_ARCH_FIQ + up_fiqinitialize(); +#endif + + /* And finally, enable interrupts */ + + irqrestore(SVC_MODE | PSR_F_BIT); +#endif +} + +/**************************************************************************** + * Name: up_disable_irq + * + * Description: + * Disable the IRQ specified by 'irq' + * + ****************************************************************************/ + +void up_disable_irq(int irq) +{ + putreg32(irq, IMX_AITC_INTDISNUM); +} + +/**************************************************************************** + * Name: up_enable_irq + * + * Description: + * Enable the IRQ specified by 'irq' + * + ****************************************************************************/ + +void up_enable_irq(int irq) +{ + putreg32(irq, IMX_AITC_INTENNUM); +} + +/**************************************************************************** + * Name: up_maskack_irq + * + * Description: + * Mask the IRQ and acknowledge it + * + ****************************************************************************/ + +void up_maskack_irq(int irq) +{ + up_disable_irq(irq); +} diff --git a/nuttx/configs/mx1ads/ostest/defconfig b/nuttx/configs/mx1ads/ostest/defconfig index cca4dc73e..0437684df 100644 --- a/nuttx/configs/mx1ads/ostest/defconfig +++ b/nuttx/configs/mx1ads/ostest/defconfig @@ -89,18 +89,25 @@ CONFIG_ARCH_STACKDUMP=y # CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_UART1_SERIAL_CONSOLE=n +CONFIG_UART2_SERIAL_CONSOLE=n CONFIG_UART0_TXBUFSIZE=256 CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART2_TXBUFSIZE=256 CONFIG_UART0_RXBUFSIZE=256 CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART2_RXBUFSIZE=256 CONFIG_UART0_BAUD=115200 CONFIG_UART1_BAUD=115200 +CONFIG_UART2_BAUD=115200 CONFIG_UART0_BITS=8 CONFIG_UART1_BITS=8 +CONFIG_UART2_BITS=8 CONFIG_UART0_PARITY=0 CONFIG_UART1_PARITY=0 +CONFIG_UART2_PARITY=0 CONFIG_UART0_2STOP=0 CONFIG_UART1_2STOP=0 +CONFIG_UART2_2STOP=0 # # General build options -- cgit v1.2.3