From 5d710c2d57fc344e67abe7fb3907a4a81ec3be13 Mon Sep 17 00:00:00 2001 From: patacongo Date: Fri, 8 Apr 2011 19:39:50 +0000 Subject: Add user access to the heap git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3485 42af7a65-404d-4744-a932-0658087f49c3 --- nuttx/arch/arm/src/cortexm3/mpu.h | 79 +++++++++++++++++---------- nuttx/arch/arm/src/cortexm3/up_mpu.c | 24 +++++++- nuttx/arch/arm/src/sam3u/sam3u_allocateheap.c | 23 +++++++- nuttx/arch/arm/src/sam3u/sam3u_internal.h | 16 ++++++ nuttx/arch/arm/src/sam3u/sam3u_mpuinit.c | 17 +++++- 5 files changed, 125 insertions(+), 34 deletions(-) diff --git a/nuttx/arch/arm/src/cortexm3/mpu.h b/nuttx/arch/arm/src/cortexm3/mpu.h index 7cb5970d3..1902a4ee3 100644 --- a/nuttx/arch/arm/src/cortexm3/mpu.h +++ b/nuttx/arch/arm/src/cortexm3/mpu.h @@ -132,6 +132,16 @@ extern "C" { #define EXTERN extern #endif +/**************************************************************************** + * Name: mpu_allocregion + * + * Description: + * Allocate the next region + * + ****************************************************************************/ + +EXTERN unsigned int mpu_allocregion(void); + /**************************************************************************** * Name: mpu_log2regionsize * @@ -222,11 +232,12 @@ static inline void mpu_control(bool enable, bool hfnmiena, bool privdefena) * ****************************************************************************/ -static inline void mpu_userflash(int region, uintptr_t base, size_t size) +static inline void mpu_userflash(uintptr_t base, size_t size) { - uint32_t regval; - uint8_t l2size; - uint8_t subregions; + unsigned int region = mpu_allocregion(); + uint32_t regval; + uint8_t l2size; + uint8_t subregions; /* Select the region */ @@ -259,15 +270,16 @@ static inline void mpu_userflash(int region, uintptr_t base, size_t size) * ****************************************************************************/ -static inline void mpu_privflash(int region, uintptr_t base, size_t size) +static inline void mpu_privflash(uintptr_t base, size_t size) { - uint32_t regval; - uint8_t l2size; - uint8_t subregions; + unsigned int region = mpu_allocregion(); + uint32_t regval; + uint8_t l2size; + uint8_t subregions; /* Select the region */ - putreg32(region, MPU_RNR); + putreg32(mpu_allocregion(), MPU_RNR); /* Select the region base address */ @@ -296,11 +308,12 @@ static inline void mpu_privflash(int region, uintptr_t base, size_t size) * ****************************************************************************/ -static inline void mpu_userintsram(int region, uintptr_t base, size_t size) +static inline void mpu_userintsram(uintptr_t base, size_t size) { - uint32_t regval; - uint8_t l2size; - uint8_t subregions; + unsigned int region = mpu_allocregion(); + uint32_t regval; + uint8_t l2size; + uint8_t subregions; /* Select the region */ @@ -334,11 +347,12 @@ static inline void mpu_userintsram(int region, uintptr_t base, size_t size) * ****************************************************************************/ -static inline void mpu_privintsram(int region, uintptr_t base, size_t size) +static inline void mpu_privintsram(uintptr_t base, size_t size) { - uint32_t regval; - uint8_t l2size; - uint8_t subregions; + unsigned int region = mpu_allocregion(); + uint32_t regval; + uint8_t l2size; + uint8_t subregions; /* Select the region */ @@ -372,11 +386,12 @@ static inline void mpu_privintsram(int region, uintptr_t base, size_t size) * ****************************************************************************/ -static inline void mpu_userextsram(int region, uintptr_t base, size_t size) +static inline void mpu_userextsram(uintptr_t base, size_t size) { - uint32_t regval; - uint8_t l2size; - uint8_t subregions; + unsigned int region = mpu_allocregion(); + uint32_t regval; + uint8_t l2size; + uint8_t subregions; /* Select the region */ @@ -411,11 +426,12 @@ static inline void mpu_userextsram(int region, uintptr_t base, size_t size) * ****************************************************************************/ -static inline void mpu_privextsram(int region, uintptr_t base, size_t size) +static inline void mpu_privextsram(uintptr_t base, size_t size) { - uint32_t regval; - uint8_t l2size; - uint8_t subregions; + unsigned int region = mpu_allocregion(); + uint32_t regval; + uint8_t l2size; + uint8_t subregions; /* Select the region */ @@ -450,11 +466,12 @@ static inline void mpu_privextsram(int region, uintptr_t base, size_t size) * ****************************************************************************/ -static inline void mpu_peripheral(int region, uintptr_t base, size_t size) +static inline void mpu_peripheral(uintptr_t base, size_t size) { - uint32_t regval; - uint8_t l2size; - uint8_t subregions; + unsigned int region = mpu_allocregion(); + uint32_t regval; + uint8_t l2size; + uint8_t subregions; /* Select the region */ @@ -476,7 +493,9 @@ static inline void mpu_peripheral(int region, uintptr_t base, size_t size) ((uint32_t)subregions << MPU_RASR_SRD_SHIFT) | /* Sub-regions */ MPU_RASR_S | /* Shareable */ MPU_RASR_B | /* Bufferable */ - MPU_RASR_AP_RWNO; /* P:RW U:None */ + MPU_RASR_AP_RWNO | /* P:RW U:None */ + MPU_RASR_XN | /* Instruction access disable */ + putreg32(regval, MPU_RASR); } diff --git a/nuttx/arch/arm/src/cortexm3/up_mpu.c b/nuttx/arch/arm/src/cortexm3/up_mpu.c index 12edb9263..215f373d4 100644 --- a/nuttx/arch/arm/src/cortexm3/up_mpu.c +++ b/nuttx/arch/arm/src/cortexm3/up_mpu.c @@ -58,11 +58,15 @@ * regions (0xff), and 0 means all subregions but one (0x00). */ -static void uint8_t g_regionmap[9] = +static const void uint8_t g_regionmap[9] = { 0xff, 0x7f, 0x3f, 0x1f, 0x0f, 0x07, 0x03, 0x01, 0x00 }; +/* The next available region number */ + +static uint8_t g_region; + /**************************************************************************** * Private Functions ****************************************************************************/ @@ -71,6 +75,24 @@ static void uint8_t g_regionmap[9] = * Public Functions ****************************************************************************/ +/**************************************************************************** + * Name: mpu_allocregion + * + * Description: + * Allocate the next region + * + * Assumptions: + * - Regions are never deallocated + * - Regions are only allocated early in initialization, so nothing + * special is require; + * + ****************************************************************************/ + +unsigned int mpu_allocregion(void) +{ + return (unsigned int)g_region++; +} + /**************************************************************************** * Name: mpu_log2regionsize * diff --git a/nuttx/arch/arm/src/sam3u/sam3u_allocateheap.c b/nuttx/arch/arm/src/sam3u/sam3u_allocateheap.c index c8ea98ade..b27f28564 100755 --- a/nuttx/arch/arm/src/sam3u/sam3u_allocateheap.c +++ b/nuttx/arch/arm/src/sam3u/sam3u_allocateheap.c @@ -50,6 +50,7 @@ #include "chip.h" #include "up_arch.h" #include "up_internal.h" +#include "sam3u_internal.h" /**************************************************************************** * Private Definitions @@ -102,9 +103,17 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size) { + size_t size = CONFIG_DRAM_END - g_heapbase; + + /* Return the heap settings */ + up_ledon(LED_HEAPALLOCATE); *heap_start = (FAR void*)g_heapbase; - *heap_size = CONFIG_DRAM_END - g_heapbase; + *heap_size = size; + + /* Allow access to the heap memory */ + + sam3u_mpuheap((uintptr_)g_heapbase, size); } /************************************************************************ @@ -119,10 +128,22 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size) #if CONFIG_MM_REGIONS > 1 void up_addregion(void) { + /* Add the region */ + kmm_addregion((FAR void*)SAM3U_INTSRAM1_BASE, CONFIG_SAM3U_SRAM1_SIZE); + /* Allow access to the heap memory */ + + sam3u_mpuheap(SAM3U_INTSRAM1_BASE, CONFIG_SAM3U_SRAM1_SIZE) + + /* Add the region */ + #if CONFIG_MM_REGIONS > 2 kmm_addregion((FAR void*)SAM3U_NFCSRAM_BASE, CONFIG_SAM3U_NFCSRAM_SIZE); + + /* Allow access to the heap memory */ + + sam3u_mpuheap(SAM3U_NFCSRAM_BASE, CONFIG_SAM3U_NFCSRAM_SIZE) #endif } #endif diff --git a/nuttx/arch/arm/src/sam3u/sam3u_internal.h b/nuttx/arch/arm/src/sam3u/sam3u_internal.h index 2d6bfcf4a..cba96e5c1 100755 --- a/nuttx/arch/arm/src/sam3u/sam3u_internal.h +++ b/nuttx/arch/arm/src/sam3u/sam3u_internal.h @@ -463,6 +463,22 @@ EXTERN void sam3u_userspace(void); #ifndef CONFIG_NUTTX_KERNEL EXTERN void sam3u_mpuinitialize(void); +#else +# define sam3u_mpuinitialize() +#endif + +/**************************************************************************** + * Name: sam3u_mpuheap + * + * Description: + * Map a heap region. + * + ****************************************************************************/ + +#ifndef CONFIG_NUTTX_KERNEL +EXTERN void sam3u_mpuheap(uintptr_t start, size_t size); +#else +# define sam3u_mpuheap(start,size) #endif /************************************************************************************ diff --git a/nuttx/arch/arm/src/sam3u/sam3u_mpuinit.c b/nuttx/arch/arm/src/sam3u/sam3u_mpuinit.c index 2dacd36c8..462f4e80d 100755 --- a/nuttx/arch/arm/src/sam3u/sam3u_mpuinit.c +++ b/nuttx/arch/arm/src/sam3u/sam3u_mpuinit.c @@ -97,13 +97,26 @@ void sam3u_mpuinitialize(void) /* Configure user flash and SRAM space */ - mpu_userflash(0, CONFIG_USER_TEXTSTART, CONFIG_USER_TEXTEND - CONFIG_USER_TEXTSTART); - mpu_userintsram(1, datastart, dataend - datastart); + mpu_userflash(CONFIG_USER_TEXTSTART, CONFIG_USER_TEXTEND - CONFIG_USER_TEXTSTART); + mpu_userintsram(datastart, dataend - datastart); /* Then enable the MPU */ mpu_control(true, false, true); } +/**************************************************************************** + * Name: sam3u_mpuheap + * + * Description: + * Map a heap region (probably needs to extension to handle external SRAM). + * + ****************************************************************************/ + +void sam3u_mpuheap(uintptr_t start, size_t size) +{ + mpu_userintsram(start, size); +} + #endif /* CONFIG_NUTTX_KERNEL */ -- cgit v1.2.3