From cd6eaa5af6142c5a1027a14763df280b5c141999 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 20 Oct 2013 09:24:30 -0600 Subject: SAMA5 WDT driver is now functional --- apps/examples/watchdog/watchdog_main.c | 1 + nuttx/arch/arm/src/sama5/sam_wdt.c | 16 ++++++++++++---- 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/apps/examples/watchdog/watchdog_main.c b/apps/examples/watchdog/watchdog_main.c index 38b4fd241..5dbf4aee4 100644 --- a/apps/examples/watchdog/watchdog_main.c +++ b/apps/examples/watchdog/watchdog_main.c @@ -292,6 +292,7 @@ int wdog_main(int argc, char *argv[]) message("wdog_main: ioctl(WDIOC_GETSTATUS) failed: %d\n", errno); goto errout_with_dev; } + message("wdog_main: flags=%08x timeout=%d timeleft=%d\n", status.flags, status.timeout, status.timeleft); #endif diff --git a/nuttx/arch/arm/src/sama5/sam_wdt.c b/nuttx/arch/arm/src/sama5/sam_wdt.c index e948f3c85..45adceded 100644 --- a/nuttx/arch/arm/src/sama5/sam_wdt.c +++ b/nuttx/arch/arm/src/sama5/sam_wdt.c @@ -452,7 +452,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower, { FAR struct sam_lowerhalf_s *priv = (FAR struct sam_lowerhalf_s *)lower; uint32_t reload; - uint16_t regval; + uint32_t regval; DEBUGASSERT(priv); wdvdbg("Entry: timeout=%d\n", timeout); @@ -511,9 +511,12 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower, regval |= WDT_MR_WDFIEN; #else - /* Reset (everything) if the watchdog timer expires */ + /* Reset (everything) if the watchdog timer expires. + * + * REVISIT: Set WDT_MR_WDRPROC so that only the processor is reset? + */ - regval |= WDT_MR_WDFIEN; + regval |= WDT_MR_WDRSTEN; #endif #ifdef CONFIG_SAMA5_WDT_DEBUGHALT @@ -535,6 +538,11 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower, */ priv->started = true; + + wdvdbg("Setup: CR: %08x MR: %08x SR: %08x\n", + sam_getreg(SAM_WDT_CR), sam_getreg(SAM_WDT_MR), + sam_getreg(SAM_WDT_SR)); + return OK; } @@ -666,7 +674,7 @@ int up_wdginitialize(void) * case. */ - DEBUGASSERT((sam_getreg(SAM_WDT_MR) & WDT_MR_WDDIS) != 0); + DEBUGASSERT((sam_getreg(SAM_WDT_MR) & WDT_MR_WDDIS) == 0); /* No clock setup is required. The Watchdog Timer uses the Slow Clock * divided by 128 to establish the maximum Watchdog period to be 16 seconds -- cgit v1.2.3