From 8085a28d373f0e37292a52fc6579a464b413500a Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 17 Dec 2014 08:19:23 -0600 Subject: Add interrupt definitions for the TM4C129X --- nuttx/arch/arm/include/tiva/cc3200_irq.h | 1 - nuttx/arch/arm/include/tiva/chip.h | 40 ++++----- nuttx/arch/arm/include/tiva/irq.h | 2 + nuttx/arch/arm/include/tiva/lm3s_irq.h | 15 ++-- nuttx/arch/arm/include/tiva/lm4f_irq.h | 3 +- nuttx/arch/arm/include/tiva/tm4c_irq.h | 135 ++++++++++++++++++++++++++++++- 6 files changed, 159 insertions(+), 37 deletions(-) (limited to 'nuttx/arch/arm/include') diff --git a/nuttx/arch/arm/include/tiva/cc3200_irq.h b/nuttx/arch/arm/include/tiva/cc3200_irq.h index e3964e6bc..d55b89ab2 100644 --- a/nuttx/arch/arm/include/tiva/cc3200_irq.h +++ b/nuttx/arch/arm/include/tiva/cc3200_irq.h @@ -268,7 +268,6 @@ # define TIVA_RESERVED_194 (194) /* Vector 194: Reserved */ # define NR_IRQS (195) /* (Really fewer because of reserved vectors) */ -# define NR_VECTORS (155) #else # error "IRQ Numbers not known for this Tiva chip" diff --git a/nuttx/arch/arm/include/tiva/chip.h b/nuttx/arch/arm/include/tiva/chip.h index 39eae9526..c1ab3f29c 100644 --- a/nuttx/arch/arm/include/tiva/chip.h +++ b/nuttx/arch/arm/include/tiva/chip.h @@ -54,8 +54,8 @@ # define LM3S 1 /* LM3S family */ # undef LM4F /* Not LM4F family */ # undef TM4C /* Not TM4C family */ -# define TIVA_NTIMERS 4 /* Four general purpose timers */ -# define TIVA_NWIDETIMERS 0 /* No general purpose wide timers */ +# define TIVA_NTIMERS 4 /* Four 16/32-bit timers */ +# define TIVA_NWIDETIMERS 0 /* No 32/64-bit timers */ # define TIVA_NWDT 1 /* One watchdog timer */ # define TIVA_NETHCONTROLLERS 1 /* One Ethernet controller */ # define TIVA_NLCD 0 /* No LCD controller */ @@ -78,8 +78,8 @@ # define LM3S 1 /* LM3S family */ # undef LM4F /* Not LM4F family */ # undef TM4C /* Not TM4C family */ -# define TIVA_NTIMERS 3 /* Three general purpose timers */ -# define TIVA_NWIDETIMERS 0 /* No general purpose wide timers */ +# define TIVA_NTIMERS 3 /* Three 16/32-bit timers */ +# define TIVA_NWIDETIMERS 0 /* No 32/64-bit timers */ # define TIVA_NWDT 1 /* One watchdog timer */ # define TIVA_NETHCONTROLLERS 1 /* One Ethernet controller */ # define TIVA_NLCD 0 /* No LCD controller */ @@ -102,8 +102,8 @@ # define LM3S 1 /* LM3S family */ # undef LM4F /* Not LM4F family */ # undef TM4C /* Not TM4C family */ -# define TIVA_NTIMERS 4 /* Four general purpose timers */ -# define TIVA_NWIDETIMERS 0 /* No general purpose wide timers */ +# define TIVA_NTIMERS 4 /* Four 16/32-bit timers */ +# define TIVA_NWIDETIMERS 0 /* No 32/64-bit timers */ # define TIVA_NWDT 1 /* One watchdog timer */ # define TIVA_NETHCONTROLLERS 1 /* One Ethernet controller */ # define TIVA_NLCD 0 /* No LCD controller */ @@ -126,8 +126,8 @@ # define LM3S 1 /* LM3S family */ # undef LM4F /* Not LM4F family */ # undef TM4C /* Not TM4C family */ -# define TIVA_NTIMERS 4 /* Four general purpose timers */ -# define TIVA_NWIDETIMERS 0 /* No general purpose wide timers */ +# define TIVA_NTIMERS 4 /* Four 16/32-bit timers */ +# define TIVA_NWIDETIMERS 0 /* No 32/64-bit timers */ # define TIVA_NWDT 1 /* One watchdog timer */ # define TIVA_NETHCONTROLLERS 1 /* One Ethernet controller */ # define TIVA_NLCD 0 /* No LCD controller */ @@ -151,8 +151,8 @@ # define LM3S 1 /* LM3S family */ # undef LM4F /* Not LM4F family */ # undef TM4C /* Not TM4C family */ -# define TIVA_NTIMERS 6 /* Four general purpose timers */ -# define TIVA_NWIDETIMERS 0 /* No general purpose wide timers */ +# define TIVA_NTIMERS 6 /* Four 16/32-bit timers */ +# define TIVA_NWIDETIMERS 0 /* No 32/64-bit timers */ # define TIVA_NWDT 1 /* One watchdog timer */ # define TIVA_NETHCONTROLLERS 1 /* One Ethernet controller */ # define TIVA_NLCD 0 /* No LCD controller */ @@ -174,8 +174,8 @@ # undef LM3S /* Not LM3S family */ # define LM4F 1 /* LM4F family */ # undef TM4C /* Not TM4C family */ -# define TIVA_NTIMERS 6 /* Six general purpose timers */ -# define TIVA_NWIDETIMERS 6 /* Six general purpose wide timers */ +# define TIVA_NTIMERS 6 /* Six 16/32-bit timers */ +# define TIVA_NWIDETIMERS 6 /* Six 32/64-bit timers */ # define TIVA_NWDT 2 /* Two watchdog timer timers */ # define TIVA_NETHCONTROLLERS 0 /* No Ethernet controller */ # define TIVA_NLCD 0 /* No LCD controller */ @@ -198,8 +198,8 @@ # undef LM3S /* Not LM3S family */ # undef LM4F /* Not LM4F family */ # define TM4C 1 /* TM4C family */ -# define TIVA_NTIMERS 6 /* Six general purpose timers */ -# define TIVA_NWIDETIMERS 6 /* Six general purpose wide timers */ +# define TIVA_NTIMERS 6 /* Six 16/32-bit timers */ +# define TIVA_NWIDETIMERS 6 /* Six 32/64-bit timers */ # define TIVA_NWDT 2 /* Two watchdog timers */ # define TIVA_NETHCONTROLLERS 0 /* No Ethernet controller */ # define TIVA_NLCD 0 /* No LCD controller */ @@ -221,8 +221,8 @@ # undef LM3S /* Not LM3S family */ # undef LM4F /* Not LM4F family */ # define TM4C 1 /* TM4C family */ -# define TIVA_NTIMERS 6 /* Six general purpose timers */ -# define TIVA_NWIDETIMERS 6 /* Six general purpose wide timers */ +# define TIVA_NTIMERS 6 /* Six 16/32-bit timers */ +# define TIVA_NWIDETIMERS 6 /* Six 32/64-bit timers */ # define TIVA_NWDT 2 /* Two watchdog timers */ # define TIVA_NETHCONTROLLERS 0 /* No Ethernet controller */ # define TIVA_NLCD 0 /* No LCD controller */ @@ -267,8 +267,8 @@ # undef LM3S /* Not LM3S family */ # undef LM4F /* Not LM4F family */ # define TM4C 1 /* TM4C family */ -# define TIVA_NTIMERS 16 /* Sixteen 16-bit timers OR */ -# define TIVA_NWIDETIMERS 8 /* Eight 32-bit wide timers */ +# define TIVA_NTIMERS 16 /* Sixteen 16/32-bit timers */ +# define TIVA_NWIDETIMERS 0 /* NO 32/64-bit timers */ # define TIVA_NWDT 2 /* Two watchdog timers */ # define TIVA_NETHCONTROLLERS 1 /* One 10/100Mbit Ethernet controller */ # define TIVA_NLCD 1 /* One LCD controller */ @@ -290,8 +290,8 @@ # undef LM3S /* Not LM3S family */ # undef LM4F /* Not LM4F family */ # define TM4C 1 /* TM4C family */ -# define TIVA_NTIMERS 4 /* Four general purpose timers */ -# define TIVA_NWIDETIMERS 2 /* Two general purpose wide timers */ +# define TIVA_NTIMERS 4 /* Four 16/32-bit timers */ +# define TIVA_NWIDETIMERS 2 /* Two 32/64-bit timers */ # define TIVA_NETHCONTROLLERS 0 /* No Ethernet controller */ # define TIVA_NLCD 0 /* No LCD controller */ # define TIVA_NSSI 0 /* No SSI module */ diff --git a/nuttx/arch/arm/include/tiva/irq.h b/nuttx/arch/arm/include/tiva/irq.h index 71a0559c2..62cf1eb67 100644 --- a/nuttx/arch/arm/include/tiva/irq.h +++ b/nuttx/arch/arm/include/tiva/irq.h @@ -109,6 +109,8 @@ # error "Unsupported Stellaris IRQ file" #endif +#define NR_VECTORS (NR_IRQS - 16) + /* GPIO IRQs -- Note that support for individual GPIO ports can * be disabled in order to reduce the size of the implementation. */ diff --git a/nuttx/arch/arm/include/tiva/lm3s_irq.h b/nuttx/arch/arm/include/tiva/lm3s_irq.h index 241ff20a6..cd2d97067 100644 --- a/nuttx/arch/arm/include/tiva/lm3s_irq.h +++ b/nuttx/arch/arm/include/tiva/lm3s_irq.h @@ -118,8 +118,7 @@ # define TIVA_RESERVED_70 (70) /* Vector 70: Reserved */ -# define NR_VECTORS (71) -# define NR_IRQS (60) /* (Really less because of reserved vectors) */ +# define NR_IRQS (71) /* (Really less because of reserved vectors) */ #elif defined(CONFIG_ARCH_CHIP_LM3S6432) # define TIVA_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */ @@ -184,8 +183,7 @@ # define TIVA_RESERVED_70 (70) /* Vector 70: Reserved */ -# define NR_VECTORS (71) -# define NR_IRQS (60) /* (Really less because of reserved vectors) */ +# define NR_IRQS (71) /* (Really less because of reserved vectors) */ #elif defined(CONFIG_ARCH_CHIP_LM3S6965) # define TIVA_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */ @@ -250,8 +248,7 @@ # define TIVA_RESERVED_70 (70) /* Vector 70: Reserved */ -# define NR_VECTORS (71) -# define NR_IRQS (60) /* (Really less because of reserved vectors) */ +# define NR_IRQS (71) /* (Really less because of reserved vectors) */ #elif defined(CONFIG_ARCH_CHIP_LM3S9B96) # define TIVA_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */ @@ -317,8 +314,7 @@ # define TIVA_IRQ_GPIOJ (70) /* Vector 70: GPIO Port J */ # define TIVA_RESERVED_71 (71) /* Vector 71: Reserved */ -# define NR_VECTORS (72) -# define NR_IRQS (71) /* (Really less because of reserved vectors) */ +# define NR_IRQS (72) /* (Really less because of reserved vectors) */ #elif defined(CONFIG_ARCH_CHIP_LM3S8962) # define TIVA_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */ @@ -383,8 +379,7 @@ # define TIVA_RESERVED_70 (70) /* Vector 70: Reserved */ -# define NR_VECTORS (71) -# define NR_IRQS (60) /* (Really less because of reserved vectors) */ +# define NR_IRQS (71) /* (Really less because of reserved vectors) */ #else # error "IRQ Numbers not specified for this Stellaris chip" diff --git a/nuttx/arch/arm/include/tiva/lm4f_irq.h b/nuttx/arch/arm/include/tiva/lm4f_irq.h index d74c6d123..f7a5d3986 100644 --- a/nuttx/arch/arm/include/tiva/lm4f_irq.h +++ b/nuttx/arch/arm/include/tiva/lm4f_irq.h @@ -211,8 +211,7 @@ # define TIVA_RESERVED_153 (153) /* Vector 153: Reserved */ # define TIVA_RESERVED_154 (154) /* Vector 154: Reserved */ -# define NR_VECTORS (155) -# define NR_IRQS (123) /* (Really fewer because of reserved vectors) */ +# define NR_IRQS (155) /* (Really fewer because of reserved vectors) */ #else # error "IRQ Numbers not known for this Stellaris chip" diff --git a/nuttx/arch/arm/include/tiva/tm4c_irq.h b/nuttx/arch/arm/include/tiva/tm4c_irq.h index 87f2b4052..b6545c067 100644 --- a/nuttx/arch/arm/include/tiva/tm4c_irq.h +++ b/nuttx/arch/arm/include/tiva/tm4c_irq.h @@ -210,8 +210,7 @@ # define TIVA_IRQ_PWM1_GEN3 (153) /* Vector 153: PWM1 Generator 3 */ # define TIVA_IRQ_PWM1_FAULT (154) /* Vector 154: PWM1 Fault */ -# define NR_VECTORS (155) -# define NR_IRQS (123) /* (Really fewer because of reserved vectors) */ +# define NR_IRQS (155) /* (Really fewer because of reserved vectors) */ #elif defined(CONFIG_ARCH_CHIP_TM4C123GH6PMI) # define TIVA_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */ @@ -368,8 +367,136 @@ # define TIVA_IRQ_PWM1_GEN3 (153) /* Vector 153: PWM1 Generator 3 */ # define TIVA_IRQ_PWM1_FAULT (154) /* Vector 154: PWM1 Fault */ -# define NR_VECTORS (155) -# define NR_IRQS (123) /* (Really fewer because of reserved vectors) */ +# define NR_IRQS (155) /* (Really fewer because of reserved vectors) */ + +#elif defined(CONFIG_ARCH_CHIP_TM4C129XNC) +# define TIVA_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */ +# define TIVA_IRQ_GPIOB (17) /* Vector 17: GPIO Port B */ +# define TIVA_IRQ_GPIOC (18) /* Vector 18: GPIO Port C */ +# define TIVA_IRQ_GPIOD (19) /* Vector 19: GPIO Port D */ + +# define TIVA_IRQ_GPIOE (20) /* Vector 20: GPIO Port E */ +# define TIVA_IRQ_UART0 (21) /* Vector 21: UART 0 */ +# define TIVA_IRQ_UART1 (22) /* Vector 22: UART 1 */ +# define TIVA_IRQ_SSI0 (23) /* Vector 23: SSI 0 */ +# define TIVA_IRQ_I2C0 (24) /* Vector 24: I2C 0 */ +# define TIVA_IRQ_PWM0_FAULT (25) /* Vector 25: PWM0 Fault */ +# define TIVA_IRQ_PWM0_GEN0 (26) /* Vector 26: PWM0 Generator 0 */ +# define TIVA_IRQ_PWM0_GEN1 (27) /* Vector 27: PWM0 Generator 1 */ +# define TIVA_IRQ_PWM0_GEN2 (28) /* Vector 28: PWM0 Generator 2 */ +# define TIVA_IRQ_QEI0 (29) /* Vector 29: QEI0 */ + +# define TIVA_IRQ_ADC0 (30) /* Vector 30: ADC Sequence 0 */ +# define TIVA_IRQ_ADC1 (31) /* Vector 31: ADC Sequence 1 */ +# define TIVA_IRQ_ADC2 (32) /* Vector 32: ADC Sequence 2 */ +# define TIVA_IRQ_ADC3 (33) /* Vector 33: ADC Sequence 3 */ +# define TIVA_IRQ_WDOG (34) /* Vector 34: Watchdog Timers 0 and 1 */ +# define TIVA_IRQ_TIMER0A (35) /* Vector 35: 16/32-Bit Timer 0 A */ +# define TIVA_IRQ_TIMER0B (36) /* Vector 36: 16/32-Bit Timer 0 B */ +# define TIVA_IRQ_TIMER1A (37) /* Vector 37: 16/32-Bit Timer 1 A */ +# define TIVA_IRQ_TIMER1B (38) /* Vector 38: 16/32-Bit Timer 1 B */ +# define TIVA_IRQ_TIMER2A (39) /* Vector 39: 16/32-Bit Timer 2 A */ + +# define TIVA_IRQ_TIMER2B (40) /* Vector 40: 16/32-Bit Timer 2 B */ +# define TIVA_IRQ_COMPARE0 (41) /* Vector 41: Analog Comparator 0 */ +# define TIVA_IRQ_COMPARE1 (42) /* Vector 42: Analog Comparator 1 */ +# define TIVA_IRQ_COMPARE2 (43) /* Vector 43: Analog Comparator 2 */ +# define TIVA_IRQ_SYSCON (44) /* Vector 44: System Control */ +# define TIVA_IRQ_FLASHCON (45) /* Vector 45: FLASH and EEPROM Control */ +# define TIVA_IRQ_GPIOF (46) /* Vector 46: GPIO Port F */ +# define TIVA_IRQ_GPIOG (47) /* Vector 47: GPIO Port G */ +# define TIVA_IRQ_GPIOH (48) /* Vector 48: GPIO Port H */ +# define TIVA_IRQ_UART2 (49) /* Vector 49: UART 2 */ + +# define TIVA_IRQ_SSI1 (50) /* Vector 50: SSI 1 */ +# define TIVA_IRQ_TIMER3A (51) /* Vector 51: 16/32-Bit Timer 3 A */ +# define TIVA_IRQ_TIMER3B (52) /* Vector 52: 16/32-Bit Timer 3 B */ +# define TIVA_IRQ_I2C1 (53) /* Vector 53: I2C 1 */ +# define TIVA_IRQ_CAN0 (54) /* Vector 54: CAN 0 */ +# define TIVA_IRQ_CAN1 (55) /* Vector 55: CAN 1 */ +# define TIVA_IRQ_ETHCON (56) /* Vector 56: Ethernet MAC */ +# define TIVA_IRQ_HIBERNATE (57) /* Vector 57: Hibernation Module */ +# define TIVA_IRQ_USB (58) /* Vector 58: USB MAC */ +# define TIVA_IRQ_PWM0_GEN3 (59) /* Vector 59: PWM0 Generator 3 */ + +# define TIVA_IRQ_UDMASOFT (60) /* Vector 60: uDMA Software */ +# define TIVA_IRQ_UDMAERROR (61) /* Vector 61: uDMA Error */ +# define TIVA_IRQ_ADC1_0 (62) /* Vector 62: ADC1 Sequence 0 */ +# define TIVA_IRQ_ADC1_1 (63) /* Vector 63: ADC1 Sequence 1 */ +# define TIVA_IRQ_ADC1_2 (64) /* Vector 64: ADC1 Sequence 2 */ +# define TIVA_IRQ_ADC1_3 (65) /* Vector 65: ADC1 Sequence 3 */ +# define TIVA_IRQ_EPI0 (66) /* Vector 66: EPI 0 */ +# define TIVA_IRQ_GPIOJ (67) /* Vector 67: GPIO Port J */ +# define TIVA_IRQ_GPIOK (68) /* Vector 68: GPIO Port K */ +# define TIVA_IRQ_GPIOL (69) /* Vector 69: GPIO Port L */ + +# define TIVA_IRQ_SSI2 (70) /* Vector 70: SSI 2 */ +# define TIVA_IRQ_SSI3 (71) /* Vector 71: SSI 3 */ +# define TIVA_IRQ_UART3 (72) /* Vector 72: UART 3 */ +# define TIVA_IRQ_UART4 (73) /* Vector 73: UART 4 */ +# define TIVA_IRQ_UART5 (74) /* Vector 74: UART 5 */ +# define TIVA_IRQ_UART6 (75) /* Vector 75: UART 6 */ +# define TIVA_IRQ_UART7 (76) /* Vector 76: UART 7 */ +# define TIVA_IRQ_I2C1 (77) /* Vector 77: I2C 2 */ +# define TIVA_IRQ_I2C1 (78) /* Vector 78: I2C 3 */ +# define TIVA_IRQ_TIMER4A (79) /* Vector 79: 16/32-Bit Timer 4 A */ + +# define TIVA_IRQ_TIMER4B (80) /* Vector 80: 16/32-Bit Timer 4 B */ +# define TIVA_IRQ_TIMER5A (81) /* Vector 81: 16/32-Bit Timer 5 A */ +# define TIVA_IRQ_TIMER5B (82) /* Vector 82: 16/32-Bit Timer 5 B */ +# define TIVA_IRQ_FLOAT (83) /* Vector 83: Floating point exception */ +# define TIVA_RESERVED_84 (84) /* Vector 84: Reserved */ +# define TIVA_RESERVED_85 (85) /* Vector 85: Reserved */ +# define TIVA_IRQ_I2C4 (86) /* Vector 86: I2C 4 */ +# define TIVA_IRQ_I2C5 (87) /* Vector 87: I2C 5 */ +# define TIVA_IRQ_GPIOM (88) /* Vector 88: GPIO Port M */ +# define TIVA_IRQ_GPION (89) /* Vector 89: GPIO Port N */ + +# define TIVA_RESERVED_90 (90) /* Vector 90: Reserved */ +# define TIVA_IRQ_TAMPER (91) /* Vector 91: Tamper */ +# define TIVA_IRQ_GPIOP (92) /* Vector 92: GPIO Port P (Summary or P0) */ +# define TIVA_IRQ_GPIOP1 (93) /* Vector 93: GPIO Port P1 */ +# define TIVA_IRQ_GPIOP2 (94) /* Vector 94: GPIO Port P2 */ +# define TIVA_IRQ_GPIOP3 (95) /* Vector 95: GPIO Port P3 */ +# define TIVA_IRQ_GPIOP4 (96) /* Vector 96: GPIO Port P4 */ +# define TIVA_IRQ_GPIOP5 (97) /* Vector 97: GPIO Port P5 */ +# define TIVA_IRQ_GPIOP6 (98) /* Vector 98: GPIO Port P6 */ +# define TIVA_IRQ_GPIOP7 (99) /* Vector 99: GPIO Port P7 */ + +# define TIVA_IRQ_GPIOQ (100) /* Vector 100: GPIO Port Q (Summary or Q0) */ +# define TIVA_IRQ_GPIOQ1 (101) /* Vector 101: GPIO Port Q1 */ +# define TIVA_IRQ_GPIOQ2 (102) /* Vector 102: GPIO Port Q2 */ +# define TIVA_IRQ_GPIOQ3 (103) /* Vector 103: GPIO Port Q3 */ +# define TIVA_IRQ_GPIOQ4 (104) /* Vector 104: GPIO Port Q4 */ +# define TIVA_IRQ_GPIOQ5 (105) /* Vector 105: GPIO Port Q5 */ +# define TIVA_IRQ_GPIOQ6 (106) /* Vector 106: GPIO Port Q6 */ +# define TIVA_IRQ_GPIOQ7 (107) /* Vector 107: GPIO Port Q7 */ +# define TIVA_IRQ_GPIOR (108) /* Vector 108: GPIO Port R */ +# define TIVA_IRQ_GPIOS (109) /* Vector 109: GPIO Port S */ + +# define TIVA_IRQ_SHAMD5 (110) /* Vector 110: SHA/MD5 */ +# define TIVA_IRQ_AES (111) /* Vector 111: AES */ +# define TIVA_IRQ_DES (112) /* Vector 112: DES */ +# define TIVA_IRQ_LCD (113) /* Vector 113: LCD */ +# define TIVA_IRQ_TIMER6A (114) /* Vector 114: 16/32-Bit Timer 6 A */ +# define TIVA_IRQ_TIMER6B (115) /* Vector 115: 16/32-Bit Timer 6 B */ +# define TIVA_IRQ_TIMER7A (116) /* Vector 116: 16/32-Bit Timer 7 A */ +# define TIVA_IRQ_TIMER7B (117) /* Vector 117: 16/32-Bit Timer 7 B */ +# define TIVA_IRQ_I2C6 (118) /* Vector 118: I2C 6 */ +# define TIVA_IRQ_I2C7 (119) /* Vector 119: I2C 7 */ + +# define TIVA_RESERVED_120 (120) /* Vector 120: Reserved */ +# define TIVA_IRQ_1WIRE (121) /* Vector 121: 1-Wire */ +# define TIVA_RESERVED_122 (122) /* Vector 122: Reserved */ +# define TIVA_RESERVED_123 (123) /* Vector 123: Reserved */ +# define TIVA_RESERVED_124 (124) /* Vector 124: Reserved */ +# define TIVA_IRQ_I2C8 (125) /* Vector 125: I2C 8 */ +# define TIVA_IRQ_I2C9 (126) /* Vector 126: I2C 9 */ +# define TIVA_IRQ_GPIOT (127) /* Vector 127: GPIO Port T */ +# define TIVA_RESERVED_128 (128) /* Vector 128: Reserved */ +# define TIVA_RESERVED_129 (129) /* Vector 129: Reserved */ + +# define NR_IRQS (130) /* (Really fewer because of reserved vectors) */ #else # error "IRQ Numbers not known for this Tiva chip" -- cgit v1.2.3