From 57cbf724f159cec88b21281a4ace415276df3a38 Mon Sep 17 00:00:00 2001 From: px4dev Date: Mon, 29 Jul 2013 23:13:46 -0700 Subject: Fix the clock enable register for FMUv2 PWM outputs 1-4. Teach the stm32 pwm driver about the MOE bit on advanced timers. --- src/drivers/boards/px4fmuv2/px4fmu_pwm_servo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/drivers/boards') diff --git a/src/drivers/boards/px4fmuv2/px4fmu_pwm_servo.c b/src/drivers/boards/px4fmuv2/px4fmu_pwm_servo.c index d1656005b..bcbc0010c 100644 --- a/src/drivers/boards/px4fmuv2/px4fmu_pwm_servo.c +++ b/src/drivers/boards/px4fmuv2/px4fmu_pwm_servo.c @@ -53,7 +53,7 @@ __EXPORT const struct pwm_servo_timer pwm_timers[PWM_SERVO_MAX_TIMERS] = { { .base = STM32_TIM1_BASE, - .clock_register = STM32_RCC_APB1ENR, + .clock_register = STM32_RCC_APB2ENR, .clock_bit = RCC_APB2ENR_TIM1EN, .clock_freq = STM32_APB2_TIM1_CLKIN }, -- cgit v1.2.3