From 120cdf19c2827a0d4a0dffadcd4d75d671dab739 Mon Sep 17 00:00:00 2001 From: patacongo Date: Sat, 21 May 2011 00:09:15 +0000 Subject: PIC32 Device Configuration Words git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3635 42af7a65-404d-4744-a932-0658087f49c3 --- nuttx/arch/mips/src/pic32mx/pic32mx-config.h | 185 ++++++++++++++++++++++- nuttx/arch/mips/src/pic32mx/pic32mx-devcfg.h | 4 +- nuttx/arch/mips/src/pic32mx/pic32mx-head.S | 29 ++++ nuttx/arch/mips/src/pic32mx/pic32mx-lowconsole.c | 2 +- nuttx/arch/mips/src/pic32mx/pic32mx-serial.c | 4 +- nuttx/arch/mips/src/pic32mx/pic32mx-timerisr.c | 10 +- nuttx/configs/pcblogic-pic32mx/include/board.h | 34 ++++- 7 files changed, 257 insertions(+), 11 deletions(-) diff --git a/nuttx/arch/mips/src/pic32mx/pic32mx-config.h b/nuttx/arch/mips/src/pic32mx/pic32mx-config.h index 1fb6d3004..c09adbd21 100755 --- a/nuttx/arch/mips/src/pic32mx/pic32mx-config.h +++ b/nuttx/arch/mips/src/pic32mx/pic32mx-config.h @@ -47,6 +47,7 @@ #include "pic32mx-memorymap.h" #include "pic32mx-uart.h" #include "pic32mx-int.h" +#include "pic32mx-devcfg.h" /************************************************************************************ * Pre-processor Definitions @@ -474,7 +475,7 @@ # error "CONFIG_PIC32MX_IOPORTGPRIO is too large" #endif -/* UARTs *****************************************************************************/ +/* UARTs ****************************************************************************/ /* Don't enable UARTs not supported by the chip. */ #if CHIP_NEUARTS < 1 @@ -508,6 +509,188 @@ # undef HAVE_SERIAL_CONSOLE #endif +/* Device Configuration *************************************************************/ +/* DEVCFG3 */ + +#ifndef CONFIG_PIC32MX_USERID +# define CONFIG_PIC32MX_USERID 0x584e /* "NutX" */ +#endif + +#ifndef CONFIG_PIC32MX_SRSSEL +# define CONFIG_PIC32MX_SRSSEL 4 /* Middle priority */ +#endif + +#ifdef CONFIG_PIC32MX_USB +# ifndef CONFIG_PIC32MX_USBIDO +# define CONFIG_PIC32MX_USBIDO 1 /* USBID pin is controlled by the USB module */ +# endif +# ifndef CONFIG_PIC32MX_VBUSIO +# define CONFIG_PIC32MX_VBUSIO 1 /* VBUSON pin is controlled by the USB module */ +# endif +#else +# ifndef CONFIG_PIC32MX_USBIDO +# define CONFIG_PIC32MX_USBIDO 0 /* USBID pin is controlled by the Port function */ +# endif +# ifndef CONFIG_PIC32MX_VBUSIO +# define CONFIG_PIC32MX_VBUSIO 0 /* VBUSON pin is controlled by the Port function */ +# endif +#endif + +/* DEVCFG2 */ + +#undef CONFIG_PIC32MX_PLLIDIV +#if BOARD_PLL_IDIV == 1 +# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV1 +#elif BOARD_PLL_IDIV == 2 +# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV2 +#elif BOARD_PLL_IDIV == 3 +# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV3 +#elif BOARD_PLL_IDIV == 4 +# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV4 +#elif BOARD_PLL_IDIV == 5 +# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV5 +#elif BOARD_PLL_IDIV == 6 +# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV6 +#elif BOARD_PLL_IDIV == 10 +# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV10 +#elif BOARD_PLL_IDIV == 12 +# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV12 +#else +# error "Unsupported BOARD_PLL_IDIV" +#endif + +#undef CONFIG_PIC32MX_PLLMULT +#if BOARD_PLL_MULT == 15 +# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL15 +#elif BOARD_PLL_MULT == 16 +# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL16 +#elif BOARD_PLL_MULT == 17 +# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL17 +#elif BOARD_PLL_MULT == 18 +# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL18 +#elif BOARD_PLL_MULT == 19 +# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL19 +#elif BOARD_PLL_MULT == 20 +# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL20 +#elif BOARD_PLL_MULT == 21 +# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL21 +#elif BOARD_PLL_MULT == 24 +# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL24 +#else +# error "Unsupported BOARD_PLL_MULT" +#endif + +#undef CONFIG_PIC32MX_UPLLIDIV +#if BOARD_UPLL_IDIV == 15 +# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FPLLMULT_MUL15 +#elif BOARD_UPLL_IDIV == 16 +# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FPLLMULT_MUL16 +#elif BOARD_UPLL_IDIV == 17 +# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FPLLMULT_MUL17 +#elif BOARD_UPLL_IDIV == 18 +# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FPLLMULT_MUL18 +#elif BOARD_UPLL_IDIV == 19 +# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FPLLMULT_MUL19 +#elif BOARD_UPLL_IDIV == 20 +# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FPLLMULT_MUL20 +#elif BOARD_UPLL_IDIV == 21 +# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FPLLMULT_MUL21 +#elif BOARD_UPLL_IDIV == 24 +# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FPLLMULT_MUL24 +#else +# error "Unsupported BOARD_UPLL_IDIV" +#endif + +#undef CONFIG_PIC32MX_PLLODIV +#if BOARD_PLL_ODIV == 1 +# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV1 +#elif BOARD_PLL_ODIV == 2 +# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 +#elif BOARD_PLL_ODIV == 4 +# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 +#elif BOARD_PLL_ODIV == 8 +# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 +#elif BOARD_PLL_ODIV == 16 +# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 +#elif BOARD_PLL_ODIV == 32 +# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 +#elif BOARD_PLL_ODIV == 64 +# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 +#elif BOARD_PLL_ODIV == 128 +# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 +#else +# error "Unsupported BOARD_PLL_ODIV" +#endif + +/* DEVCFG1 */ + +#undef CONFIG_PIC32MX_PBDIV +#if BOARD_PBDIV == 1 +# define CONFIG_PIC32MX_PBDIV DEVCFG1_FPBDIV_DIV1 +#elif BOARD_PBDIV == 2 +# define CONFIG_PIC32MX_PBDIV DEVCFG1_FPBDIV_DIV2 +#elif BOARD_PBDIV == 4 +# define CONFIG_PIC32MX_PBDIV DEVCFG1_FPBDIV_DIV4 +#elif BOARD_PBDIV == 8 +# define CONFIG_PIC32MX_PBDIV DEVCFG1_FPBDIV_DIV8 +#else +# error "Unsupported BOARD_PBDIV" +#endif + +#undef CONFIG_PIC32MX_WDPS +#if BOARD_WD_PRESCALER == 1 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_1 +#elif BOARD_WD_PRESCALER == 2 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_2 +#elif BOARD_WD_PRESCALER == 4 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_4 +#elif BOARD_WD_PRESCALER == 8 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_8 +#elif BOARD_WD_PRESCALER == 16 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_16 +#elif BOARD_WD_PRESCALER == 32 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_32 +#elif BOARD_WD_PRESCALER == 64 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_64 +#elif BOARD_WD_PRESCALER == 128 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_128 +#elif BOARD_WD_PRESCALER == 256 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_256 +#elif BOARD_WD_PRESCALER == 512 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_512 +#elif BOARD_WD_PRESCALER == 1024 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_1024 +#elif BOARD_WD_PRESCALER == 2048 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_2048 +#elif BOARD_WD_PRESCALER == 4096 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_4096 +#elif BOARD_WD_PRESCALER == 8192 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_8192 +#elif BOARD_WD_PRESCALER == 16384 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_16384 +#elif BOARD_WD_PRESCALER == 32768 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_32768 +#elif BOARD_WD_PRESCALER == 65536 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_65536 +#elif BOARD_WD_PRESCALER == 131072 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_131072 +#elif BOARD_WD_PRESCALER == 262144 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_262144 +#elif BOARD_WD_PRESCALER == 524288 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_524288 +#elif BOARD_WD_PRESCALER == 1048576 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_1048576 +#else +# error "Unsupported BOARD_WD_PRESCALER" +#endif + +#undef CONFIG_PIC32MX_WDENABLE +#if BOARD_WD_ENABLE +# define CONFIG_PIC32MX_WDENABLE DEVCFG1_FWDTEN +#else +# define CONFIG_PIC32MX_WDENABLE 0 +#endif + /************************************************************************************ * Public Types ************************************************************************************/ diff --git a/nuttx/arch/mips/src/pic32mx/pic32mx-devcfg.h b/nuttx/arch/mips/src/pic32mx/pic32mx-devcfg.h index 6a2edee21..f34ae8a2b 100755 --- a/nuttx/arch/mips/src/pic32mx/pic32mx-devcfg.h +++ b/nuttx/arch/mips/src/pic32mx/pic32mx-devcfg.h @@ -122,7 +122,7 @@ /* Device configuration word 1 */ -#define DEVCFG1_FNOSC_SHIFT (0) /* Bits 0-2: Oscillator xelection */ +#define DEVCFG1_FNOSC_SHIFT (0) /* Bits 0-2: Oscillator selection */ #define DEVCFG1_FNOSC_MASK (7 << DEVCFG1_FNOSC_SHIFT) # define DEVCFG1_FNOSC_FRC (0 << DEVCFG1_FNOSC_SHIFT) /* FRC oscillator */ # define DEVCFG1_FNOSC_FRCPLL (1 << DEVCFG1_FNOSC_SHIFT) /* FRC w/PLL module */ @@ -183,6 +183,8 @@ #define DEVCFG0_DEBUG_SHIFT (0) /* Bits 0-1: Background debugger enable */ #define DEVCFG0_DEBUG_MASK (3 << DEVCFG0_DEBUG_SHIFT) +# define DEVCFG0_DEBUG_ENABLED (2 << DEVCFG0_DEBUG_SHIFT) +# define DEVCFG0_DEBUG_DISABLED (3 << DEVCFG0_DEBUG_SHIFT) #define DEVCFG0_ICESEL (1 << 3) /* Bit 3: ICE/debugger channel select */ #define DEVCFG0_PWP_SHIFT (12) /* Bits 12-19: Program flash write-protect */ #define DEVCFG0_PWP_MASK (0xff << DEVCFG0_PWP_SHIFT) diff --git a/nuttx/arch/mips/src/pic32mx/pic32mx-head.S b/nuttx/arch/mips/src/pic32mx/pic32mx-head.S index b315df2f7..69afafbc0 100644 --- a/nuttx/arch/mips/src/pic32mx/pic32mx-head.S +++ b/nuttx/arch/mips/src/pic32mx/pic32mx-head.S @@ -42,6 +42,7 @@ #include #include +#include "pic32mx-config.h" #include "excptmacros.h" /**************************************************************************** @@ -113,6 +114,7 @@ .globl __reset .global __start .global halt + .global devconfig #if CONFIG_ARCH_INTERRUPTSTACK > 3 .global g_intstackbase .global g_nestlevel @@ -519,6 +521,33 @@ halt: nop .end __start_nuttx + +/**************************************************************************** + * Device Configuration + ****************************************************************************/ + + .section .devcfg, "a" + .type devconfig, object +devconfig: +devconfig3: + .long CONFIG_PIC32MX_USERID << DEVCFG3_USERID_SHIFT | \ + CONFIG_PIC32MX_SRSSEL << DEVCFG3_FSRSSEL_SHIFT | \ + CONFIG_PIC32MX_USBIDO << 30 | \ + CONFIG_PIC32MX_VBUSIO << 31 + +devconfig2: + .long CONFIG_PIC32MX_PLLIDIV | CONFIG_PIC32MX_PLLMULT | \ + CONFIG_PIC32MX_UPLLIDIV | DEVCFG2_FPLLODIV_DIV1 + +devconfig1: + .long DEVCFG1_FNOSC_POSCPLL | DEVCFG1_POSCMOD_XT | \ + CONFIG_PIC32MX_PBDIV | DEVCFG1_FCKSM_NONE | \ + CONFIG_PIC32MX_WDENABLE + +devconfig0: + .long DEVCFG0_DEBUG_DISABLED | DEVCFG0_PWP_DISABLE + .size devconfig, .-devconfig + /**************************************************************************** * Global Data ****************************************************************************/ diff --git a/nuttx/arch/mips/src/pic32mx/pic32mx-lowconsole.c b/nuttx/arch/mips/src/pic32mx/pic32mx-lowconsole.c index da8c0b5cc..b3286715d 100644 --- a/nuttx/arch/mips/src/pic32mx/pic32mx-lowconsole.c +++ b/nuttx/arch/mips/src/pic32mx/pic32mx-lowconsole.c @@ -152,7 +152,7 @@ static void pic32mx_uartsetbaud(uintptr_t uart_base, uint32_t baudrate) * Subject to BRG <= 65536. */ - tmp = BOARD_PERIPHERAL_CLOCK / baudrate; + tmp = BOARD_PBCLOCK / baudrate; /* Try BRGH=1 first. This will select the 4x divisor and will produce the * larger BRG divisor, given all other things equal. diff --git a/nuttx/arch/mips/src/pic32mx/pic32mx-serial.c b/nuttx/arch/mips/src/pic32mx/pic32mx-serial.c index 7545cb189..e35d3e1dd 100644 --- a/nuttx/arch/mips/src/pic32mx/pic32mx-serial.c +++ b/nuttx/arch/mips/src/pic32mx/pic32mx-serial.c @@ -755,7 +755,9 @@ static bool up_txempty(struct uart_dev_s *dev) void up_earlyserialinit(void) { - /* Disable all UARTS */ + /* Disable interrupts from all UARTS. The console is enabled in + * pic32mx_consoleinit() + */ up_disableuartint(TTYS0_DEV.priv, NULL); #ifdef TTYS1_DEV diff --git a/nuttx/arch/mips/src/pic32mx/pic32mx-timerisr.c b/nuttx/arch/mips/src/pic32mx/pic32mx-timerisr.c index 554e57846..1ef888d4e 100755 --- a/nuttx/arch/mips/src/pic32mx/pic32mx-timerisr.c +++ b/nuttx/arch/mips/src/pic32mx/pic32mx-timerisr.c @@ -63,24 +63,24 @@ * register value givent the board's periperhal clock frequency and the * desired system timer frequency: * - * TIMER1_MATCH = BOARD_PERIPHERAL_CLOCK / TIMER1_PRESCALE / CLOCKS_PER_SEC + * TIMER1_MATCH = BOARD_PBCLOCK / TIMER1_PRESCALE / CLOCKS_PER_SEC * * We want the largest possible value for MATCH that is less than 65,535, the * maximum value for the 16-bit timer register: * - * TIMER1_PRESCALE >= BOARD_PERIPHERAL_CLOCK / CLOCKS_PER_SEC / 65535 + * TIMER1_PRESCALE >= BOARD_PBCLOCK / CLOCKS_PER_SEC / 65535 * * Timer 1 does not have very many options for the perscaler value. So we * can pick the best by brute force. Example: * - * BOARD_PERIPHERAL_CLOCK = 40000000 + * BOARD_PBCLOCK = 40000000 * CLOCKS_PER_SEC = 100 * OPTIMAL_PRESCALE = 6 * TIMER1_PRESCALE = 8 * TIMER1_MATCH = 50,000 */ -#define OPTIMAL_PRESCALE (BOARD_PERIPHERAL_CLOCK / CLOCKS_PER_SEC / 65535) +#define OPTIMAL_PRESCALE (BOARD_PBCLOCK / CLOCKS_PER_SEC / 65535) #if OPTIMAL_PRESCALE <= 1 # define TIMER1_CON_TCKPS TIMER1_CON_TCKPS_1 # define TIMER1_PRESCALE 1 @@ -97,7 +97,7 @@ # error "This timer frequency cannot be represented" #endif -#define TIMER1_MATCH (BOARD_PERIPHERAL_CLOCK / TIMER1_PRESCALE / CLOCKS_PER_SEC) +#define TIMER1_MATCH (BOARD_PBCLOCK / TIMER1_PRESCALE / CLOCKS_PER_SEC) /**************************************************************************** * Private Types diff --git a/nuttx/configs/pcblogic-pic32mx/include/board.h b/nuttx/configs/pcblogic-pic32mx/include/board.h index 00fa2f585..b70bbb80e 100755 --- a/nuttx/configs/pcblogic-pic32mx/include/board.h +++ b/nuttx/configs/pcblogic-pic32mx/include/board.h @@ -49,9 +49,39 @@ /* Configuration ************************************************************/ /* Clocking *****************************************************************/ +/* Crystal frequencies */ -#define BOARD_CPU_CLOCK 80000000 -#define BOARD_PERIPHERAL_CLOCK 40000000 +#define BOARD_POSC_XTAL 8000000 /* Primary OSC XTAL frequency (8MHz) */ +#define BOARD_SOSC_XTAL 32768 /* Secondary OSC XTAL frequency (32.768KHz) */ + +/* PLL configuration and resulting CPU clock. + * CPU_CLOCK = ((POSC_XTAL / IDIV) * MULT) / ODIV + */ + +#define BOARD_PLL_IDIV 2 /* PLL input divider */ +#define BOARD_PLL_MULT 20 /* PLL multiplier */ +#define BOARD_PLL_ODIV 1 /* PLL output divider */ + +#define BOARD_CPU_CLOCK 80000000 /* CPU clock (80MHz = 8MHz * 20 / 2) */ + +/* USB PLL configuration. + * USB_CLOCK = ((POSC_XTAL / IDIV) * 24) / 2 + */ + +#define BOARD_UPLL_IDIV 16 /*2*/ /* USB PLL divider (revisit) */ +#define BOARD_USB_CLOCK 48000000 /* USB clock (8MHz / (2*48MHz/24)) */ + +/* Peripheral clock is divided down from CPU clock. + * PBCLOCK = CPU_CLOCK / PBDIV + */ + +#define BOARD_PBDIV 2 /* Peripheral clock divisor (PBDIV) */ +#define BOARD_PBCLOCK 40000000 /* Peripheral clock (PBCLK = 80MHz/2) */ + +/* Watchdog pre-scaler (re-visit) */ + +#define BOARD_WD_ENABLE 0 /* Watchdog is disabled */ +#define BOARD_WD_PRESCALER 8 /* Watchdog pre-scaler */ /* LED definitions **********************************************************/ -- cgit v1.2.3