From 6225d35fa1d5087755574c10d7ccec48d878dc44 Mon Sep 17 00:00:00 2001 From: patacongo Date: Sat, 8 Sep 2012 16:40:12 +0000 Subject: Changes to get a clean compile with the Kconfig Shenzhou board. Still some link issues git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5115 42af7a65-404d-4744-a932-0658087f49c3 --- nuttx/Makefile | 21 +- nuttx/arch/arm/src/stm32/chip/stm32f107vc_pinmap.h | 52 ++--- nuttx/arch/arm/src/stm32/stm32_eth.c | 96 +++++++++- nuttx/arch/arm/src/stm32/stm32_syscfg.h | 52 +---- nuttx/configs/olimex-stm32-p107/include/board.h | 24 --- nuttx/configs/shenzhou/README.txt | 212 --------------------- nuttx/configs/shenzhou/include/board.h | 24 --- nuttx/configs/shenzhou/nsh/defconfig | 11 +- nuttx/configs/shenzhou/scripts/ld.script | 5 +- nuttx/configs/shenzhou/scripts/ld.script.dfu | 13 +- nuttx/configs/shenzhou/src/Makefile | 7 +- nuttx/configs/shenzhou/src/shenzhou-internal.h | 24 ++- nuttx/configs/shenzhou/src/up_clockconfig.c | 167 ++++++++++++++++ nuttx/configs/shenzhou/src/up_composite.c | 69 +------ nuttx/configs/shenzhou/src/up_mmcsd.c | 123 ++++++++++++ nuttx/configs/shenzhou/src/up_nsh.c | 105 ++++------ nuttx/configs/shenzhou/src/up_spi.c | 14 +- nuttx/configs/shenzhou/src/up_usbmsc.c | 66 +------ nuttx/tools/configure.sh | 23 ++- 19 files changed, 535 insertions(+), 573 deletions(-) create mode 100644 nuttx/configs/shenzhou/src/up_clockconfig.c create mode 100644 nuttx/configs/shenzhou/src/up_mmcsd.c diff --git a/nuttx/Makefile b/nuttx/Makefile index 1a51ca09b..0f3413cb1 100644 --- a/nuttx/Makefile +++ b/nuttx/Makefile @@ -616,9 +616,10 @@ endif # apps_clean: Perform the clean operation only in the user application # directory # apps_distclean: Perform the distclean operation only in the user application -# directory. Note that the apps/.config file is preserved -# so that this is not a "full" distclean but more of a -# configuration "reset." +# directory. Note that the apps/.config file (inf any) is +# preserved so that this is not a "full" distclean but more of a +# configuration "reset." (There willnot be an apps/.config +# file if the configuration was generated via make menuconfig). apps_clean: ifneq ($(APPDIR),) @@ -627,10 +628,16 @@ endif apps_distclean: ifneq ($(APPDIR),) - @cp "$(TOPDIR)/$(APPDIR)/.config" _SAVED_APPS_config || \ - { echo "Copy of $(APPDIR)/.config failed" ; exit 1 ; } + @if [ -r "$(TOPDIR)/$(APPDIR)/.config" ]; then \ + cp "$(TOPDIR)/$(APPDIR)/.config" _SAVED_APPS_config || \ + { echo "Copy of $(APPDIR)/.config failed" ; exit 1 ; } \ + else \ + rm -f _SAVED_APPS_config; \ + fi @$(MAKE) -C "$(TOPDIR)/$(APPDIR)" TOPDIR="$(TOPDIR)" distclean - @mv _SAVED_APPS_config "$(TOPDIR)/$(APPDIR)/.config" || \ - { echo "Copy of _SAVED_APPS_config failed" ; exit 1 ; } + @if [ -r _SAVED_APPS_config ]; then \ + @mv _SAVED_APPS_config "$(TOPDIR)/$(APPDIR)/.config" || \ + { echo "Copy of _SAVED_APPS_config failed" ; exit 1 ; } \ + fi endif diff --git a/nuttx/arch/arm/src/stm32/chip/stm32f107vc_pinmap.h b/nuttx/arch/arm/src/stm32/chip/stm32f107vc_pinmap.h index 82f1fa5e7..a7438a70e 100644 --- a/nuttx/arch/arm/src/stm32/chip/stm32f107vc_pinmap.h +++ b/nuttx/arch/arm/src/stm32/chip/stm32f107vc_pinmap.h @@ -93,41 +93,41 @@ #define GPIO_ETH_MDC (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN1) #define GPIO_ETH_MDIO (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2) -#define GPIO_ETH_MIICOL (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3) -#define GPIO_ETH_MIICRSWKUP (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0) -#define GPIO_ETH_MIIRXCLK (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1) +#define GPIO_ETH_MII_COL (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3) +#define GPIO_ETH_MII_CRS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0) +#define GPIO_ETH_MII_RX_CLK (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1) #if defined(CONFIG_STM32_ETH_REMAP) -# define GPIO_ETH_MIIRXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN9) -# define GPIO_ETH_MIIRXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN10) -# define GPIO_ETH_MIIRXD2 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN11) -# define GPIO_ETH_MIIRXD3 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN12) -# define GPIO_ETH_MIIRXDV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN8) +# define GPIO_ETH_MII_RXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN9) +# define GPIO_ETH_MII_RXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN10) +# define GPIO_ETH_MII_RXD2 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN11) +# define GPIO_ETH_MII_RXD3 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN12) +# define GPIO_ETH_MII_RX_DV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN8) #else -# define GPIO_ETH_MIIRXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN4) -# define GPIO_ETH_MIIRXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN5) -# define GPIO_ETH_MIIRXD2 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0) -# define GPIO_ETH_MIIRXD3 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1) -# define GPIO_ETH_MIIRXDV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7) +# define GPIO_ETH_MII_RXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN4) +# define GPIO_ETH_MII_RXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN5) +# define GPIO_ETH_MII_RXD2 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0) +# define GPIO_ETH_MII_RXD3 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1) +# define GPIO_ETH_MII_RX_DV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7) #endif -#define GPIO_ETH_MIIRXER (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10) -#define GPIO_ETH_MIITXCLK (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN3) -#define GPIO_ETH_MIITXD0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12) -#define GPIO_ETH_MIITXD1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13) -#define GPIO_ETH_MIITXD2 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN2) -#define GPIO_ETH_MIITXD3 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8) -#define GPIO_ETH_MIITXEN (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11) +#define GPIO_ETH_MII_RX_ER (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10) +#define GPIO_ETH_MII_TX_CLK (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN3) +#define GPIO_ETH_MII_TXD0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12) +#define GPIO_ETH_MII_TXD1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13) +#define GPIO_ETH_MII_TXD2 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN2) +#define GPIO_ETH_MII_TXD3 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8) +#define GPIO_ETH_MII_TX_EN (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11) #define GPIO_ETH_PPS_OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5) #define GPIO_ETH_RMII_REF_CLK (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1) #if defined(CONFIG_STM32_ETH_REMAP) -# define GPIO_ETH_RMII_CRS_DV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN8) -# define GPIO_ETH_RMII_RXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN9) -# define GPIO_ETH_RMII_RXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN10) +# define GPIO_ETH_RMII_CRS_DV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN8) +# define GPIO_ETH_RMII_RXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN9) +# define GPIO_ETH_RMII_RXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN10) #else -# define GPIO_ETH_RMII_CRS_DV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7) -# define GPIO_ETH_RMII_RXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN4) -# define GPIO_ETH_RMII_RXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN5) +# define GPIO_ETH_RMII_CRS_DV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7) +# define GPIO_ETH_RMII_RXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN4) +# define GPIO_ETH_RMII_RXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN5) #endif #define GPIO_ETH_RMII_TXD0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12) #define GPIO_ETH_RMII_TXD1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13) diff --git a/nuttx/arch/arm/src/stm32/stm32_eth.c b/nuttx/arch/arm/src/stm32/stm32_eth.c index fb6dc69fd..4493983ad 100644 --- a/nuttx/arch/arm/src/stm32/stm32_eth.c +++ b/nuttx/arch/arm/src/stm32/stm32_eth.c @@ -102,11 +102,17 @@ #endif #ifdef CONFIG_STM32_MII -# if !defined(CONFIG_STM32_MII_MCO1) && !defined(CONFIG_STM32_MII_MCO2) -# warning "Neither CONFIG_STM32_MII_MCO1 nor CONFIG_STM32_MII_MCO2 defined" -# endif -# if defined(CONFIG_STM32_MII_MCO1) && defined(CONFIG_STM32_MII_MCO2) -# error "Both CONFIG_STM32_MII_MCO1 and CONFIG_STM32_MII_MCO2 defined" +# if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) +# if !defined(CONFIG_STM32_MII_MCO1) && !defined(CONFIG_STM32_MII_MCO2) +# warning "Neither CONFIG_STM32_MII_MCO1 nor CONFIG_STM32_MII_MCO2 defined" +# endif +# if defined(CONFIG_STM32_MII_MCO1) && defined(CONFIG_STM32_MII_MCO2) +# error "Both CONFIG_STM32_MII_MCO1 and CONFIG_STM32_MII_MCO2 defined" +# endif +# elif defined(CONFIG_STM32_CONNECTIVITYLINE) +# if !defined(CONFIG_STM32_MII_MCO) +# warning "CONFIG_STM32_MII_MCO not defined" +# endif # endif #endif @@ -608,6 +614,12 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv); /* MAC/DMA Initialization */ +#ifdef CONFIG_STM32_MII +static inline void stm32_selectmii(void); +#endif +#ifdef CONFIG_STM32_RMII +static inline void stm32_selectrmii(void); +#endif static inline void stm32_ethgpioconfig(FAR struct stm32_ethmac_s *priv); static void stm32_ethreset(FAR struct stm32_ethmac_s *priv); static int stm32_macconfig(FAR struct stm32_ethmac_s *priv); @@ -2570,6 +2582,66 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv) return OK; } +/************************************************************************************ + * Name: stm32_selectmii + * + * Description: + * Selects the MII inteface. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ************************************************************************************/ + +#ifdef CONFIG_STM32_MII +static inline void stm32_selectmii(void) +{ + uint32_t regval; + +#ifdef CONFIG_STM32_CONNECTIVITYLINE + regval = getreg32(STM32_AFIO_MAPR); + regval &= ~AFIO_MAPR_MII_RMII_SEL; + putreg32(regval, STM32_AFIO_MAPR); +#else + regval = getreg32(STM32_SYSCFG_PMC); + regval &= ~SYSCFG_PMC_MII_RMII_SEL; + putreg32(regval, STM32_SYSCFG_PMC); +#endif +} +#endif + +/************************************************************************************ + * Name: stm32_selectrmii + * + * Description: + * Selects the RMII inteface. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ************************************************************************************/ + +static inline void stm32_selectrmii(void) +{ + uint32_t regval; + +#ifdef CONFIG_STM32_CONNECTIVITYLINE + regval = getreg32(STM32_AFIO_MAPR); + regval |= AFIO_MAPR_MII_RMII_SEL; + putreg32(regval, STM32_AFIO_MAPR); +#else + regval = getreg32(STM32_SYSCFG_PMC); + regval |= SYSCFG_PMC_MII_RMII_SEL; + putreg32(regval, STM32_SYSCFG_PMC); +#endif +} + /**************************************************************************** * Function: stm32_ethgpioconfig * @@ -2605,7 +2677,7 @@ static inline void stm32_ethgpioconfig(FAR struct stm32_ethmac_s *priv) stm32_selectmii(); - /* Provide clocking via MCO1 or MCO2: + /* Provide clocking via MCO, MCO1 or MCO2: * * "MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL * clock (through a configurable prescaler) on PA8 pin." @@ -2614,7 +2686,7 @@ static inline void stm32_ethgpioconfig(FAR struct stm32_ethmac_s *priv) * PLLI2S clock (through a configurable prescaler) on PC9 pin." */ -# if defined(CONFIG_STM32_MII_MCO1) +# if defined(CONFIG_STM32_MII_MCO1) /* Configure MC01 to drive the PHY. Board logic must provide MC01 clocking * info. */ @@ -2622,14 +2694,20 @@ static inline void stm32_ethgpioconfig(FAR struct stm32_ethmac_s *priv) stm32_configgpio(GPIO_MCO1); stm32_mco1config(BOARD_CFGR_MC01_SOURCE, BOARD_CFGR_MC01_DIVIDER); -# elif defined(CONFIG_STM32_MII_MCO2) +# elif defined(CONFIG_STM32_MII_MCO2) /* Configure MC02 to drive the PHY. Board logic must provide MC02 clocking * info. */ stm32_configgpio(GPIO_MCO2); stm32_mco2config(BOARD_CFGR_MC02_SOURCE, BOARD_CFGR_MC02_DIVIDER); -# endif + +# elif defined(CONFIG_STM32_MII_MCO) + /* Setup MCO pin for alternative usage */ + + stm32_configgpio(GPIO_MCO); + stm32_mcoconfig(BOARD_CFGR_MCO_SOURCE); +# endif /* MII interface pins (17): * diff --git a/nuttx/arch/arm/src/stm32/stm32_syscfg.h b/nuttx/arch/arm/src/stm32/stm32_syscfg.h index 8a57a2c58..d1487da40 100644 --- a/nuttx/arch/arm/src/stm32/stm32_syscfg.h +++ b/nuttx/arch/arm/src/stm32/stm32_syscfg.h @@ -45,60 +45,10 @@ #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) # include "chip/stm32_syscfg.h" +#endif /* CONFIG_STM32_STM32F20XX || CONFIG_STM32_STM32F40XX */ /**************************************************************************************************** * Pre-processor Definitions ****************************************************************************************************/ -/**************************************************************************************************** - * Inline Functions - ****************************************************************************************************/ - -/************************************************************************************ - * Name: stm32_selectmii - * - * Description: - * Selects the MII inteface. - * - * Input Parameters: - * None - * - * Returned Value: - * None - * - ************************************************************************************/ - -static inline void stm32_selectmii(void) -{ - uint32_t regval; - - regval = getreg32(STM32_SYSCFG_PMC); - regval &= ~SYSCFG_PMC_MII_RMII_SEL; - putreg32(regval, STM32_SYSCFG_PMC); -} - -/************************************************************************************ - * Name: stm32_selectrmii - * - * Description: - * Selects the RMII inteface. - * - * Input Parameters: - * None - * - * Returned Value: - * None - * - ************************************************************************************/ - -static inline void stm32_selectrmii(void) -{ - uint32_t regval; - - regval = getreg32(STM32_SYSCFG_PMC); - regval |= SYSCFG_PMC_MII_RMII_SEL; - putreg32(regval, STM32_SYSCFG_PMC); -} - -#endif /* CONFIG_STM32_STM32F20XX || CONFIG_STM32_STM32F40XX */ #endif /* __ARCH_ARM_SRC_STM32_STM32_SYSCFG_H */ diff --git a/nuttx/configs/olimex-stm32-p107/include/board.h b/nuttx/configs/olimex-stm32-p107/include/board.h index 71b7f0a59..2fe6e5aaf 100644 --- a/nuttx/configs/olimex-stm32-p107/include/board.h +++ b/nuttx/configs/olimex-stm32-p107/include/board.h @@ -115,27 +115,3 @@ void stm32_boardinitialize(void); #ifdef CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG void stm32_board_clockconfig(void); #endif - -/************************************************************************************ - * Name: stm32_selectrmii - * - * Description: - * Selects the RMII inteface. - * - * Input Parameters: - * None - * - * Returned Value: - * None - * - ************************************************************************************/ - -static inline void stm32_selectrmii(void) -{ - uint32_t regval; - - regval = getreg32(STM32_AFIO_MAPR); - regval |= AFIO_MAPR_MII_RMII_SEL; - putreg32(regval, STM32_AFIO_MAPR); -} - diff --git a/nuttx/configs/shenzhou/README.txt b/nuttx/configs/shenzhou/README.txt index a74cefd68..3508bbefe 100755 --- a/nuttx/configs/shenzhou/README.txt +++ b/nuttx/configs/shenzhou/README.txt @@ -558,14 +558,6 @@ Shenzhou-specific Configuration Options CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. Cannot be used with CONFIG_STM32_SPI_INTERRUPT. - CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO - and CONFIG_STM32_DMA2. - CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128 - CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. - Default: Medium - CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: - 4-bit transfer mode. - CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board CONFIG_STM32_MII - Support Ethernet MII interface CONFIG_STM32_MII_MCO1 - Use MCO1 to clock the MII interface @@ -678,30 +670,6 @@ can be selected as follow: Where is one of the following: - dhcpd: - ----- - - This builds the DCHP server using the apps/examples/dhcpd application - (for execution from FLASH.) See apps/examples/README.txt for information - about the dhcpd example. The server address is 10.0.0.1 and it serves - IP addresses in the range 10.0.0.2 through 10.0.0.17 (all of which, of - course, are configurable). - - CONFIG_STM32_CODESOURCERYW=y : CodeSourcery under Windows - - nettest: - ------- - - This configuration directory may be used to verify networking performance - using the STM32's Ethernet controller. It uses apps/examples/nettest to excercise the - TCP/IP network. - - CONFIG_EXAMPLE_NETTEST_SERVER=n : Target is configured as the client - CONFIG_EXAMPLE_NETTEST_PERFORMANCE=y : Only network performance is verified. - CONFIG_EXAMPLE_NETTEST_IPADDR=(10<<24|0<<16|0<<8|2) : Target side is IP: 10.0.0.2 - CONFIG_EXAMPLE_NETTEST_DRIPADDR=(10<<24|0<<16|0<<8|1) : Host side is IP: 10.0.0.1 - CONFIG_EXAMPLE_NETTEST_CLIENTIP=(10<<24|0<<16|0<<8|1) : Server address used by which ever is client. - nsh: --- Configures the NuttShell (nsh) located at apps/examples/nsh. The @@ -899,183 +867,3 @@ Where is one of the following: 11. This configuration requires that jumper JP22 be set to enable RS-232 operation. - - nsh2: - ----- - - This is an alternative NSH configuration. One limitation of the Shenzhou - board is that you cannot have both a UART-based NSH console and SDIO support. - The nsh2 differs from the nsh configuration in the following ways: - - -CONFIG_STM32_USART3=y : USART3 is disabled - +CONFIG_STM32_USART3=n - - -CONFIG_STM32_SDIO=n : SDIO is enabled - +CONFIG_STM32_SDIO=y - - Logically, these are the only differences: This configuration has SDIO (and - the SD card) enabled and the serial console disabled. There is ONLY a - Telnet console!. - - There are some special settings to make life with only a Telnet - - CONFIG_SYSLOG=y - Enables the System Logging feature. - CONFIG_RAMLOG=y - Enable the RAM-based logging feature. - CONFIG_RAMLOG_CONSOLE=y - Use the RAM logger as the default console. - This means that any console output from non-Telnet threads will - go into the circular buffer in RAM. - CONFIG_RAMLOG_SYSLOG - This enables the RAM-based logger as the - system logger. This means that (1) in addition to the console - output from other tasks, ALL of the debug output will also to - to the circular buffer in RAM, and (2) NSH will now support a - command called 'dmesg' that can be used to dump the RAM log. - - There are a few other configuration differences as necessary to support - this different device configuration. Just the do the 'diff' if you are - curious. - - NOTES: - 1. See the notes for the nsh configuration. Most also apply to the nsh2 - configuration. Like the nsh configuration, this configuration can - be modified to support a variety of additional tests. - - 2. RS-232 is disabled, but Telnet is still available for use as a console. - Since RS-232 and SDIO use the same pins (one controlled by JP22), RS232 - and SDIO cannot be used concurrently. - - 3. This configuration requires that jumper JP22 be set to enable SDIO - operation. To enable MicroSD Card, which shares same I/Os with RS-232, - JP22 is not fitted. - - 4. In order to use SDIO without overruns, DMA must be used. The STM32 F4 - has 192Kb of SRAM in two banks: 112Kb of "system" SRAM located at - 0x2000:0000 and 64Kb of "CCM" SRAM located at 0x1000:0000. It appears - that you cannot perform DMA from CCM SRAM. The work around that I have now - is simply to omit the 64Kb of CCM SRAM from the heap so that all memory is - allocated from System SRAM. This is done by setting: - - CONFIG_MM_REGIONS=1 - - Then DMA works fine. The downside is, of course, is that we lose 64Kb - of precious SRAM. - - 5. Another SDIO/DMA issue. This one is probably a software bug. This is - the bug as stated in the TODO list: - - "If you use a large I/O buffer to access the file system, then the - MMCSD driver will perform multiple block SD transfers. With DMA - ON, this seems to result in CRC errors detected by the hardware - during the transfer. Workaround: CONFIG_MMCSD_MULTIBLOCK_DISABLE=y" - - For this reason, CONFIG_MMCSD_MULTIBLOCK_DISABLE=y appears in the defconfig - file. - - 6. Another DMA-related concern. I see this statement in the reference - manual: "The burst configuration has to be selected in order to respect - the AHB protocol, where bursts must not cross the 1 KB address boundary - because the minimum address space that can be allocated to a single slave - is 1 KB. This means that the 1 KB address boundary should not be crossed - by a burst block transfer, otherwise an AHB error would be generated, - that is not reported by the DMA registers." - - There is nothing in the DMA driver to prevent this now. - - nxconsole: - ---------- - This is yet another NSH configuration. This NSH configuration differs - from the others, however, in that it uses the NxConsole driver to host - the NSH shell. - - Some of the differences in this configuration and the normal nsh configuration - include these settings in the defconfig file: - - These select NX Multi-User mode: - - CONFG_NX_MULTIUSER=y - CONFIG_DISABLE_MQUEUE=n - - The following definition in the defconfig file to enables the NxConsole - driver: - - CONFIG_NXCONSOLE=y - - The appconfig file selects examples/nxconsole instead of examples/nsh: - - CONFIGURED_APPS += examples/nxconsole - - Other configuration settings: - - CONFIG_STM32_CODESOURCERYW=y : CodeSourcery under Windows - CONFIG_LCD_LANDSCAPE=y : 320x240 landscape - - nxwm - ---- - This is a special configuration setup for the NxWM window manager - UnitTest. The NxWM window manager can be found here: - - trunk/NxWidgets/nxwm - - The NxWM unit test can be found at: - - trunk/NxWidgets/UnitTests/nxwm - - Documentation for installing the NxWM unit test can be found here: - - trunk/NxWidgets/UnitTests/README.txt - - Here is the quick summary of the build steps: - - 1. Intall the nxwm configuration - - $ cd ~/nuttx/trunk/nuttx/tools - $ ./configure.sh shenzhou/nxwm - - 2. Make the build context (only) - - $ cd .. - $ . ./setenv.sh - $ make context - ... - - 3. Install the nxwm unit test - - $ cd ~/nuttx/trunk/NxWidgets - $ tools/install.sh ~/nuttx/trunk/apps nxwm - Creating symbolic link - - To ~/nuttx/trunk/NxWidgets/UnitTests/nxwm - - At ~/nuttx/trunk/apps/external - - 4. Build the NxWidgets library - - $ cd ~/nuttx/trunk/NxWidgets/libnxwidgets - $ make TOPDIR=~/nuttx/trunk/nuttx - ... - - 5. Build the NxWM library - - $ cd ~/nuttx/trunk/NxWidgets/nxwm - $ make TOPDIR=~//nuttx/trunk/nuttx - ... - - 6. Built NuttX with the installed unit test as the application - - $ cd ~/nuttx/trunk/nuttx - $ make - - ostest: - ------ - This configuration directory, performs a simple OS test using - examples/ostest. By default, this project assumes that you are - using the DFU bootloader. - - CONFIG_STM32_CODESOURCERYW=y : CodeSourcery under Windows - - telnetd: - -------- - - A simple test of the Telnet daemon(see apps/netutils/README.txt, - apps/examples/README.txt, and apps/examples/telnetd). This is - the same daemon that is used in the nsh configuration so if you - use NSH, then you don't care about this. This test is good for - testing the Telnet daemon only because it works in a simpler - environment than does the nsh configuration. diff --git a/nuttx/configs/shenzhou/include/board.h b/nuttx/configs/shenzhou/include/board.h index 026a6adab..560fe1e00 100644 --- a/nuttx/configs/shenzhou/include/board.h +++ b/nuttx/configs/shenzhou/include/board.h @@ -344,27 +344,3 @@ EXTERN void stm32_ledinit(void); EXTERN void stm32_setled(int led, bool ledon); EXTERN void stm32_setleds(uint8_t ledset); #endif - -/************************************************************************************ - * Name: stm32_selectrmii - * - * Description: - * Selects the RMII inteface. - * - * Input Parameters: - * None - * - * Returned Value: - * None - * - ************************************************************************************/ - -static inline void stm32_selectrmii(void) -{ - uint32_t regval; - - regval = getreg32(STM32_AFIO_MAPR); - regval |= AFIO_MAPR_MII_RMII_SEL; - putreg32(regval, STM32_AFIO_MAPR); -} - diff --git a/nuttx/configs/shenzhou/nsh/defconfig b/nuttx/configs/shenzhou/nsh/defconfig index 6f223c164..907871104 100644 --- a/nuttx/configs/shenzhou/nsh/defconfig +++ b/nuttx/configs/shenzhou/nsh/defconfig @@ -147,7 +147,7 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set # CONFIG_STM32_JTAG_SW_ENABLE is not set # CONFIG_STM32_FORCEPOWER is not set -# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y # # SPI Configuration @@ -295,7 +295,7 @@ CONFIG_DEV_NULL=y # CONFIG_PWM is not set # CONFIG_I2C is not set CONFIG_SPI=y -CONFIG_SPI_OWNBUS=y +# CONFIG_SPI_OWNBUS is not set CONFIG_SPI_EXCHANGE=y CONFIG_SPI_CMDDATA=y CONFIG_RTC=y @@ -432,7 +432,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set CONFIG_HAVE_CXX=y -CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_HAVE_CXXINITIALIZE is not set # CONFIG_CXX_NEWLONG is not set # @@ -733,7 +733,8 @@ CONFIG_EXAMPLES_NSH=y # # Name resolution # -# CONFIG_NETUTILS_RESOLV is not set +CONFIG_NETUTILS_RESOLV=y +CONFIG_NET_RESOLV_ENTRIES=8 # # SMTP @@ -763,7 +764,7 @@ CONFIG_NETUTILS_UIPLIB=y # # uIP web client # -# CONFIG_NETUTILS_WEBCLIENT is not set +CONFIG_NETUTILS_WEBCLIENT=y # # uIP web server diff --git a/nuttx/configs/shenzhou/scripts/ld.script b/nuttx/configs/shenzhou/scripts/ld.script index 5630b38df..fc4dfbd6b 100644 --- a/nuttx/configs/shenzhou/scripts/ld.script +++ b/nuttx/configs/shenzhou/scripts/ld.script @@ -33,11 +33,14 @@ * ****************************************************************************/ +/* The STM32F107VC has 256Kb of FLASH beginning at address 0x0800:0000 and + * 64Kb of SRAM beginning at address 0x2000:0000. + */ + MEMORY { flash (rx) : ORIGIN = 0x08000000, LENGTH = 256K sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K - } OUTPUT_ARCH(arm) diff --git a/nuttx/configs/shenzhou/scripts/ld.script.dfu b/nuttx/configs/shenzhou/scripts/ld.script.dfu index b1d41e0ab..80494bc7b 100644 --- a/nuttx/configs/shenzhou/scripts/ld.script.dfu +++ b/nuttx/configs/shenzhou/scripts/ld.script.dfu @@ -33,11 +33,16 @@ * ****************************************************************************/ -/* Don't know if this is correct. Just 256K-48K (not testet) */ +/* The STM32F107VC has 256Kb of FLASH beginning at address 0x0800:0000 and + * 64Kb of SRAM beginning at address 0x2000:0000. Here we assume that the + * STMicro DFU bootloader is being used. In that case, the corrct load .text + * load address is 0x08003000 (leaving 464Kb). + */ + MEMORY { - flash (rx) : ORIGIN = 0x08003000, LENGTH = 208K - sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K + flash (rx) : ORIGIN = 0x08003000, LENGTH = 208K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K } OUTPUT_ARCH(arm) @@ -62,7 +67,7 @@ SECTIONS _eronly = ABSOLUTE(.); - /* The STM32F103Z has 64Kb of SRAM beginning at the following address */ + /* The STM32F107VC has 64Kb of SRAM beginning at the following address */ .data : { _sdata = ABSOLUTE(.); diff --git a/nuttx/configs/shenzhou/src/Makefile b/nuttx/configs/shenzhou/src/Makefile index e588cddde..11e36f136 100644 --- a/nuttx/configs/shenzhou/src/Makefile +++ b/nuttx/configs/shenzhou/src/Makefile @@ -40,7 +40,11 @@ CFLAGS += -I$(TOPDIR)/sched ASRCS = AOBJS = $(ASRCS:.S=$(OBJEXT)) -CSRCS = up_boot.c up_spi.c +CSRCS = up_boot.c up_spi.c up_mmcsd.c + +ifeq ($(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG),y) +CSRCS += up_clockconfig.c +endif ifeq ($(CONFIG_HAVE_CXX),y) CSRCS += up_cxxinitialize.c @@ -50,6 +54,7 @@ ifeq ($(CONFIG_ARCH_LEDS),y) CSRCS += up_autoleds.c else CSRCS += up_userleds.c +endif ifeq ($(CONFIG_ARCH_BUTTONS),y) CSRCS += up_buttons.c diff --git a/nuttx/configs/shenzhou/src/shenzhou-internal.h b/nuttx/configs/shenzhou/src/shenzhou-internal.h index 2b490b187..6f9683a56 100644 --- a/nuttx/configs/shenzhou/src/shenzhou-internal.h +++ b/nuttx/configs/shenzhou/src/shenzhou-internal.h @@ -96,10 +96,10 @@ #define MAX_IRQBUTTON BUTTON_KEY4 #define NUM_IRQBUTTONS (BUTTON_KEY4 - BUTTON_KEY1 + 1) -#define GPIO_BTN_WAKEUP (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0) -#define GPIO_BTN_USERKEY (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTB|GPIO_PIN10) -#define GPIO_BTN_USERKEY2 (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN4) -#define GPIO_BTN_TAMPER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN13) +#define GPIO_BTN_WAKEUP (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0) +#define GPIO_BTN_USERKEY (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTB|GPIO_PIN10) +#define GPIO_BTN_USERKEY2 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN4) +#define GPIO_BTN_TAMPER (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN13) /* LEDs * @@ -173,7 +173,8 @@ * 95 PB8 USB_PWR Drives USB VBUS */ -#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8) +#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_SPEED_100MHz|\ + GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8) /* Audio DAC * @@ -204,7 +205,7 @@ * 58 PD11 SD_CS */ -#define GPIO_SD_CD (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTB|GPIO_PIN14) +#define GPIO_SD_CD (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTB|GPIO_PIN14) #define GPIO_SD_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN11) @@ -258,5 +259,16 @@ void weak_function stm32_usbinitialize(void); int stm32_usbhost_initialize(void); #endif +/**************************************************************************** + * Name: stm32_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. Requires CONFIG_DISABLE_MOUNTPOINT=n + * and CONFIG_STM32_SPI1=y + * + ****************************************************************************/ + +int stm32_sdinitialize(int minor); + #endif /* __ASSEMBLY__ */ #endif /* __CONFIGS_SHENZHOUL_SRC_SHENZHOU_INTERNAL_H */ diff --git a/nuttx/configs/shenzhou/src/up_clockconfig.c b/nuttx/configs/shenzhou/src/up_clockconfig.c new file mode 100644 index 000000000..6c3bd56e1 --- /dev/null +++ b/nuttx/configs/shenzhou/src/up_clockconfig.c @@ -0,0 +1,167 @@ +/************************************************************************************ + * configs/olimex-stm32-p107/src/up_boot.c + * arch/arm/src/board/up_boot.c + * + * Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_board_clockconfig + * + * Description: + * Any STM32 board may replace the "standard" board clock configuration logic with + * its own, custom clock cofiguration logic. + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG +void stm32_board_clockconfig(void) +{ + uint32_t regval; + + regval = getreg32(STM32_RCC_CR); + regval &= ~RCC_CR_HSEBYP; /* Disable HSE clock bypass */ + regval |= RCC_CR_HSEON; /* Enable HSE */ + putreg32(regval, STM32_RCC_CR); + + /* Set flash wait states + * Sysclk runs with 72MHz -> 2 waitstates. + * 0WS from 0-24MHz + * 1WS from 24-48MHz + * 2WS from 48-72MHz + */ + + regval = getreg32(STM32_FLASH_ACR); + regval &= ~FLASH_ACR_LATENCY_MASK; + regval |= (FLASH_ACR_LATENCY_2|FLASH_ACR_PRTFBE); + putreg32(regval, STM32_FLASH_ACR); + + regval = getreg32(STM32_RCC_CFGR2); + regval &= ~(RCC_CFGR2_PREDIV2_MASK + | RCC_CFGR2_PLL2MUL_MASK + | RCC_CFGR2_PREDIV1SRC_MASK + | RCC_CFGR2_PREDIV1_MASK); + regval |= RCC_CFGR2_PREDIV2d5; /* 25MHz / 5 */ + regval |= RCC_CFGR2_PLL2MULx8; /* 5MHz * 8 => 40MHz */ + regval |= RCC_CFGR2_PREDIV1SRC_PLL2; /* Use PLL2 as input for PREDIV1 */ + regval |= RCC_CFGR2_PREDIV1d5; /* 40MHz / 5 => 8MHz */ + putreg32(regval, STM32_RCC_CFGR2); + + /* Set the PCLK2 divider */ + + regval = getreg32(STM32_RCC_CFGR); + regval &= ~(RCC_CFGR_PPRE2_MASK | RCC_CFGR_HPRE_MASK); + regval |= STM32_RCC_CFGR_PPRE2; + regval |= RCC_CFGR_HPRE_SYSCLK; + putreg32(regval, STM32_RCC_CFGR); + + /* Set the PCLK1 divider */ + + regval = getreg32(STM32_RCC_CFGR); + regval &= ~RCC_CFGR_PPRE1_MASK; + regval |= STM32_RCC_CFGR_PPRE1; + putreg32(regval, STM32_RCC_CFGR); + + regval = getreg32(STM32_RCC_CR); + regval |= RCC_CR_PLL2ON; + putreg32(regval, STM32_RCC_CR); + + /* Wait for PLL2 ready */ + + while((getreg32(STM32_RCC_CR) & RCC_CR_PLL2RDY) == 0); + + /* Setup PLL3 for RMII clock on MCO */ + + regval = getreg32(STM32_RCC_CFGR2); + regval &= ~(RCC_CFGR2_PLL3MUL_MASK); + regval |= RCC_CFGR2_PLL3MULx10; + putreg32(regval, STM32_RCC_CFGR2); + + /* Switch PLL3 on */ + + regval = getreg32(STM32_RCC_CR); + regval |= RCC_CR_PLL3ON; + putreg32(regval, STM32_RCC_CR); + + while ((getreg32(STM32_RCC_CR) & RCC_CR_PLL3RDY) == 0); + + /* Set main PLL source 8MHz * 9 => 72MHz*/ + + regval = getreg32(STM32_RCC_CFGR); + regval &= ~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL_MASK); + regval |= (RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL_CLKx9); + putreg32(regval, STM32_RCC_CFGR); + + /* Switch main PLL on */ + + regval = getreg32(STM32_RCC_CR); + regval |= RCC_CR_PLLON; + putreg32(regval, STM32_RCC_CR); + + while ((getreg32(STM32_RCC_CR) & RCC_CR_PLLRDY) == 0); + + /* Select PLL as system clock source */ + + regval = getreg32(STM32_RCC_CFGR); + regval &= ~RCC_CFGR_SW_MASK; + regval |= RCC_CFGR_SW_PLL; + putreg32(regval, STM32_RCC_CFGR); + + /* Wait until PLL is used as the system clock source */ + + while ((getreg32(STM32_RCC_CFGR) & RCC_CFGR_SWS_PLL) == 0); +} +#endif diff --git a/nuttx/configs/shenzhou/src/up_composite.c b/nuttx/configs/shenzhou/src/up_composite.c index 58f90797b..cf61aeaad 100644 --- a/nuttx/configs/shenzhou/src/up_composite.c +++ b/nuttx/configs/shenzhou/src/up_composite.c @@ -4,7 +4,7 @@ * Copyright (C) 2012 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * - * Configure and register the STM32 MMC/SD SDIO block driver. + * Configure and register the STM32 SPI-based MMC/SD block driver. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -43,38 +43,19 @@ #include #include -#include -#include -#include -#include - -#include "stm32_internal.h" - -/* There is nothing to do here if SDIO support is not selected. */ - -#ifdef CONFIG_STM32_SDIO +#include "shenzhou_internal.h" /**************************************************************************** * Pre-Processor Definitions ****************************************************************************/ - /* Configuration ************************************************************/ +/* Device minor number */ #ifndef CONFIG_EXAMPLES_COMPOSITE_DEVMINOR1 # define CONFIG_EXAMPLES_COMPOSITE_DEVMINOR1 0 #endif -/* SLOT number(s) could depend on the board configuration */ - -#ifdef CONFIG_ARCH_BOARD_STM3210E_EVAL -# undef STM32_MMCSDSLOTNO -# define STM32_MMCSDSLOTNO 0 -#else - /* Add configuration for new STM32 boards here */ -# error "Unrecognized STM32 board" -#endif - /* Debug ********************************************************************/ #ifdef CONFIG_CPP_HAVE_VARARGS @@ -118,46 +99,8 @@ int composite_archinitialize(void) */ #ifndef CONFIG_NSH_BUILTIN_APPS - FAR struct sdio_dev_s *sdio; - int ret; - - /* First, get an instance of the SDIO interface */ - - message("composite_archinitialize: Initializing SDIO slot %d\n", - STM32_MMCSDSLOTNO); - - sdio = sdio_initialize(STM32_MMCSDSLOTNO); - if (!sdio) - { - message("composite_archinitialize: Failed to initialize SDIO slot %d\n", - STM32_MMCSDSLOTNO); - return -ENODEV; - } - - /* Now bind the SDIO interface to the MMC/SD driver */ - - message("composite_archinitialize: Bind SDIO to the MMC/SD driver, minor=%d\n", - CONFIG_EXAMPLES_COMPOSITE_DEVMINOR1); - - ret = mmcsd_slotinitialize(CONFIG_EXAMPLES_COMPOSITE_DEVMINOR1, sdio); - if (ret != OK) - { - message("composite_archinitialize: Failed to bind SDIO to the MMC/SD driver: %d\n", - ret); - return ret; - } - message("composite_archinitialize: Successfully bound SDIO to the MMC/SD driver\n"); - - /* Then let's guess and say that there is a card in the slot. I need to check to - * see if the STM3210E-EVAL board supports a GPIO to detect if there is a card in - * the slot. - */ - - sdio_mediachange(sdio, true); - + return sd_mount(CONFIG_EXAMPLES_COMPOSITE_DEVMINOR1); +#else + return OK; #endif /* CONFIG_NSH_BUILTIN_APPS */ - - return OK; } - -#endif /* CONFIG_STM32_SDIO */ diff --git a/nuttx/configs/shenzhou/src/up_mmcsd.c b/nuttx/configs/shenzhou/src/up_mmcsd.c new file mode 100644 index 000000000..3de7f2620 --- /dev/null +++ b/nuttx/configs/shenzhou/src/up_mmcsd.c @@ -0,0 +1,123 @@ +/**************************************************************************** + * config/shenzhou/src/up_mmcsd.c + * arch/arm/src/board/up_mmcsd.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* SPI1 connects to the SD CARD (and to the SPI FLASH) */ + +#define HAVE_MMCSD 1 /* Assume that we have SD support */ +#define STM32_MMCSDSPIPORTNO 1 /* Port is SPI1 */ +#define STM32_MMCSDSLOTNO 0 /* There is only one slot */ + +#ifndef CONFIG_STM32_SPI1 +# undef HAVE_MMCSD +#else +# ifdef CONFIG_SPI_OWNBUS +# warning "SPI1 is shared with SD and FLASH but CONFIG_SPI_OWNBUS is defined" +# endif +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#ifndef CONFIG_DISABLE_MOUNTPOINT +# undef NSH_HAVEMMCSD +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. Requires CONFIG_DISABLE_MOUNTPOINT=n + * and CONFIG_STM32_SPI1=y + * + ****************************************************************************/ + +int stm32_sdinitialize(int minor) +{ +#ifdef HAVE_MMCSD + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + fvdbg("Initializing SPI port %d\n", STM32_MMCSDSPIPORTNO); + + spi = up_spiinitialize(STM32_MMCSDSPIPORTNO); + if (!spi) + { + fdbg("Failed to initialize SPI port %d\n", STM32_MMCSDSPIPORTNO); + return -ENODEV; + } + + fvdbg("Successfully initialized SPI port %d\n", STM32_MMCSDSPIPORTNO); + + /* Bind the SPI port to the slot */ + + fvdbg("Binding SPI port %d to MMC/SD slot %d\n", + STM32_MMCSDSPIPORTNO, STM32_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(minor, STM32_MMCSDSLOTNO, spi); + if (ret < 0) + { + fdbg("Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + STM32_MMCSDSPIPORTNO, STM32_MMCSDSLOTNO, ret); + return ret; + } + + fvdbg("Successfuly bound SPI port %d to MMC/SD slot %d\n", + STM32_MMCSDSPIPORTNO, STM32_MMCSDSLOTNO); +#endif + return OK; +} diff --git a/nuttx/configs/shenzhou/src/up_nsh.c b/nuttx/configs/shenzhou/src/up_nsh.c index 3d9ba407f..6e657706e 100644 --- a/nuttx/configs/shenzhou/src/up_nsh.c +++ b/nuttx/configs/shenzhou/src/up_nsh.c @@ -45,44 +45,39 @@ #include #include -#ifdef CONFIG_STM32_SPI1 -# include -# include -#endif - -#ifdef CONFIG_STM32_SDIO -# include -# include -#endif - -#ifdef CONFIG_STM32_OTGFS -# include "stm32_usbhost.h" -#endif - #include "stm32_internal.h" #include "shenzhou-internal.h" /**************************************************************************** * Pre-Processor Definitions ****************************************************************************/ - /* Configuration ************************************************************/ -/* For now, don't build in any SPI1 support -- NSH is not using it */ - -#undef CONFIG_STM32_SPI1 - /* Assume that we support everything until convinced otherwise */ #define HAVE_MMCSD 1 #define HAVE_USBDEV 1 #define HAVE_USBHOST 1 -/* Can't support MMC/SD features if mountpoints are disabled or if SDIO support - * is not enabled. - */ +/* Configuration ************************************************************/ +/* SPI1 connects to the SD CARD (and to the SPI FLASH) */ + +#define STM32_MMCSDSPIPORTNO 1 /* SPI1 */ +#define STM32_MMCSDSLOTNO 0 /* Only one slot */ + +#ifndef CONFIG_STM32_SPI1 +# undef HAVE_MMCSD +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ -#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_STM32_SDIO) +#ifndef CONFIG_DISABLE_MOUNTPOINT +# undef NSH_HAVEMMCSD +#endif + +/* Can't support MMC/SD features if mountpoints are disabled) */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) # undef HAVE_MMCSD #endif @@ -95,13 +90,26 @@ /* Default MMC/SD SLOT number */ -# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != 0 -# error "Only one MMC/SD slot" -# undef CONFIG_NSH_MMCSDSLOTNO +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != STM32_MMCSDSLOTNO +# error "Only one MMC/SD slot: Slot 0" +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO STM32_MMCSDSLOTNO # endif # ifndef CONFIG_NSH_MMCSDSLOTNO -# define CONFIG_NSH_MMCSDSLOTNO 0 +# define CONFIG_NSH_MMCSDSLOTNO STM32_MMCSDSLOTNO +# endif + +/* Verify configured SPI port number */ + +# if defined(CONFIG_NSH_MMCSDSPIPORTNO) && CONFIG_NSH_MMCSDSPIPORTNO != STM32_MMCSDSPIPORTNO +# error "Only one MMC/SD port: SPI1" +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO STM32_MMCSDSPIPORTNO +# endif + +# ifndef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO STM32_MMCSDSPIPORTNO # endif #endif @@ -154,58 +162,27 @@ int nsh_archinitialize(void) { -#ifdef CONFIG_STM32_SPI1 - FAR struct spi_dev_s *spi; - FAR struct mtd_dev_s *mtd; -#endif -#ifdef HAVE_MMCSD - FAR struct sdio_dev_s *sdio; -#endif #if defined(HAVE_MMCSD) || defined(HAVE_USBHOST) int ret; #endif - /* Configure SPI-based devices */ - -#ifdef CONFIG_STM32_SPI1 -# warning "Missing support for the SPI FLASH" -#endif - - /* Mount the SDIO-based MMC/SD block driver */ + /* Initialize the SPI-based MMC/SD slot */ #ifdef HAVE_MMCSD - /* First, get an instance of the SDIO interface */ - - sdio = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO); - if (!sdio) + ret = stm32_sdinitialze(CONFIG_NSH_MMCSDMINOR); + if (ret < 0) { - message("nsh_archinitialize: Failed to initialize SDIO slot %d\n", - CONFIG_NSH_MMCSDSLOTNO); - return -ENODEV; - } - - /* Now bind the SDIO interface to the MMC/SD driver */ - - ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, sdio); - if (ret != OK) - { - message("nsh_archinitialize: Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + message("nsh_archinitialize: Failed to initialize MMC/SD slot %d: %d\n", + CONFIG_NSH_MMCSDSLOTNO, ret); return ret; } - - /* Then let's guess and say that there is a card in the slot. I need to check to - * see if the STM3240G-EVAL board supports a GPIO to detect if there is a card in - * the slot. - */ - - sdio_mediachange(sdio, true); #endif -#ifdef HAVE_USBHOST /* Initialize USB host operation. stm32_usbhost_initialize() starts a thread * will monitor for USB connection and disconnection events. */ +#ifdef HAVE_USBHOST ret = stm32_usbhost_initialize(); if (ret != OK) { diff --git a/nuttx/configs/shenzhou/src/up_spi.c b/nuttx/configs/shenzhou/src/up_spi.c index 5a3e69159..ce6a1f75e 100644 --- a/nuttx/configs/shenzhou/src/up_spi.c +++ b/nuttx/configs/shenzhou/src/up_spi.c @@ -153,7 +153,7 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele stm32_gpiowrite(GPIO_SD_CS, !selected); } - elseif (devid == SPIDEV_FLASH) + else if (devid == SPIDEV_FLASH) { /* Set the GPIO low to select and high to de-select */ @@ -163,14 +163,16 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) { + /* The card detect pin is pulled up so that we detect the presence of a card + * by see a low value on the input pin. + */ + if (stm32_gpioread(GPIO_SD_CD)) { return 0; } - else - { - return SPI_STATUS_PRESENT; - } + + return SPI_STATUS_PRESENT; } #endif @@ -187,7 +189,7 @@ void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele stm32_gpiowrite(GPIO_LCD_CS, !selected); } - elseif (devid == SPIDEV_WIRELESS) + else if (devid == SPIDEV_WIRELESS) { /* Set the GPIO low to select and high to de-select */ diff --git a/nuttx/configs/shenzhou/src/up_usbmsc.c b/nuttx/configs/shenzhou/src/up_usbmsc.c index 8d12f6324..8566aedfd 100644 --- a/nuttx/configs/shenzhou/src/up_usbmsc.c +++ b/nuttx/configs/shenzhou/src/up_usbmsc.c @@ -4,7 +4,7 @@ * Copyright (C) 2012 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * - * Configure and register the STM32 MMC/SD SDIO block driver. + * Configure and register the STM32 SPI-based MMC/SD block driver. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -45,30 +45,17 @@ #include #include -#include -#include - #include "stm32_internal.h" -/* There is nothing to do here if SDIO support is not selected. */ - -#ifdef CONFIG_STM32_SDIO - /**************************************************************************** * Pre-Processor Definitions ****************************************************************************/ - /* Configuration ************************************************************/ #ifndef CONFIG_EXAMPLES_USBMSC_DEVMINOR1 # define CONFIG_EXAMPLES_USBMSC_DEVMINOR1 0 #endif -/* SLOT number(s) could depend on the board configuration */ - -#undef STM32_MMCSDSLOTNO -#define STM32_MMCSDSLOTNO 0 - /* Debug ********************************************************************/ #ifdef CONFIG_CPP_HAVE_VARARGS @@ -89,7 +76,6 @@ # endif #endif - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -110,50 +96,8 @@ int usbmsc_archinitialize(void) */ #ifndef CONFIG_EXAMPLES_USBMSC_BUILTIN - FAR struct sdio_dev_s *sdio; - int ret; - - /* First, get an instance of the SDIO interface */ - - message("usbmsc_archinitialize: " - "Initializing SDIO slot %d\n", - STM32_MMCSDSLOTNO); - - sdio = sdio_initialize(STM32_MMCSDSLOTNO); - if (!sdio) - { - message("usbmsc_archinitialize: Failed to initialize SDIO slot %d\n", - STM32_MMCSDSLOTNO); - return -ENODEV; - } - - /* Now bind the SDIO interface to the MMC/SD driver */ - - message("usbmsc_archinitialize: " - "Bind SDIO to the MMC/SD driver, minor=%d\n", - CONFIG_EXAMPLES_USBMSC_DEVMINOR1); - - ret = mmcsd_slotinitialize(CONFIG_EXAMPLES_USBMSC_DEVMINOR1, sdio); - if (ret != OK) - { - message("usbmsc_archinitialize: " - "Failed to bind SDIO to the MMC/SD driver: %d\n", - ret); - return ret; - } - message("usbmsc_archinitialize: " - "Successfully bound SDIO to the MMC/SD driver\n"); - - /* Then let's guess and say that there is a card in the slot. I need to check to - * see if the Shenzhou board supports a GPIO to detect if there is a card in - * the slot. - */ - - sdio_mediachange(sdio, true); - -#endif /* CONFIG_EXAMPLES_USBMSC_BUILTIN */ - - return OK; + return stm32_sdinitialize(CONFIG_EXAMPLES_USBMSC_DEVMINOR1); +#else + return OK; +#endif } - -#endif /* CONFIG_STM32_SDIO */ diff --git a/nuttx/tools/configure.sh b/nuttx/tools/configure.sh index 7ac4b8a3c..3b68fe3f6 100755 --- a/nuttx/tools/configure.sh +++ b/nuttx/tools/configure.sh @@ -125,8 +125,9 @@ newconfig=`grep CONFIG_NUTTX_NEWCONFIG= "${configpath}/defconfig" | cut -d'=' -f defappdir=y if [ -z "${appdir}" ]; then - appdir=`grep CONFIG_APPS_DIR= "${configpath}/defconfig" | cut -d'=' -f2` + quoted=`grep "^CONFIG_APPS_DIR=" "${configpath}/defconfig" | cut -d'=' -f2` if [ ! -z "${appdir}" ]; then + appdir=`echo ${quoted} | sed -e "s/\"//g"` defappdir=n fi fi @@ -174,6 +175,18 @@ chmod 755 "${TOPDIR}/setenv.sh" install -C "${configpath}/defconfig" "${TOPDIR}/.configX" || \ { echo "Failed to copy ${configpath}/defconfig" ; exit 9 ; } +# If we did not use the CONFIG_APPS_DIR that was in the defconfig config file, +# then append the correct application information to the tail of the .config +# file + +if [ "X${defappdir}" = "Xy" ]; then + sed -i -e "/^CONFIG_APPS_DIR/d" "${TOPDIR}/.configX" + echo "" >> "${TOPDIR}/.configX" + echo "# Application configuration" >> "${TOPDIR}/.configX" + echo "" >> "${TOPDIR}/.configX" + echo "CONFIG_APPS_DIR=\"$appdir\"" >> "${TOPDIR}/.configX" +fi + # Copy appconfig file. The appconfig file will be copied to ${appdir}/.config # if both (1) ${appdir} is defined and (2) we are not using the new configuration # (which does not require a .config file in the appsdir. @@ -184,14 +197,6 @@ if [ ! -z "${appdir}" -a "X${newconfig}" != "Xy" ]; then else install -C "${configpath}/appconfig" "${TOPDIR}/${appdir}/.config" || \ { echo "Failed to copy ${configpath}/appconfig" ; exit 10 ; } - - if [ "X${defappdir}" = "Xy" ]; then - sed -i -e "/^CONFIG_APPS_DIR/d" "${TOPDIR}/.configX" - echo "" >> "${TOPDIR}/.configX" - echo "# Application configuration" >> "${TOPDIR}/.configX" - echo "" >> "${TOPDIR}/.configX" - echo "CONFIG_APPS_DIR=\"$appdir\"" >> "${TOPDIR}/.configX" - fi fi fi -- cgit v1.2.3