From 717f359037ef924f9eaf59d77d7f5721106fabf8 Mon Sep 17 00:00:00 2001
From: patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>
Date: Sat, 2 Mar 2013 14:23:17 +0000
Subject: More lpc1788 updates

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5697 42af7a65-404d-4744-a932-0658087f49c3
---
 nuttx/arch/arm/src/lpc17xx/lpc17_clockconfig.c | 38 ++++++++++++++------------
 nuttx/arch/arm/src/lpc17xx/lpc17_lowputc.c     |  5 +---
 nuttx/configs/open1788/include/board.h         |  2 +-
 3 files changed, 23 insertions(+), 22 deletions(-)

diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_clockconfig.c b/nuttx/arch/arm/src/lpc17xx/lpc17_clockconfig.c
index 2ea4126ad..9dc033d2d 100644
--- a/nuttx/arch/arm/src/lpc17xx/lpc17_clockconfig.c
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_clockconfig.c
@@ -127,6 +127,7 @@ void lpc17_clockconfig(void)
 
   while ((getreg32(LPC17_SYSCON_PLL0STAT) & SYSCON_PLL0STAT_PLOCK) == 0);
 
+#  if defined(LPC176x)
   /* Enable and connect PLL0 */
 
   putreg32(SYSCON_PLLCON_PLLE|SYSCON_PLLCON_PLLC, LPC17_SYSCON_PLL0CON);
@@ -134,14 +135,12 @@ void lpc17_clockconfig(void)
   putreg32(0x55, LPC17_SYSCON_PLL0FEED);
 
   /* Wait for PLL to report that it is connected and enabled */
-#   if defined(LPC176x)
+
   while ((getreg32(LPC17_SYSCON_PLL0STAT) & (SYSCON_PLL0STAT_PLLE|SYSCON_PLL0STAT_PLLC))
           != (SYSCON_PLL0STAT_PLLE|SYSCON_PLL0STAT_PLLC));
-#   elif defined(LPC178x)
-  while ((getreg32(LPC17_SYSCON_PLL0STAT) & (SYSCON_PLL0STAT_PLLE))
-          != (SYSCON_PLL0STAT_PLLE));
-#   endif
-#endif
+
+#  endif /* LPC176x */
+#endif /* CONFIG_LPC17_PLL0 */
 
   /* PLL1 receives its clock input from the main oscillator only and can be used to
    * provide a fixed 48 MHz clock only to the USB subsystem (if that clock cannot be
@@ -170,6 +169,7 @@ void lpc17_clockconfig(void)
 
   while ((getreg32(LPC17_SYSCON_PLL1STAT) & SYSCON_PLL1STAT_PLOCK) == 0);
 
+#  if defined(LPC176x)
   /* Enable and connect PLL1 */
 
   putreg32(SYSCON_PLLCON_PLLE|SYSCON_PLLCON_PLLC, LPC17_SYSCON_PLL1CON);
@@ -177,30 +177,34 @@ void lpc17_clockconfig(void)
   putreg32(0x55, LPC17_SYSCON_PLL1FEED);
 
   /* Wait for PLL to report that it is connected and enabled */
-#   if defined(LPC176x)
+
   while ((getreg32(LPC17_SYSCON_PLL1STAT) & (SYSCON_PLL1STAT_PLLE|SYSCON_PLL1STAT_PLLC))
          != (SYSCON_PLL1STAT_PLLE|SYSCON_PLL1STAT_PLLC));
-#   elif defined(LPC178x)
-  while ((getreg32(LPC17_SYSCON_PLL1STAT) & (SYSCON_PLL1STAT_PLLE))
-          != (SYSCON_PLL1STAT_PLLE));
-#   endif
-#else
+
+#  endif
+#else /* CONFIG_LPC17_PLL1 */
+
   /* Otherwise, setup up the USB clock divider to generate the USB clock from PLL0 */
+
 #ifdef LPC176x
   putreg32(BOARD_USBCLKCFG_VALUE, LPC17_SYSCON_USBCLKCFG);
 #endif
-#endif /* LPC176x */
+#endif /* CONFIG_LPC17_PLL1 */
 
   /* Disable all peripheral clocks.  They must be configured by each device driver
    * when the device driver is initialized.
    */
 
-# if defined(LPC176x)
+#ifdef LPC176x
   putreg32(0, LPC17_SYSCON_PCLKSEL0);
   putreg32(0, LPC17_SYSCON_PCLKSEL1);
-# elif defined(LPC178x)
-  putreg32(0, LPC17_SYSCON_PCLKSEL);
-# endif
+#endif
+
+  /* Set the peripheral clock (PCLK) divider that is used by all APB peripherals. */
+
+#ifdef LPC178x
+  putreg32(BOARD_PCLKDIV, LPC17_SYSCON_PCLKSEL);
+#endif
 
   /* Disable power to all peripherals (execpt GPIO).  Peripherals must be re-powered
    * one at a time by each device driver when the driver is initialized.
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_lowputc.c b/nuttx/arch/arm/src/lpc17xx/lpc17_lowputc.c
index b41cbe0bd..424fe1899 100644
--- a/nuttx/arch/arm/src/lpc17xx/lpc17_lowputc.c
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_lowputc.c
@@ -318,7 +318,7 @@ void lpc17_lowsetup(void)
  * clocking for all other UARTs
  */
 
-#if defined(LPC176x)
+#ifdef LPC176x
   regval = getreg32(LPC17_SYSCON_PCLKSEL0);
   regval &= ~(SYSCON_PCLKSEL0_UART0_MASK|SYSCON_PCLKSEL0_UART1_MASK);
 #if defined(CONFIG_UART0_SERIAL_CONSOLE)
@@ -336,9 +336,6 @@ void lpc17_lowsetup(void)
   regval |= (CONSOLE_CCLKDIV << SYSCON_PCLKSEL1_UART3_SHIFT);
 #endif
   putreg32(regval, LPC17_SYSCON_PCLKSEL1);
-
-#elif defined(LPC178x)
-  putreg32(LPC17_PCLKDIV, LPC17_SYSCON_PCLKSEL);
 #endif
 
   /* Configure UART pins for the selected CONSOLE */
diff --git a/nuttx/configs/open1788/include/board.h b/nuttx/configs/open1788/include/board.h
index c09bdfc3d..e03116cc9 100644
--- a/nuttx/configs/open1788/include/board.h
+++ b/nuttx/configs/open1788/include/board.h
@@ -71,7 +71,7 @@
  */
 
 #define LPC17_CCLK                 120000000 /* 120Mhz */
-#define LPC17_PCLKDIV              2         /* Peripheral clock = LPC17_CCLK/2 */
+#define BOARD_PCLKDIV              2         /* Peripheral clock = LPC17_CCLK/2 */
 
 /* Select the main oscillator as the frequency source.  SYSCLK is then the frequency
  * of the main oscillator.
-- 
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