From 723c00ad0155a4e4c253a10864e83455fc88850e Mon Sep 17 00:00:00 2001 From: patacongo Date: Wed, 9 Jan 2013 19:49:16 +0000 Subject: Re-partition Stellaris vector logic git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5499 42af7a65-404d-4744-a932-0658087f49c3 --- nuttx/arch/arm/include/lm/irq.h | 281 +---------------- nuttx/arch/arm/include/lm/lm3s_irq.h | 424 +++++++++++++++++++++++++ nuttx/arch/arm/src/lm/chip/lm3s_vectors.h | 439 ++++++++++++++++++++++++++ nuttx/arch/arm/src/lm/chip/lm_memorymap.h | 4 +- nuttx/arch/arm/src/lm/chip/lm_pinmap.h | 4 +- nuttx/arch/arm/src/lm/chip/lm_vectors.h | 64 ++++ nuttx/arch/arm/src/lm/lm_vectors.S | 498 +----------------------------- 7 files changed, 963 insertions(+), 751 deletions(-) create mode 100644 nuttx/arch/arm/include/lm/lm3s_irq.h create mode 100644 nuttx/arch/arm/src/lm/chip/lm3s_vectors.h create mode 100644 nuttx/arch/arm/src/lm/chip/lm_vectors.h diff --git a/nuttx/arch/arm/include/lm/irq.h b/nuttx/arch/arm/include/lm/irq.h index 9a5a3d153..3b984a826 100644 --- a/nuttx/arch/arm/include/lm/irq.h +++ b/nuttx/arch/arm/include/lm/irq.h @@ -33,10 +33,6 @@ * ************************************************************************************/ -/* This file should never be included directed but, rather, - * only indirectly through nuttx/irq.h - */ - #ifndef __ARCH_ARM_INCLUDE_LM_IRQ_H #define __ARCH_ARM_INCLUDE_LM_IRQ_H @@ -47,263 +43,18 @@ #include #include -/************************************************************************************ - * Definitions - ************************************************************************************/ - -/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to - * bits in the NVIC. This does, however, waste several words of memory in the IRQ - * to handle mapping tables. - */ - -/* Processor Exceptions (vectors 0-15) */ - -#define LM_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */ - /* Vector 0: Reset stack pointer value */ - /* Vector 1: Reset (not handler as an IRQ) */ -#define LM_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */ -#define LM_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */ -#define LM_IRQ_MEMFAULT (4) /* Vector 4: Memory management (MPU) */ -#define LM_IRQ_BUSFAULT (5) /* Vector 5: Bus fault */ -#define LM_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */ -#define LM_IRQ_SVCALL (11) /* Vector 11: SVC call */ -#define LM_IRQ_DBGMONITOR (12) /* Vector 12: Debug Monitor */ - /* Vector 13: Reserved */ -#define LM_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */ -#define LM_IRQ_SYSTICK (15) /* Vector 15: System tick */ - -/* External interrupts (vectors >= 16) */ - -#define LM_IRQ_INTERRUPTS (16) /* Vector number of the first external interrupt */ -#if defined(CONFIG_ARCH_CHIP_LM3S6918) - -# define LM_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */ -# define LM_IRQ_GPIOB (17) /* Vector 17: GPIO Port B */ -# define LM_IRQ_GPIOC (18) /* Vector 18: GPIO Port C */ -# define LM_IRQ_GPIOD (19) /* Vector 19: GPIO Port D */ -# define LM_IRQ_GPIOE (20) /* Vector 20: GPIO Port E */ -# define LM_IRQ_UART0 (21) /* Vector 21: UART 0 */ -# define LM_IRQ_UART1 (22) /* Vector 22: UART 1 */ -# define LM_IRQ_SSI0 (23) /* Vector 23: SSI 0 */ -# define LM_IRQ_I2C0 (24) /* Vector 24: I2C 0 */ - /* Vector 25-29: Reserved */ -# define LM_IRQ_ADC0 (30) /* Vector 30: ADC Sequence 0 */ -# define LM_IRQ_ADC1 (31) /* Vector 31: ADC Sequence 1 */ -# define LM_IRQ_ADC2 (32) /* Vector 32: ADC Sequence 2 */ -# define LM_IRQ_ADC3 (33) /* Vector 33: ADC Sequence 3 */ -# define LM_IRQ_WDOG (34) /* Vector 34: Watchdog Timer */ -# define LM_IRQ_TIMER0A (35) /* Vector 35: Timer 0 A */ -# define LM_IRQ_TIMER0B (36) /* Vector 36: Timer 0 B */ -# define LM_IRQ_TIMER1A (37) /* Vector 37: Timer 1 A */ -# define LM_IRQ_TIMER1B (38) /* Vector 38: Timer 1 B */ -# define LM_IRQ_TIMER2A (39) /* Vector 39: Timer 2 A */ -# define LM_IRQ_TIMER2B (40) /* Vector 40: Timer 3 B */ -# define LM_IRQ_COMPARE0 (41) /* Vector 41: Analog Comparator 0 */ -# define LM_IRQ_COMPARE1 (42) /* Vector 42: Analog Comparator 1 */ - /* Vector 43: Reserved */ -# define LM_IRQ_SYSCON (44) /* Vector 44: System Control */ -# define LM_IRQ_FLASHCON (45) /* Vector 45: FLASH Control */ -# define LM_IRQ_GPIOF (46) /* Vector 46: GPIO Port F */ -# define LM_IRQ_GPIOG (47) /* Vector 47: GPIO Port G */ -# define LM_IRQ_GPIOH (48) /* Vector 48: GPIO Port H */ - /* Vector 49: Reserved */ -# define LM_IRQ_SSI1 (50) /* Vector 50: SSI 1 */ -# define LM_IRQ_TIMER3A (51) /* Vector 51: Timer 3 A */ -# define LM_IRQ_TIMER3B (52) /* Vector 52: Timer 3 B */ -# define LM_IRQ_I2C1 (53) /* Vector 53: I2C 1 */ - /* Vectors 54-57: Reserved */ -# define LM_IRQ_ETHCON (58) /* Vector 58: Ethernet Controller */ -# define LM_IRQ_HIBERNATE (59) /* Vector 59: Hibernation Module */ - /* Vectors 60-70: Reserved */ -# define NR_IRQS (60) /* (Really less because of reserved vectors) */ -#elif defined(CONFIG_ARCH_CHIP_LM3S6432) -# define LM_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */ -# define LM_IRQ_GPIOB (17) /* Vector 17: GPIO Port B */ -# define LM_IRQ_GPIOC (18) /* Vector 18: GPIO Port C */ -# define LM_IRQ_GPIOD (19) /* Vector 19: GPIO Port D */ -# define LM_IRQ_GPIOE (20) /* Vector 20: GPIO Port E */ -# define LM_IRQ_UART0 (21) /* Vector 21: UART 0 */ -# define LM_IRQ_UART1 (22) /* Vector 22: UART 1 */ -# define LM_IRQ_SSI0 (23) /* Vector 23: SSI 0 */ -# define LM_IRQ_I2C0 (24) /* Vector 24: I2C 0 */ - /* Vector 25: Reserved */ -# define LM_IRQ_PWM0 (26) /* Vector 26: PWM Generator 0 */ - /* Vectors 27-29: Reserved */ -# define LM_IRQ_ADC0 (30) /* Vector 30: ADC Sequence 0 */ -# define LM_IRQ_ADC1 (31) /* Vector 31: ADC Sequence 1 */ -# define LM_IRQ_ADC2 (32) /* Vector 32: ADC Sequence 2 */ -# define LM_IRQ_ADC3 (33) /* Vector 33: ADC Sequence 3 */ -# define LM_IRQ_WDOG (34) /* Vector 34: Watchdog Timer */ -# define LM_IRQ_TIMER0A (35) /* Vector 35: Timer 0 A */ -# define LM_IRQ_TIMER0B (36) /* Vector 36: Timer 0 B */ -# define LM_IRQ_TIMER1A (37) /* Vector 37: Timer 1 A */ -# define LM_IRQ_TIMER1B (38) /* Vector 38: Timer 1 B */ -# define LM_IRQ_TIMER2A (39) /* Vector 39: Timer 2 A */ -# define LM_IRQ_TIMER2B (40) /* Vector 40: Timer 3 B */ -# define LM_IRQ_COMPARE0 (41) /* Vector 41: Analog Comparator 0 */ -# define LM_IRQ_COMPARE1 (42) /* Vector 42: Analog Comparator 1 */ - /* Vector 43: Reserved */ -# define LM_IRQ_SYSCON (44) /* Vector 44: System Control */ -# define LM_IRQ_FLASHCON (45) /* Vector 45: FLASH Control */ -# define LM_IRQ_GPIOF (46) /* Vector 46: GPIO Port F */ -# define LM_IRQ_GPIOG (47) /* Vector 47: GPIO Port G */ - /* Vectors 48-57: Reserved */ -# define LM_IRQ_ETHCON (58) /* Vector 58: Ethernet Controller */ - /* Vectors 59-70: Reserved */ -# define NR_IRQS (60) /* (Really less because of reserved vectors) */ -#elif defined(CONFIG_ARCH_CHIP_LM3S6965) -# define LM_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */ -# define LM_IRQ_GPIOB (17) /* Vector 17: GPIO Port B */ -# define LM_IRQ_GPIOC (18) /* Vector 18: GPIO Port C */ -# define LM_IRQ_GPIOD (19) /* Vector 19: GPIO Port D */ -# define LM_IRQ_GPIOE (20) /* Vector 20: GPIO Port E */ -# define LM_IRQ_UART0 (21) /* Vector 21: UART 0 */ -# define LM_IRQ_UART1 (22) /* Vector 22: UART 1 */ -# define LM_IRQ_SSI0 (23) /* Vector 23: SSI 0 */ -# define LM_IRQ_I2C0 (24) /* Vector 24: I2C 0 */ -# define LM_IRQ_PWMFAULT (25) /* Vector 25: PWM Fault */ -# define LM_IRQ_PWM0 (26) /* Vector 26: PWM Generator 0 */ -# define LM_IRQ_PWM1 (27) /* Vector 27: PWM Generator 1 */ -# define LM_IRQ_PWM2 (28) /* Vector 28: PWM Generator 2 */ -# define LM_IRQ_QEI0 (29) /* Vector 29: QEI0 */ -# define LM_IRQ_ADC0 (30) /* Vector 30: ADC Sequence 0 */ -# define LM_IRQ_ADC1 (31) /* Vector 31: ADC Sequence 1 */ -# define LM_IRQ_ADC2 (32) /* Vector 32: ADC Sequence 2 */ -# define LM_IRQ_ADC3 (33) /* Vector 33: ADC Sequence 3 */ -# define LM_IRQ_WDOG (34) /* Vector 34: Watchdog Timer */ -# define LM_IRQ_TIMER0A (35) /* Vector 35: Timer 0 A */ -# define LM_IRQ_TIMER0B (36) /* Vector 36: Timer 0 B */ -# define LM_IRQ_TIMER1A (37) /* Vector 37: Timer 1 A */ -# define LM_IRQ_TIMER1B (38) /* Vector 38: Timer 1 B */ -# define LM_IRQ_TIMER2A (39) /* Vector 39: Timer 2 A */ -# define LM_IRQ_TIMER2B (40) /* Vector 40: Timer 3 B */ -# define LM_IRQ_COMPARE0 (41) /* Vector 41: Analog Comparator 0 */ -# define LM_IRQ_COMPARE1 (42) /* Vector 42: Analog Comparator 1 */ - /* Vector 43: Reserved */ -# define LM_IRQ_SYSCON (44) /* Vector 44: System Control */ -# define LM_IRQ_FLASHCON (45) /* Vector 45: FLASH Control */ -# define LM_IRQ_GPIOF (46) /* Vector 46: GPIO Port F */ -# define LM_IRQ_GPIOG (47) /* Vector 47: GPIO Port G */ - /* Vector 48: Reserved */ -# define LM_IRQ_UART2 (49) /* Vector 49: UART 2 */ - /* Vector 50: Reserved */ -# define LM_IRQ_TIMER3A (51) /* Vector 51: Timer 3 A */ -# define LM_IRQ_TIMER3B (52) /* Vector 52: Timer 3 B */ -# define LM_IRQ_I2C1 (53) /* Vector 53: I2C 1 */ -# define LM_IRQ_QEI1 (54) /* Vector 54: QEI1 */ - /* Vectors 55-57: Reserved */ -# define LM_IRQ_ETHCON (58) /* Vector 58: Ethernet Controller */ -# define LM_IRQ_HIBERNATE (59) /* Vector 59: Hibernation Module */ - /* Vectors 60-70: Reserved */ -# define NR_IRQS (60) /* (Really less because of reserved vectors) */ -#elif defined(CONFIG_ARCH_CHIP_LM3S9B96) -# define LM_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */ -# define LM_IRQ_GPIOB (17) /* Vector 17: GPIO Port B */ -# define LM_IRQ_GPIOC (18) /* Vector 18: GPIO Port C */ -# define LM_IRQ_GPIOD (19) /* Vector 19: GPIO Port D */ -# define LM_IRQ_GPIOE (20) /* Vector 20: GPIO Port E */ -# define LM_IRQ_UART0 (21) /* Vector 21: UART 0 */ -# define LM_IRQ_UART1 (22) /* Vector 22: UART 1 */ -# define LM_IRQ_SSI0 (23) /* Vector 23: SSI 0 */ -# define LM_IRQ_I2C0 (24) /* Vector 24: I2C 0 */ -# define LM_IRQ_PWMFAULT (25) /* Vector 25: PWM Fault */ -# define LM_IRQ_PWM0 (26) /* Vector 26: PWM Generator 0 */ -# define LM_IRQ_PWM1 (27) /* Vector 27: PWM Generator 1 */ -# define LM_IRQ_PWM2 (28) /* Vector 28: PWM Generator 2 */ -# define LM_IRQ_QEI0 (29) /* Vector 29: QEI0 */ -# define LM_IRQ_ADC0 (30) /* Vector 30: ADC0 Sequence 0 */ -# define LM_IRQ_ADC1 (31) /* Vector 31: ADC0 Sequence 1 */ -# define LM_IRQ_ADC2 (32) /* Vector 32: ADC0 Sequence 2 */ -# define LM_IRQ_ADC3 (33) /* Vector 33: ADC0 Sequence 3 */ -# define LM_IRQ_WDOG (34) /* Vector 34: Watchdog Timer */ -# define LM_IRQ_TIMER0A (35) /* Vector 35: Timer 0 A */ -# define LM_IRQ_TIMER0B (36) /* Vector 36: Timer 0 B */ -# define LM_IRQ_TIMER1A (37) /* Vector 37: Timer 1 A */ -# define LM_IRQ_TIMER1B (38) /* Vector 38: Timer 1 B */ -# define LM_IRQ_TIMER2A (39) /* Vector 39: Timer 2 A */ -# define LM_IRQ_TIMER2B (40) /* Vector 40: Timer 3 B */ -# define LM_IRQ_COMPARE0 (41) /* Vector 41: Analog Comparator 0 */ -# define LM_IRQ_COMPARE1 (42) /* Vector 42: Analog Comparator 1 */ -# define LM_IRQ_COMPARE2 (43) /* Vector 43: Analog Comparator 3 */ -# define LM_IRQ_SYSCON (44) /* Vector 44: System Control */ -# define LM_IRQ_FLASHCON (45) /* Vector 45: FLASH Control */ -# define LM_IRQ_GPIOF (46) /* Vector 46: GPIO Port F */ -# define LM_IRQ_GPIOG (47) /* Vector 47: GPIO Port G */ -# define LM_IRQ_GPIOH (48) /* Vector 48: GPIO Port H */ -# define LM_IRQ_UART2 (49) /* Vector 49: UART 2 */ -# define LM_IRQ_SSI1 (50) /* Vector 50: SSI 1 */ -# define LM_IRQ_TIMER3A (51) /* Vector 51: Timer 3 A */ -# define LM_IRQ_TIMER3B (52) /* Vector 52: Timer 3 B */ -# define LM_IRQ_I2C1 (53) /* Vector 53: I2C 1 */ -# define LM_IRQ_QEI1 (54) /* Vector 54: QEI1 */ -# define LM_IRQ_CAN0 (55) /* Vector 55: CAN 1 */ -# define LM_IRQ_CAN1 (56) /* Vector 56: CAN 2 */ - /* Vector 57: Reserved */ -# define LM_IRQ_ETHCON (58) /* Vector 58: Ethernet Controller */ - /* Vector 59: Reserved */ -# define LM_IRQ_USB (60) /* Vector 60: USB */ -# define LM_IRQ_PWM3 (61) /* Vector 61: PWM Generator 3 */ -# define LM_IRQ_UDMASOFT (62) /* Vector 62: uDMA Software */ -# define LM_IRQ_UDMAERROR (63) /* Vector 63: uDMA Error */ -# define LM_IRQ_ADC1_0 (64) /* Vector 64: ADC1 Sequence 0 */ -# define LM_IRQ_ADC1_1 (65) /* Vector 65: ADC1 Sequence 1 */ -# define LM_IRQ_ADC1_2 (66) /* Vector 66: ADC1 Sequence 2 */ -# define LM_IRQ_ADC1_3 (67) /* Vector 67: ADC1 Sequence 3 */ -# define LM_IRQ_I2S0 (68) /* Vector 68: I2S0 */ -# define LM_IRQ_EPI (69) /* Vector 69: EPI */ -# define LM_IRQ_GPIOJ (70) /* Vector 70: GPIO Port J */ - /* Vector 71: Reserved */ -# define NR_IRQS (71) /* (Really less because of reserved vectors) */ -#elif defined(CONFIG_ARCH_CHIP_LM3S8962) -# define LM_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */ -# define LM_IRQ_GPIOB (17) /* Vector 17: GPIO Port B */ -# define LM_IRQ_GPIOC (18) /* Vector 18: GPIO Port C */ -# define LM_IRQ_GPIOD (19) /* Vector 19: GPIO Port D */ -# define LM_IRQ_GPIOE (20) /* Vector 20: GPIO Port E */ -# define LM_IRQ_UART0 (21) /* Vector 21: UART 0 */ -# define LM_IRQ_UART1 (22) /* Vector 22: UART 1 */ -# define LM_IRQ_SSI0 (23) /* Vector 23: SSI 0 */ -# define LM_IRQ_I2C0 (24) /* Vector 24: I2C 0 */ -# define LM_IRQ_PWMFAULT (25) /* Vector 25: PWM Fault */ -# define LM_IRQ_PWM0 (26) /* Vector 26: PWM Generator 0 */ -# define LM_IRQ_PWM1 (27) /* Vector 27: PWM Generator 1 */ -# define LM_IRQ_PWM2 (28) /* Vector 28: PWM Generator 2 */ -# define LM_IRQ_QEI0 (29) /* Vector 29: QEI0 */ -# define LM_IRQ_ADC0 (30) /* Vector 30: ADC Sequence 0 */ -# define LM_IRQ_ADC1 (31) /* Vector 31: ADC Sequence 1 */ -# define LM_IRQ_ADC2 (32) /* Vector 32: ADC Sequence 2 */ -# define LM_IRQ_ADC3 (33) /* Vector 33: ADC Sequence 3 */ -# define LM_IRQ_WDOG (34) /* Vector 34: Watchdog Timer */ -# define LM_IRQ_TIMER0A (35) /* Vector 35: Timer 0 A */ -# define LM_IRQ_TIMER0B (36) /* Vector 36: Timer 0 B */ -# define LM_IRQ_TIMER1A (37) /* Vector 37: Timer 1 A */ -# define LM_IRQ_TIMER1B (38) /* Vector 38: Timer 1 B */ -# define LM_IRQ_TIMER2A (39) /* Vector 39: Timer 2 A */ -# define LM_IRQ_TIMER2B (40) /* Vector 40: Timer 3 B */ -# define LM_IRQ_COMPARE0 (41) /* Vector 41: Analog Comparator 0 */ - /* Vector 42: Reserved */ - /* Vector 43: Reserved */ -# define LM_IRQ_SYSCON (44) /* Vector 44: System Control */ -# define LM_IRQ_FLASHCON (45) /* Vector 45: FLASH Control */ -# define LM_IRQ_GPIOF (46) /* Vector 46: GPIO Port F */ -# define LM_IRQ_GPIOG (47) /* Vector 47: GPIO Port G */ - /* Vector 48: Reserved */ - /* Vector 49: Reserved */ - /* Vector 50: Reserved */ -# define LM_IRQ_TIMER3A (51) /* Vector 51: Timer 3 A */ -# define LM_IRQ_TIMER3B (52) /* Vector 52: Timer 3 B */ -# define LM_IRQ_I2C1 (53) /* Vector 53: I2C 1 */ -# define LM_IRQ_QEI1 (54) /* Vector 54: QEI1 */ -# define LM_IRQ_CAN0 (54) /* Vector 55: CAN0 */ - /* Vectors 56-57: Reserved */ -# define LM_IRQ_ETHCON (58) /* Vector 58: Ethernet Controller */ -# define LM_IRQ_HIBERNATE (59) /* Vector 59: Hibernation Module */ - /* Vectors 60-70: Reserved */ -# define NR_IRQS (60) /* (Really less because of reserved vectors) */ +#if defined(CONFIG_ARCH_CHIP_LM3S) +# include +#elif defined(CONFIG_ARCH_CHIP_LM4F) +# include #else -# error "IRQ Numbers not specified for this Stellaris chip" +# error "Unsupported Stellaris IRQ file" #endif +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + /* GPIO IRQs -- Note that support for individual GPIO ports can * be disabled in order to reduce the size of the implemenation. */ @@ -446,10 +197,8 @@ #ifndef __ASSEMBLY__ #ifdef __cplusplus -#define EXTERN extern "C" -extern "C" { -#else -#define EXTERN extern +extern "C" +{ #endif /************************************************************************************ @@ -464,7 +213,7 @@ extern "C" { * ****************************************************************************/ -EXTERN int gpio_irqattach(int irq, xcpt_t isr); +int gpio_irqattach(int irq, xcpt_t isr); #define gpio_irqdetach(isr) gpio_irqattach(isr, NULL) /**************************************************************************** @@ -475,7 +224,7 @@ EXTERN int gpio_irqattach(int irq, xcpt_t isr); * ****************************************************************************/ -EXTERN void gpio_irqenable(int irq); +void gpio_irqenable(int irq); /**************************************************************************** * Name: gpio_irqdisable @@ -485,13 +234,11 @@ EXTERN void gpio_irqenable(int irq); * ****************************************************************************/ -EXTERN void gpio_irqdisable(int irq); +void gpio_irqdisable(int irq); -#undef EXTERN #ifdef __cplusplus } #endif #endif #endif /* __ARCH_ARM_INCLUDE_LM_IRQ_H */ - diff --git a/nuttx/arch/arm/include/lm/lm3s_irq.h b/nuttx/arch/arm/include/lm/lm3s_irq.h new file mode 100644 index 000000000..a9d0640d9 --- /dev/null +++ b/nuttx/arch/arm/include/lm/lm3s_irq.h @@ -0,0 +1,424 @@ +/************************************************************************************ + * arch/arm/include/lm/lm3s_irq.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_INCLUDE_LM_LM3S_IRQ_H +#define __ARCH_ARM_INCLUDE_LM_LM3S_IRQ_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Definitions + ************************************************************************************/ + +/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to + * bits in the NVIC. This does, however, waste several words of memory in the IRQ + * to handle mapping tables. + */ + +/* Processor Exceptions (vectors 0-15) */ + +#define LM_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */ + /* Vector 0: Reset stack pointer value */ + /* Vector 1: Reset (not handler as an IRQ) */ +#define LM_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */ +#define LM_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */ +#define LM_IRQ_MEMFAULT (4) /* Vector 4: Memory management (MPU) */ +#define LM_IRQ_BUSFAULT (5) /* Vector 5: Bus fault */ +#define LM_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */ +#define LM_IRQ_SVCALL (11) /* Vector 11: SVC call */ +#define LM_IRQ_DBGMONITOR (12) /* Vector 12: Debug Monitor */ + /* Vector 13: Reserved */ +#define LM_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */ +#define LM_IRQ_SYSTICK (15) /* Vector 15: System tick */ + +/* External interrupts (vectors >= 16) */ + +#define LM_IRQ_INTERRUPTS (16) /* Vector number of the first external interrupt */ +#if defined(CONFIG_ARCH_CHIP_LM3S6918) + +# define LM_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */ +# define LM_IRQ_GPIOB (17) /* Vector 17: GPIO Port B */ +# define LM_IRQ_GPIOC (18) /* Vector 18: GPIO Port C */ +# define LM_IRQ_GPIOD (19) /* Vector 19: GPIO Port D */ + +# define LM_IRQ_GPIOE (20) /* Vector 20: GPIO Port E */ +# define LM_IRQ_UART0 (21) /* Vector 21: UART 0 */ +# define LM_IRQ_UART1 (22) /* Vector 22: UART 1 */ +# define LM_IRQ_SSI0 (23) /* Vector 23: SSI 0 */ +# define LM_IRQ_I2C0 (24) /* Vector 24: I2C 0 */ +# define LM_RESERVED_25 (25) /* Vector 25: Reserved */ +# define LM_RESERVED_26 (26) /* Vector 26: Reserved */ +# define LM_RESERVED_27 (27) /* Vector 27: Reserved */ +# define LM_RESERVED_28 (28) /* Vector 28: Reserved */ +# define LM_RESERVED_29 (29) /* Vector 29: Reserved */ + +# define LM_IRQ_ADC0 (30) /* Vector 30: ADC Sequence 0 */ +# define LM_IRQ_ADC1 (31) /* Vector 31: ADC Sequence 1 */ +# define LM_IRQ_ADC2 (32) /* Vector 32: ADC Sequence 2 */ +# define LM_IRQ_ADC3 (33) /* Vector 33: ADC Sequence 3 */ +# define LM_IRQ_WDOG (34) /* Vector 34: Watchdog Timer */ +# define LM_IRQ_TIMER0A (35) /* Vector 35: Timer 0 A */ +# define LM_IRQ_TIMER0B (36) /* Vector 36: Timer 0 B */ +# define LM_IRQ_TIMER1A (37) /* Vector 37: Timer 1 A */ +# define LM_IRQ_TIMER1B (38) /* Vector 38: Timer 1 B */ +# define LM_IRQ_TIMER2A (39) /* Vector 39: Timer 2 A */ +# define LM_IRQ_TIMER2B (40) /* Vector 40: Timer 3 B */ + +# define LM_IRQ_COMPARE0 (41) /* Vector 41: Analog Comparator 0 */ +# define LM_IRQ_COMPARE1 (42) /* Vector 42: Analog Comparator 1 */ +# define LM_RESERVED_43 (43) /* Vector 43: Reserved */ +# define LM_IRQ_SYSCON (44) /* Vector 44: System Control */ +# define LM_IRQ_FLASHCON (45) /* Vector 45: FLASH Control */ +# define LM_IRQ_GPIOF (46) /* Vector 46: GPIO Port F */ +# define LM_IRQ_GPIOG (47) /* Vector 47: GPIO Port G */ +# define LM_IRQ_GPIOH (48) /* Vector 48: GPIO Port H */ +# define LM_RESERVED_49 (49) /* Vector 49: Reserved */ + +# define LM_IRQ_SSI1 (50) /* Vector 50: SSI 1 */ +# define LM_IRQ_TIMER3A (51) /* Vector 51: Timer 3 A */ +# define LM_IRQ_TIMER3B (52) /* Vector 52: Timer 3 B */ +# define LM_IRQ_I2C1 (53) /* Vector 53: I2C 1 */ +# define LM_RESERVED_54 (54) /* Vector 54: Reserved */ +# define LM_RESERVED_55 (55) /* Vector 55: Reserved */ +# define LM_RESERVED_56 (56) /* Vector 56: Reserved */ +# define LM_RESERVED_57 (57) /* Vector 57: Reserved */ +# define LM_IRQ_ETHCON (58) /* Vector 58: Ethernet Controller */ +# define LM_IRQ_HIBERNATE (59) /* Vector 59: Hibernation Module */ + +# define LM_RESERVED_60 (60) /* Vector 60: Reserved */ +# define LM_RESERVED_61 (61) /* Vector 61: Reserved */ +# define LM_RESERVED_62 (62) /* Vector 62: Reserved */ +# define LM_RESERVED_63 (63) /* Vector 63: Reserved */ +# define LM_RESERVED_64 (64) /* Vector 64: Reserved */ +# define LM_RESERVED_65 (65) /* Vector 65: Reserved */ +# define LM_RESERVED_66 (66) /* Vector 66: Reserved */ +# define LM_RESERVED_67 (67) /* Vector 67: Reserved */ +# define LM_RESERVED_68 (68) /* Vector 68: Reserved */ +# define LM_RESERVED_69 (69) /* Vector 69: Reserved */ + +# define LM_RESERVED_70 (70) /* Vector 70: Reserved */ + +# define NR_IRQS (60) /* (Really less because of reserved vectors) */ + +#elif defined(CONFIG_ARCH_CHIP_LM3S6432) +# define LM_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */ +# define LM_IRQ_GPIOB (17) /* Vector 17: GPIO Port B */ +# define LM_IRQ_GPIOC (18) /* Vector 18: GPIO Port C */ +# define LM_IRQ_GPIOD (19) /* Vector 19: GPIO Port D */ + +# define LM_IRQ_GPIOE (20) /* Vector 20: GPIO Port E */ +# define LM_IRQ_UART0 (21) /* Vector 21: UART 0 */ +# define LM_IRQ_UART1 (22) /* Vector 22: UART 1 */ +# define LM_IRQ_SSI0 (23) /* Vector 23: SSI 0 */ +# define LM_IRQ_I2C0 (24) /* Vector 24: I2C 0 */ +# define LM_RESERVED_25 (25) /* Vector 25: Reserved */ +# define LM_IRQ_PWM0 (26) /* Vector 26: PWM Generator 0 */ +# define LM_RESERVED_27 (27) /* Vector 27: Reserved */ +# define LM_RESERVED_28 (28) /* Vector 28: Reserved */ +# define LM_RESERVED_29 (29) /* Vector 29: Reserved */ + +# define LM_IRQ_ADC0 (30) /* Vector 30: ADC Sequence 0 */ +# define LM_IRQ_ADC1 (31) /* Vector 31: ADC Sequence 1 */ +# define LM_IRQ_ADC2 (32) /* Vector 32: ADC Sequence 2 */ +# define LM_IRQ_ADC3 (33) /* Vector 33: ADC Sequence 3 */ +# define LM_IRQ_WDOG (34) /* Vector 34: Watchdog Timer */ +# define LM_IRQ_TIMER0A (35) /* Vector 35: Timer 0 A */ +# define LM_IRQ_TIMER0B (36) /* Vector 36: Timer 0 B */ +# define LM_IRQ_TIMER1A (37) /* Vector 37: Timer 1 A */ +# define LM_IRQ_TIMER1B (38) /* Vector 38: Timer 1 B */ +# define LM_IRQ_TIMER2A (39) /* Vector 39: Timer 2 A */ + +# define LM_IRQ_TIMER2B (40) /* Vector 40: Timer 3 B */ +# define LM_IRQ_COMPARE0 (41) /* Vector 41: Analog Comparator 0 */ +# define LM_IRQ_COMPARE1 (42) /* Vector 42: Analog Comparator 1 */ +# define LM_RESERVED_43 (43) /* Vector 43: Reserved */ +# define LM_IRQ_SYSCON (44) /* Vector 44: System Control */ +# define LM_IRQ_FLASHCON (45) /* Vector 45: FLASH Control */ +# define LM_IRQ_GPIOF (46) /* Vector 46: GPIO Port F */ +# define LM_IRQ_GPIOG (47) /* Vector 47: GPIO Port G */ +# define LM_RESERVED_48 (48) /* Vector 48: Reserved */ +# define LM_RESERVED_49 (49) /* Vector 49: Reserved */ + +# define LM_RESERVED_50 (50) /* Vector 50: Reserved */ +# define LM_RESERVED_51 (51) /* Vector 51: Reserved */ +# define LM_RESERVED_52 (52) /* Vector 52: Reserved */ +# define LM_RESERVED_53 (53) /* Vector 53: Reserved */ +# define LM_RESERVED_54 (54) /* Vector 54: Reserved */ +# define LM_RESERVED_55 (55) /* Vector 55: Reserved */ +# define LM_RESERVED_56 (56) /* Vector 56: Reserved */ +# define LM_RESERVED_57 (57) /* Vector 57: Reserved */ +# define LM_IRQ_ETHCON (58) /* Vector 58: Ethernet Controller */ +# define LM_RESERVED_59 (59) /* Vector 59: Reserved */ + +# define LM_RESERVED_60 (60) /* Vector 60: Reserved */ +# define LM_RESERVED_61 (61) /* Vector 61: Reserved */ +# define LM_RESERVED_62 (62) /* Vector 62: Reserved */ +# define LM_RESERVED_63 (63) /* Vector 63: Reserved */ +# define LM_RESERVED_64 (64) /* Vector 64: Reserved */ +# define LM_RESERVED_65 (65) /* Vector 65: Reserved */ +# define LM_RESERVED_66 (66) /* Vector 66: Reserved */ +# define LM_RESERVED_67 (67) /* Vector 67: Reserved */ +# define LM_RESERVED_68 (68) /* Vector 68: Reserved */ +# define LM_RESERVED_69 (69) /* Vector 69: Reserved */ + +# define LM_RESERVED_70 (70) /* Vector 70: Reserved */ + +# define NR_IRQS (60) /* (Really less because of reserved vectors) */ +#elif defined(CONFIG_ARCH_CHIP_LM3S6965) +# define LM_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */ +# define LM_IRQ_GPIOB (17) /* Vector 17: GPIO Port B */ +# define LM_IRQ_GPIOC (18) /* Vector 18: GPIO Port C */ +# define LM_IRQ_GPIOD (19) /* Vector 19: GPIO Port D */ +# define LM_IRQ_GPIOE (20) /* Vector 20: GPIO Port E */ + +# define LM_IRQ_UART0 (21) /* Vector 21: UART 0 */ +# define LM_IRQ_UART1 (22) /* Vector 22: UART 1 */ +# define LM_IRQ_SSI0 (23) /* Vector 23: SSI 0 */ +# define LM_IRQ_I2C0 (24) /* Vector 24: I2C 0 */ +# define LM_IRQ_PWMFAULT (25) /* Vector 25: PWM Fault */ +# define LM_IRQ_PWM0 (26) /* Vector 26: PWM Generator 0 */ +# define LM_IRQ_PWM1 (27) /* Vector 27: PWM Generator 1 */ +# define LM_IRQ_PWM2 (28) /* Vector 28: PWM Generator 2 */ +# define LM_IRQ_QEI0 (29) /* Vector 29: QEI0 */ + +# define LM_IRQ_ADC0 (30) /* Vector 30: ADC Sequence 0 */ +# define LM_IRQ_ADC1 (31) /* Vector 31: ADC Sequence 1 */ +# define LM_IRQ_ADC2 (32) /* Vector 32: ADC Sequence 2 */ +# define LM_IRQ_ADC3 (33) /* Vector 33: ADC Sequence 3 */ +# define LM_IRQ_WDOG (34) /* Vector 34: Watchdog Timer */ +# define LM_IRQ_TIMER0A (35) /* Vector 35: Timer 0 A */ +# define LM_IRQ_TIMER0B (36) /* Vector 36: Timer 0 B */ +# define LM_IRQ_TIMER1A (37) /* Vector 37: Timer 1 A */ +# define LM_IRQ_TIMER1B (38) /* Vector 38: Timer 1 B */ +# define LM_IRQ_TIMER2A (39) /* Vector 39: Timer 2 A */ + +# define LM_IRQ_TIMER2B (40) /* Vector 40: Timer 3 B */ +# define LM_IRQ_COMPARE0 (41) /* Vector 41: Analog Comparator 0 */ +# define LM_IRQ_COMPARE1 (42) /* Vector 42: Analog Comparator 1 */ +# define LM_RESERVED_43 (43) /* Vector 43: Reserved */ +# define LM_IRQ_SYSCON (44) /* Vector 44: System Control */ +# define LM_IRQ_FLASHCON (45) /* Vector 45: FLASH Control */ +# define LM_IRQ_GPIOF (46) /* Vector 46: GPIO Port F */ +# define LM_IRQ_GPIOG (47) /* Vector 47: GPIO Port G */ +# define LM_RESERVED_48 (48) /* Vector 48: Reserved */ +# define LM_IRQ_UART2 (49) /* Vector 49: UART 2 */ + +# define LM_RESERVED_50 (50) /* Vector 50: Reserved */ +# define LM_IRQ_TIMER3A (51) /* Vector 51: Timer 3 A */ +# define LM_IRQ_TIMER3B (52) /* Vector 52: Timer 3 B */ +# define LM_IRQ_I2C1 (53) /* Vector 53: I2C 1 */ +# define LM_IRQ_QEI1 (54) /* Vector 54: QEI1 */ +# define LM_RESERVED_55 (55) /* Vector 55: Reserved */ +# define LM_RESERVED_56 (56) /* Vector 56: Reserved */ +# define LM_RESERVED_57 (57) /* Vector 57: Reserved */ +# define LM_IRQ_ETHCON (58) /* Vector 58: Ethernet Controller */ +# define LM_IRQ_HIBERNATE (59) /* Vector 59: Hibernation Module */ + +# define LM_RESERVED_60 (60) /* Vector 60: Reserved */ +# define LM_RESERVED_61 (61) /* Vector 61: Reserved */ +# define LM_RESERVED_62 (62) /* Vector 62: Reserved */ +# define LM_RESERVED_63 (63) /* Vector 63: Reserved */ +# define LM_RESERVED_64 (64) /* Vector 64: Reserved */ +# define LM_RESERVED_65 (65) /* Vector 65: Reserved */ +# define LM_RESERVED_66 (66) /* Vector 66: Reserved */ +# define LM_RESERVED_67 (67) /* Vector 67: Reserved */ +# define LM_RESERVED_68 (68) /* Vector 68: Reserved */ +# define LM_RESERVED_69 (69) /* Vector 69: Reserved */ + +# define LM_RESERVED_70 (70) /* Vector 70: Reserved */ + +# define NR_IRQS (60) /* (Really less because of reserved vectors) */ +#elif defined(CONFIG_ARCH_CHIP_LM3S9B96) +# define LM_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */ +# define LM_IRQ_GPIOB (17) /* Vector 17: GPIO Port B */ +# define LM_IRQ_GPIOC (18) /* Vector 18: GPIO Port C */ +# define LM_IRQ_GPIOD (19) /* Vector 19: GPIO Port D */ + +# define LM_IRQ_GPIOE (20) /* Vector 20: GPIO Port E */ +# define LM_IRQ_UART0 (21) /* Vector 21: UART 0 */ +# define LM_IRQ_UART1 (22) /* Vector 22: UART 1 */ +# define LM_IRQ_SSI0 (23) /* Vector 23: SSI 0 */ +# define LM_IRQ_I2C0 (24) /* Vector 24: I2C 0 */ +# define LM_IRQ_PWMFAULT (25) /* Vector 25: PWM Fault */ +# define LM_IRQ_PWM0 (26) /* Vector 26: PWM Generator 0 */ +# define LM_IRQ_PWM1 (27) /* Vector 27: PWM Generator 1 */ +# define LM_IRQ_PWM2 (28) /* Vector 28: PWM Generator 2 */ +# define LM_IRQ_QEI0 (29) /* Vector 29: QEI0 */ + +# define LM_IRQ_ADC0 (30) /* Vector 30: ADC0 Sequence 0 */ +# define LM_IRQ_ADC1 (31) /* Vector 31: ADC0 Sequence 1 */ +# define LM_IRQ_ADC2 (32) /* Vector 32: ADC0 Sequence 2 */ +# define LM_IRQ_ADC3 (33) /* Vector 33: ADC0 Sequence 3 */ +# define LM_IRQ_WDOG (34) /* Vector 34: Watchdog Timer */ +# define LM_IRQ_TIMER0A (35) /* Vector 35: Timer 0 A */ +# define LM_IRQ_TIMER0B (36) /* Vector 36: Timer 0 B */ +# define LM_IRQ_TIMER1A (37) /* Vector 37: Timer 1 A */ +# define LM_IRQ_TIMER1B (38) /* Vector 38: Timer 1 B */ +# define LM_IRQ_TIMER2A (39) /* Vector 39: Timer 2 A */ + +# define LM_IRQ_TIMER2B (40) /* Vector 40: Timer 3 B */ +# define LM_IRQ_COMPARE0 (41) /* Vector 41: Analog Comparator 0 */ +# define LM_IRQ_COMPARE1 (42) /* Vector 42: Analog Comparator 1 */ +# define LM_IRQ_COMPARE2 (43) /* Vector 43: Analog Comparator 3 */ +# define LM_IRQ_SYSCON (44) /* Vector 44: System Control */ +# define LM_IRQ_FLASHCON (45) /* Vector 45: FLASH Control */ +# define LM_IRQ_GPIOF (46) /* Vector 46: GPIO Port F */ +# define LM_IRQ_GPIOG (47) /* Vector 47: GPIO Port G */ +# define LM_IRQ_GPIOH (48) /* Vector 48: GPIO Port H */ +# define LM_IRQ_UART2 (49) /* Vector 49: UART 2 */ + +# define LM_IRQ_SSI1 (50) /* Vector 50: SSI 1 */ +# define LM_IRQ_TIMER3A (51) /* Vector 51: Timer 3 A */ +# define LM_IRQ_TIMER3B (52) /* Vector 52: Timer 3 B */ +# define LM_IRQ_I2C1 (53) /* Vector 53: I2C 1 */ +# define LM_IRQ_QEI1 (54) /* Vector 54: QEI1 */ +# define LM_IRQ_CAN0 (55) /* Vector 55: CAN 1 */ +# define LM_IRQ_CAN1 (56) /* Vector 56: CAN 2 */ +# define LM_RESERVED_57 (57) /* Vector 57: Reserved */ +# define LM_IRQ_ETHCON (58) /* Vector 58: Ethernet Controller */ +# define LM_RESERVED_59 (59) /* Vector 59: Reserved */ + +# define LM_IRQ_USB (60) /* Vector 60: USB */ +# define LM_IRQ_PWM3 (61) /* Vector 61: PWM Generator 3 */ +# define LM_IRQ_UDMASOFT (62) /* Vector 62: uDMA Software */ +# define LM_IRQ_UDMAERROR (63) /* Vector 63: uDMA Error */ +# define LM_IRQ_ADC1_0 (64) /* Vector 64: ADC1 Sequence 0 */ +# define LM_IRQ_ADC1_1 (65) /* Vector 65: ADC1 Sequence 1 */ +# define LM_IRQ_ADC1_2 (66) /* Vector 66: ADC1 Sequence 2 */ +# define LM_IRQ_ADC1_3 (67) /* Vector 67: ADC1 Sequence 3 */ +# define LM_IRQ_I2S0 (68) /* Vector 68: I2S0 */ +# define LM_IRQ_EPI (69) /* Vector 69: EPI */ + +# define LM_IRQ_GPIOJ (70) /* Vector 70: GPIO Port J */ +# define LM_RESERVED_71 (71) /* Vector 71: Reserved */ + +# define NR_IRQS (71) /* (Really less because of reserved vectors) */ +#elif defined(CONFIG_ARCH_CHIP_LM3S8962) +# define LM_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */ +# define LM_IRQ_GPIOB (17) /* Vector 17: GPIO Port B */ +# define LM_IRQ_GPIOC (18) /* Vector 18: GPIO Port C */ +# define LM_IRQ_GPIOD (19) /* Vector 19: GPIO Port D */ + +# define LM_IRQ_GPIOE (20) /* Vector 20: GPIO Port E */ +# define LM_IRQ_UART0 (21) /* Vector 21: UART 0 */ +# define LM_IRQ_UART1 (22) /* Vector 22: UART 1 */ +# define LM_IRQ_SSI0 (23) /* Vector 23: SSI 0 */ +# define LM_IRQ_I2C0 (24) /* Vector 24: I2C 0 */ +# define LM_IRQ_PWMFAULT (25) /* Vector 25: PWM Fault */ +# define LM_IRQ_PWM0 (26) /* Vector 26: PWM Generator 0 */ +# define LM_IRQ_PWM1 (27) /* Vector 27: PWM Generator 1 */ +# define LM_IRQ_PWM2 (28) /* Vector 28: PWM Generator 2 */ +# define LM_IRQ_QEI0 (29) /* Vector 29: QEI0 */ + +# define LM_IRQ_ADC0 (30) /* Vector 30: ADC Sequence 0 */ +# define LM_IRQ_ADC1 (31) /* Vector 31: ADC Sequence 1 */ +# define LM_IRQ_ADC2 (32) /* Vector 32: ADC Sequence 2 */ +# define LM_IRQ_ADC3 (33) /* Vector 33: ADC Sequence 3 */ +# define LM_IRQ_WDOG (34) /* Vector 34: Watchdog Timer */ +# define LM_IRQ_TIMER0A (35) /* Vector 35: Timer 0 A */ +# define LM_IRQ_TIMER0B (36) /* Vector 36: Timer 0 B */ +# define LM_IRQ_TIMER1A (37) /* Vector 37: Timer 1 A */ +# define LM_IRQ_TIMER1B (38) /* Vector 38: Timer 1 B */ +# define LM_IRQ_TIMER2A (39) /* Vector 39: Timer 2 A */ +# define LM_IRQ_TIMER2B (40) /* Vector 40: Timer 3 B */ + +# define LM_IRQ_COMPARE0 (41) /* Vector 41: Analog Comparator 0 */ +# define LM_RESERVED_42 (42) /* Vector 42: Reserved */ +# define LM_RESERVED_43 (43) /* Vector 43: Reserved */ +# define LM_IRQ_SYSCON (44) /* Vector 44: System Control */ +# define LM_IRQ_FLASHCON (45) /* Vector 45: FLASH Control */ +# define LM_IRQ_GPIOF (46) /* Vector 46: GPIO Port F */ +# define LM_IRQ_GPIOG (47) /* Vector 47: GPIO Port G */ +# define LM_RESERVED_48 (48) /* Vector 48: Reserved */ +# define LM_RESERVED_49 (49) /* Vector 49: Reserved */ + +# define LM_RESERVED_50 (50) /* Vector 50: Reserved */ +# define LM_IRQ_TIMER3A (51) /* Vector 51: Timer 3 A */ +# define LM_IRQ_TIMER3B (52) /* Vector 52: Timer 3 B */ +# define LM_IRQ_I2C1 (53) /* Vector 53: I2C 1 */ +# define LM_IRQ_QEI1 (54) /* Vector 54: QEI1 */ +# define LM_IRQ_CAN0 (54) /* Vector 55: CAN0 */ +# define LM_RESERVED_56 (56) /* Vector 56: Reserved */ +# define LM_RESERVED_57 (57) /* Vector 57: Reserved */ +# define LM_IRQ_ETHCON (58) /* Vector 58: Ethernet Controller */ +# define LM_IRQ_HIBERNATE (59) /* Vector 59: Hibernation Module */ + +# define LM_RESERVED_60 (60) /* Vector 60: Reserved */ +# define LM_RESERVED_61 (61) /* Vector 61: Reserved */ +# define LM_RESERVED_62 (62) /* Vector 62: Reserved */ +# define LM_RESERVED_63 (63) /* Vector 63: Reserved */ +# define LM_RESERVED_64 (64) /* Vector 64: Reserved */ +# define LM_RESERVED_65 (65) /* Vector 65: Reserved */ +# define LM_RESERVED_66 (66) /* Vector 66: Reserved */ +# define LM_RESERVED_67 (67) /* Vector 67: Reserved */ +# define LM_RESERVED_68 (68) /* Vector 68: Reserved */ +# define LM_RESERVED_69 (69) /* Vector 69: Reserved */ + +# define LM_RESERVED_70 (70) /* Vector 70: Reserved */ + +# define NR_IRQS (60) /* (Really less because of reserved vectors) */ +#else +# error "IRQ Numbers not specified for this Stellaris chip" +#endif + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ +#ifdef __cplusplus +extern "C" +{ +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#ifdef __cplusplus +} +#endif +#endif + +#endif /* __ARCH_ARM_INCLUDE_LM_LM3S_IRQ_H */ + diff --git a/nuttx/arch/arm/src/lm/chip/lm3s_vectors.h b/nuttx/arch/arm/src/lm/chip/lm3s_vectors.h new file mode 100644 index 000000000..58447793d --- /dev/null +++ b/nuttx/arch/arm/src/lm/chip/lm3s_vectors.h @@ -0,0 +1,439 @@ +/************************************************************************************ + * arch/arm/src/lm/chip/lm3s_vectors.S + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Preprocessor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Vectors + ************************************************************************************/ + +/* This file is included by lm_vectors.S. It provides the macro VECTOR that + * supplies ach Stellaris vector in terms of a (lower-case) ISR label and an + * (upper-case) IRQ number as defined in arch/arm/include/lm/lm3s_irq.h. + * lm_vectors.S will define the VECTOR in different ways in order to generate + * the interrupt vectors and handlers in their final form. + */ + +#if defined(CONFIG_ARCH_CHIP_LM3S6918) + +/* If the common ARMv7-M vector handling is used, then all it needs is the following + * definition that provides the number of supported vectors. + */ + +#ifdef CONFIG_ARMV7M_CMNVECTOR + +/* Reserve 71 interrupt table entries for I/O interrupts. */ + +# define ARMV7M_PERIPHERAL_INTERRUPTS 71 + +#else + +VECTOR(lm_gpioa, LM_IRQ_GPIOA) /* Vector 16: GPIO Port A */ +VECTOR(lm_gpiob, LM_IRQ_GPIOB) /* Vector 17: GPIO Port B */ +VECTOR(lm_gpioc, LM_IRQ_GPIOC) /* Vector 18: GPIO Port C */ +VECTOR(lm_gpiod, LM_IRQ_GPIOD) /* Vector 19: GPIO Port D */ + +VECTOR(lm_gpioe, LM_IRQ_GPIOE) /* Vector 20: GPIO Port E */ +VECTOR(lm_uart0, LM_IRQ_UART0) /* Vector 21: UART 0 */ +VECTOR(lm_uart1, LM_IRQ_UART1) /* Vector 22: UART 1 */ +VECTOR(lm_ssi0, LM_IRQ_SSI0) /* Vector 23: SSI 0 */ +VECTOR(lm_i2c0, LM_IRQ_I2C0) /* Vector 24: I2C 0 */ +UNUSED(LM_RESERVED_25) /* Vector 25: Reserved */ +UNUSED(LM_RESERVED_26) /* Vector 26: Reserved */ +UNUSED(LM_RESERVED_27) /* Vector 27: Reserved */ +UNUSED(LM_RESERVED_28) /* Vector 28: Reserved */ +UNUSED(LM_RESERVED_29) /* Vector 29: Reserved */ + +VECTOR(lm_adc0, LM_IRQ_ADC0) /* Vector 30: ADC Sequence 0 */ +VECTOR(lm_adc1, LM_IRQ_ADC1) /* Vector 31: ADC Sequence 1 */ +VECTOR(lm_adc2, LM_IRQ_ADC2) /* Vector 32: ADC Sequence 2 */ +VECTOR(lm_adc3, LM_IRQ_ADC3) /* Vector 33: ADC Sequence 3 */ +VECTOR(lm_wdog, LM_IRQ_WDOG) /* Vector 34: Watchdog Timer */ +VECTOR(lm_tmr0a, LM_IRQ_TIMER0A) /* Vector 35: Timer 0 A */ +VECTOR(lm_tmr0b, LM_IRQ_TIMER0B) /* Vector 36: Timer 0 B */ +VECTOR(lm_tmr1a, LM_IRQ_TIMER1A) /* Vector 37: Timer 1 A */ +VECTOR(lm_tmr1b, LM_IRQ_TIMER1B) /* Vector 38: Timer 1 B */ +VECTOR(lm_tmr2a, LM_IRQ_TIMER2A) /* Vector 39: Timer 2 A */ + +VECTOR(lm_tmr2b, LM_IRQ_TIMER2B) /* Vector 40: Timer 3 B */ +VECTOR(lm_cmp0, LM_IRQ_COMPARE0) /* Vector 41: Analog Comparator 0 */ +VECTOR(lm_cmp1, LM_IRQ_COMPARE1) /* Vector 42: Analog Comparator 1 */ +UNUSED(LM_RESERVED_43) /* Vector 43: Reserved */ +VECTOR(lm_syscon, LM_IRQ_SYSCON) /* Vector 44: System Control */ +VECTOR(lm_flashcon, LM_IRQ_FLASHCON) /* Vector 45: FLASH Control */ +VECTOR(lm_gpiof, LM_IRQ_GPIOF) /* Vector 46: GPIO Port F */ +VECTOR(lm_gpiog, LM_IRQ_GPIOG) /* Vector 47: GPIO Port G */ +VECTOR(lm_gpioh, LM_IRQ_GPIOH) /* Vector 48: GPIO Port H */ +UNUSED(LM_RESERVED_49) /* Vector 49: Reserved */ + +VECTOR(lm_ssi1, LM_IRQ_SSI1) /* Vector 50: SSI 1 */ +VECTOR(lm_tmr3a, LM_IRQ_TIMER3A) /* Vector 51: Timer 3 A */ +VECTOR(lm_tmr3b, LM_IRQ_TIMER3B) /* Vector 52: Timer 3 B */ +VECTOR(lm_i2c1, LM_IRQ_I2C1) /* Vector 53: I2C 1 */ +UNUSED(LM_RESERVED_54) /* Vector 54: Reserved */ +UNUSED(LM_RESERVED_55) /* Vector 55: Reserved */ +UNUSED(LM_RESERVED_56) /* Vector 56: Reserved */ +UNUSED(LM_RESERVED_57) /* Vector 57: Reserved */ +VECTOR(lm_eth, LM_IRQ_ETHCON) /* Vector 58: Ethernet Controller */ +VECTOR(lm_hib, LM_IRQ_HIBERNATE) /* Vector 59: Hibernation Module */ + +UNUSED(LM_RESERVED_60) /* Vector 60: Reserved */ +UNUSED(LM_RESERVED_61) /* Vector 61: Reserved */ +UNUSED(LM_RESERVED_62) /* Vector 62: Reserved */ +UNUSED(LM_RESERVED_63) /* Vector 63: Reserved */ +UNUSED(LM_RESERVED_64) /* Vector 64: Reserved */ +UNUSED(LM_RESERVED_65) /* Vector 65: Reserved */ +UNUSED(LM_RESERVED_66) /* Vector 66: Reserved */ +UNUSED(LM_RESERVED_67) /* Vector 67: Reserved */ +UNUSED(LM_RESERVED_68) /* Vector 68: Reserved */ +UNUSED(LM_RESERVED_69) /* Vector 69: Reserved */ + +UNUSED(LM_RESERVED_70) /* Vector 70: Reserved */ +#endif + +#elif defined(CONFIG_ARCH_CHIP_LM3S6432) + +/* If the common ARMv7-M vector handling is used, then all it needs is the following + * definition that provides the number of supported vectors. + */ + +#ifdef CONFIG_ARMV7M_CMNVECTOR + +/* Reserve 71 interrupt table entries for I/O interrupts. */ + +# define ARMV7M_PERIPHERAL_INTERRUPTS 71 + +#else + +VECTOR(lm_gpioa, LM_IRQ_GPIOA) /* Vector 16: GPIO Port A */ +VECTOR(lm_gpiob, LM_IRQ_GPIOB) /* Vector 17: GPIO Port B */ +VECTOR(lm_gpioc, LM_IRQ_GPIOC) /* Vector 18: GPIO Port C */ +VECTOR(lm_gpiod, LM_IRQ_GPIOD) /* Vector 19: GPIO Port D */ + +VECTOR(lm_gpioe, LM_IRQ_GPIOE) /* Vector 20: GPIO Port E */ +VECTOR(lm_uart0, LM_IRQ_UART0) /* Vector 21: UART 0 */ +VECTOR(lm_uart1, LM_IRQ_UART1) /* Vector 22: UART 1 */ +VECTOR(lm_ssi0, LM_IRQ_SSI0) /* Vector 23: SSI 0 */ +VECTOR(lm_i2c0, LM_IRQ_I2C0) /* Vector 24: I2C 0 */ +UNUSED(LM_RESERVED_25) /* Vector 25: Reserved */ +VECTOR(lm_pwm0, LM_IRQ_PWM0) /* Vector 26: PWM Generator 0 */ +UNUSED(LM_RESERVED_27) /* Vector 27: Reserved */ +UNUSED(LM_RESERVED_28) /* Vector 28: Reserved */ +UNUSED(LM_RESERVED_29) /* Vector 29: Reserved */ + +VECTOR(lm_adc0, LM_IRQ_ADC0) /* Vector 30: ADC Sequence 0 */ +VECTOR(lm_adc1, LM_IRQ_ADC1) /* Vector 31: ADC Sequence 1 */ +VECTOR(lm_adc2, LM_IRQ_ADC2) /* Vector 32: ADC Sequence 2 */ +VECTOR(lm_adc3, LM_IRQ_ADC3) /* Vector 33: ADC Sequence 3 */ +VECTOR(lm_wdog, LM_IRQ_WDOG) /* Vector 34: Watchdog Timer */ +VECTOR(lm_tmr0a, LM_IRQ_TIMER0A) /* Vector 35: Timer 0 A */ +VECTOR(lm_tmr0b, LM_IRQ_TIMER0B) /* Vector 36: Timer 0 B */ +VECTOR(lm_tmr1a, LM_IRQ_TIMER1A) /* Vector 37: Timer 1 A */ +VECTOR(lm_tmr1b, LM_IRQ_TIMER1B) /* Vector 38: Timer 1 B */ +VECTOR(lm_tmr2a, LM_IRQ_TIMER2A) /* Vector 39: Timer 2 A */ + +VECTOR(lm_tmr2b, LM_IRQ_TIMER2B) /* Vector 40: Timer 3 B */ +VECTOR(lm_cmp0, LM_IRQ_COMPARE0) /* Vector 41: Analog Comparator 0 */ +VECTOR(lm_cmp1, LM_IRQ_COMPARE1) /* Vector 42: Analog Comparator 1 */ +UNUSED(LM_RESERVED_43) /* Vector 43: Reserved */ +VECTOR(lm_syscon, LM_IRQ_SYSCON) /* Vector 44: System Control */ +VECTOR(lm_flashcon, LM_IRQ_FLASHCON) /* Vector 45: FLASH Control */ +VECTOR(lm_gpiof, LM_IRQ_GPIOF) /* Vector 46: GPIO Port F */ +VECTOR(lm_gpiog, LM_IRQ_GPIOG) /* Vector 47: GPIO Port G */ +UNUSED(LM_RESERVED_48) /* Vector 48: Reserved */ +UNUSED(LM_RESERVED_49) /* Vector 49: Reserved */ + +UNUSED(LM_RESERVED_50) /* Vector 50: Reserved */ +UNUSED(LM_RESERVED_51) /* Vector 51: Reserved */ +UNUSED(LM_RESERVED_52) /* Vector 52: Reserved */ +UNUSED(LM_RESERVED_53) /* Vector 53: Reserved */ +UNUSED(LM_RESERVED_54) /* Vector 54: Reserved */ +UNUSED(LM_RESERVED_55) /* Vector 55: Reserved */ +UNUSED(LM_RESERVED_56) /* Vector 56: Reserved */ +UNUSED(LM_RESERVED_57) /* Vector 57: Reserved */ +VECTOR(lm_eth, LM_IRQ_ETHCON) /* Vector 58: Ethernet Controller */ +UNUSED(LM_RESERVED_59) /* Vector 59: Reserved */ + +UNUSED(LM_RESERVED_60) /* Vector 60: Reserved */ +UNUSED(LM_RESERVED_61) /* Vector 61: Reserved */ +UNUSED(LM_RESERVED_62) /* Vector 62: Reserved */ +UNUSED(LM_RESERVED_63) /* Vector 63: Reserved */ +UNUSED(LM_RESERVED_64) /* Vector 64: Reserved */ +UNUSED(LM_RESERVED_65) /* Vector 65: Reserved */ +UNUSED(LM_RESERVED_66) /* Vector 66: Reserved */ +UNUSED(LM_RESERVED_67) /* Vector 67: Reserved */ +UNUSED(LM_RESERVED_68) /* Vector 68: Reserved */ +UNUSED(LM_RESERVED_69) /* Vector 69: Reserved */ + +UNUSED(LM_RESERVED_70) /* Vector 70: Reserved */ +#endif + +#elif defined(CONFIG_ARCH_CHIP_LM3S6965) + +/* If the common ARMv7-M vector handling is used, then all it needs is the following + * definition that provides the number of supported vectors. + */ + +#ifdef CONFIG_ARMV7M_CMNVECTOR + +/* Reserve 71 interrupt table entries for I/O interrupts. */ + +# define ARMV7M_PERIPHERAL_INTERRUPTS 71 + +#else + +VECTOR(lm_gpioa, LM_IRQ_GPIOA) /* Vector 16: GPIO Port A */ +VECTOR(lm_gpiob, LM_IRQ_GPIOB) /* Vector 17: GPIO Port B */ +VECTOR(lm_gpioc, LM_IRQ_GPIOC) /* Vector 18: GPIO Port C */ +VECTOR(lm_gpiod, LM_IRQ_GPIOD) /* Vector 19: GPIO Port D */ + +VECTOR(lm_gpioe, LM_IRQ_GPIOE) /* Vector 20: GPIO Port E */ +VECTOR(lm_uart0, LM_IRQ_UART0) /* Vector 21: UART 0 */ +VECTOR(lm_uart1, LM_IRQ_UART1) /* Vector 22: UART 1 */ +VECTOR(lm_ssi0, LM_IRQ_SSI0) /* Vector 23: SSI 0 */ +VECTOR(lm_i2c0, LM_IRQ_I2C0) /* Vector 24: I2C 0 */ +VECTOR(lm_pwmfault, LM_IRQ_PWMFAULT) /* Vector 25: PWM Fault */ +VECTOR(lm_pwm0, LM_IRQ_PWM0) /* Vector 26: PWM Generator 0 */ +VECTOR(lm_pwm1, LM_IRQ_PWM1) /* Vector 27: PWM Generator 1 */ +VECTOR(lm_pwm2, LM_IRQ_PWM2) /* Vector 28: PWM Generator 2 */ +VECTOR(lm_qei0, LM_IRQ_QEI0) /* Vector 29: QEI 0 */ + +VECTOR(lm_adc0, LM_IRQ_ADC0) /* Vector 30: ADC Sequence 0 */ +VECTOR(lm_adc1, LM_IRQ_ADC1) /* Vector 31: ADC Sequence 1 */ +VECTOR(lm_adc2, LM_IRQ_ADC2) /* Vector 32: ADC Sequence 2 */ +VECTOR(lm_adc3, LM_IRQ_ADC3) /* Vector 33: ADC Sequence 3 */ +VECTOR(lm_wdog, LM_IRQ_WDOG) /* Vector 34: Watchdog Timer */ +VECTOR(lm_tmr0a, LM_IRQ_TIMER0A) /* Vector 35: Timer 0 A */ +VECTOR(lm_tmr0b, LM_IRQ_TIMER0B) /* Vector 36: Timer 0 B */ +VECTOR(lm_tmr1a, LM_IRQ_TIMER1A) /* Vector 37: Timer 1 A */ +VECTOR(lm_tmr1b, LM_IRQ_TIMER1B) /* Vector 38: Timer 1 B */ +VECTOR(lm_tmr2a, LM_IRQ_TIMER2A) /* Vector 39: Timer 2 A */ + +VECTOR(lm_tmr2b, LM_IRQ_TIMER2B) /* Vector 40: Timer 3 B */ +VECTOR(lm_cmp0, LM_IRQ_COMPARE0) /* Vector 41: Analog Comparator 0 */ +VECTOR(lm_cmp1, LM_IRQ_COMPARE1) /* Vector 42: Analog Comparator 1 */ +UNUSED(LM_RESERVED_43) /* Vector 43: Reserved */ +VECTOR(lm_syscon, LM_IRQ_SYSCON) /* Vector 44: System Control */ +VECTOR(lm_flashcon, LM_IRQ_FLASHCON) /* Vector 45: FLASH Control */ +VECTOR(lm_gpiof, LM_IRQ_GPIOF) /* Vector 46: GPIO Port F */ +VECTOR(lm_gpiog, LM_IRQ_GPIOG) /* Vector 47: GPIO Port G */ +UNUSED(LM_RESERVED_48) /* Vector 48: Reserved */ +VECTOR(lm_uart2, LM_IRQ_UART1) /* Vector 49: UART 1 */ + +UNUSED(LM_RESERVED_50) /* Vector 50: Reserved */ +VECTOR(lm_tmr3a, LM_IRQ_TIMER3A) /* Vector 51: Timer 3 A */ +VECTOR(lm_tmr3b, LM_IRQ_TIMER3B) /* Vector 52: Timer 3 B */ +VECTOR(lm_i2c1, LM_IRQ_I2C1) /* Vector 53: I2C 1 */ +VECTOR(lm_qei1, LM_IRQ_QEI1) /* Vector 54: QEI 1 */ +UNUSED(LM_RESERVED_55) /* Vector 55: Reserved */ +UNUSED(LM_RESERVED_56) /* Vector 56: Reserved */ +UNUSED(LM_RESERVED_57) /* Vector 57: Reserved */ +VECTOR(lm_eth, LM_IRQ_ETHCON) /* Vector 58: Ethernet Controller */ +VECTOR(lm_hib, LM_IRQ_HIBERNATE) /* Vector 59: Hibernation Module */ + +UNUSED(LM_RESERVED_60) /* Vector 60: Reserved */ +UNUSED(LM_RESERVED_61) /* Vector 61: Reserved */ +UNUSED(LM_RESERVED_62) /* Vector 62: Reserved */ +UNUSED(LM_RESERVED_63) /* Vector 63: Reserved */ +UNUSED(LM_RESERVED_64) /* Vector 64: Reserved */ +UNUSED(LM_RESERVED_65) /* Vector 65: Reserved */ +UNUSED(LM_RESERVED_66) /* Vector 66: Reserved */ +UNUSED(LM_RESERVED_67) /* Vector 67: Reserved */ +UNUSED(LM_RESERVED_68) /* Vector 68: Reserved */ +UNUSED(LM_RESERVED_69) /* Vector 69: Reserved */ + +UNUSED(LM_RESERVED_70) /* Vector 70: Reserved */ +#endif + +#elif defined(CONFIG_ARCH_CHIP_LM3S8962) + +/* If the common ARMv7-M vector handling is used, then all it needs is the following + * definition that provides the number of supported vectors. + */ + +#ifdef CONFIG_ARMV7M_CMNVECTOR + +/* Reserve 71 interrupt table entries for I/O interrupts. */ + +# define ARMV7M_PERIPHERAL_INTERRUPTS 71 + +#else + +VECTOR(lm_gpioa, LM_IRQ_GPIOA) /* Vector 16: GPIO Port A */ +VECTOR(lm_gpiob, LM_IRQ_GPIOB) /* Vector 17: GPIO Port B */ +VECTOR(lm_gpioc, LM_IRQ_GPIOC) /* Vector 18: GPIO Port C */ +VECTOR(lm_gpiod, LM_IRQ_GPIOD) /* Vector 19: GPIO Port D */ + +VECTOR(lm_gpioe, LM_IRQ_GPIOE) /* Vector 20: GPIO Port E */ +VECTOR(lm_uart0, LM_IRQ_UART0) /* Vector 21: UART 0 */ +VECTOR(lm_uart1, LM_IRQ_UART1) /* Vector 22: UART 1 */ +VECTOR(lm_ssi0, LM_IRQ_SSI0) /* Vector 23: SSI 0 */ +VECTOR(lm_i2c0, LM_IRQ_I2C0) /* Vector 24: I2C 0 */ +VECTOR(lm_pwmfault, LM_IRQ_PWMFAULT) /* Vector 25: PWM Fault */ +VECTOR(lm_pwm0, LM_IRQ_PWM0) /* Vector 26: PWM Generator 0 */ +VECTOR(lm_pwm1, LM_IRQ_PWM1) /* Vector 27: PWM Generator 1 */ +VECTOR(lm_pwm2, LM_IRQ_PWM2) /* Vector 28: PWM Generator 2 */ +VECTOR(lm_qei0, LM_IRQ_QEI0) /* Vector 29: QEI 0 */ + +VECTOR(lm_adc0, LM_IRQ_ADC0) /* Vector 30: ADC Sequence 0 */ +VECTOR(lm_adc1, LM_IRQ_ADC1) /* Vector 31: ADC Sequence 1 */ +VECTOR(lm_adc2, LM_IRQ_ADC2) /* Vector 32: ADC Sequence 2 */ +VECTOR(lm_adc3, LM_IRQ_ADC3) /* Vector 33: ADC Sequence 3 */ +VECTOR(lm_wdog, LM_IRQ_WDOG) /* Vector 34: Watchdog Timer */ +VECTOR(lm_tmr0a, LM_IRQ_TIMER0A) /* Vector 35: Timer 0 A */ +VECTOR(lm_tmr0b, LM_IRQ_TIMER0B) /* Vector 36: Timer 0 B */ +VECTOR(lm_tmr1a, LM_IRQ_TIMER1A) /* Vector 37: Timer 1 A */ +VECTOR(lm_tmr1b, LM_IRQ_TIMER1B) /* Vector 38: Timer 1 B */ +VECTOR(lm_tmr2a, LM_IRQ_TIMER2A) /* Vector 39: Timer 2 A */ + +VECTOR(lm_tmr2b, LM_IRQ_TIMER2B) /* Vector 40: Timer 3 B */ +VECTOR(lm_cmp0, LM_IRQ_COMPARE0) /* Vector 41: Analog Comparator 0 */ +UNUSED(LM_RESERVED_42) /* Vector 42: Reserved */ +UNUSED(LM_RESERVED_43) /* Vector 43: Reserved */ +VECTOR(lm_syscon, LM_IRQ_SYSCON) /* Vector 44: System Control */ +VECTOR(lm_flashcon, LM_IRQ_FLASHCON) /* Vector 45: FLASH Control */ +VECTOR(lm_gpiof, LM_IRQ_GPIOF) /* Vector 46: GPIO Port F */ +VECTOR(lm_gpiog, LM_IRQ_GPIOG) /* Vector 47: GPIO Port G */ +UNUSED(LM_RESERVED_48) /* Vector 48: Reserved */ +UNUSED(LM_RESERVED_49) /* Vector 49: Reserved */ + +UNUSED(LM_RESERVED_50) /* Vector 50: Reserved */ +VECTOR(lm_tmr3a, LM_IRQ_TIMER3A) /* Vector 51: Timer 3 A */ +VECTOR(lm_tmr3b, LM_IRQ_TIMER3B) /* Vector 52: Timer 3 B */ +VECTOR(lm_i2c1, LM_IRQ_I2C1) /* Vector 53: I2C 1 */ +VECTOR(lm_qei1, LM_IRQ_QEI1) /* Vector 54: QEI 1 */ +VECTOR(lm_can0, LM_IRQ_CAN0) /* Vector 55: CAN 0 */ +UNUSED(LM_RESERVED_56) /* Vector 56: Reserved */ +UNUSED(LM_RESERVED_57) /* Vector 57: Reserved */ +VECTOR(lm_eth, LM_IRQ_ETHCON) /* Vector 58: Ethernet Controller */ +VECTOR(lm_hib, LM_IRQ_HIBERNATE) /* Vector 59: Hibernation Module */ + +UNUSED(LM_RESERVED_60) /* Vector 60: Reserved */ +UNUSED(LM_RESERVED_61) /* Vector 61: Reserved */ +UNUSED(LM_RESERVED_62) /* Vector 62: Reserved */ +UNUSED(LM_RESERVED_63) /* Vector 63: Reserved */ +UNUSED(LM_RESERVED_64) /* Vector 64: Reserved */ +UNUSED(LM_RESERVED_65) /* Vector 65: Reserved */ +UNUSED(LM_RESERVED_66) /* Vector 66: Reserved */ +UNUSED(LM_RESERVED_67) /* Vector 67: Reserved */ +UNUSED(LM_RESERVED_68) /* Vector 68: Reserved */ +UNUSED(LM_RESERVED_69) /* Vector 69: Reserved */ + +UNUSED(LM_RESERVED_70) /* Vector 70: Reserved */ +#endif + +#elif defined(CONFIG_ARCH_CHIP_LM3S9B96) + +/* If the common ARMv7-M vector handling is used, then all it needs is the following + * definition that provides the number of supported vectors. + */ + +#ifdef CONFIG_ARMV7M_CMNVECTOR + +/* Reserve 72 interrupt table entries for I/O interrupts. */ + +# define ARMV7M_PERIPHERAL_INTERRUPTS 72 + +#else + +VECTOR(lm_gpioa, LM_IRQ_GPIOA) /* Vector 16: GPIO Port A */ +VECTOR(lm_gpiob, LM_IRQ_GPIOB) /* Vector 17: GPIO Port B */ +VECTOR(lm_gpioc, LM_IRQ_GPIOC) /* Vector 18: GPIO Port C */ +VECTOR(lm_gpiod, LM_IRQ_GPIOD) /* Vector 19: GPIO Port D */ +VECTOR(lm_gpioe, LM_IRQ_GPIOE) /* Vector 20: GPIO Port E */ + +VECTOR(lm_uart0, LM_IRQ_UART0) /* Vector 21: UART 0 */ +VECTOR(lm_uart1, LM_IRQ_UART1) /* Vector 22: UART 1 */ +VECTOR(lm_ssi0, LM_IRQ_SSI0) /* Vector 23: SSI 0 */ +VECTOR(lm_i2c0, LM_IRQ_I2C0) /* Vector 24: I2C 0 */ +VECTOR(lm_pwmfault, LM_IRQ_PWMFAULT) /* Vector 25: PWM Fault */ +VECTOR(lm_pwm0, LM_IRQ_PWM0) /* Vector 26: PWM Generator 0 */ +VECTOR(lm_pwm1, LM_IRQ_PWM1) /* Vector 27: PWM Generator 1 */ +VECTOR(lm_pwm2, LM_IRQ_PWM2) /* Vector 28: PWM Generator 2 */ +VECTOR(lm_qei0, LM_IRQ_QEI0) /* Vector 29: QEI 0 */ + +VECTOR(lm_adc0, LM_IRQ_ADC0) /* Vector 30: ADC Sequence 0 */ +VECTOR(lm_adc1, LM_IRQ_ADC1) /* Vector 31: ADC Sequence 1 */ +VECTOR(lm_adc2, LM_IRQ_ADC2) /* Vector 32: ADC Sequence 2 */ +VECTOR(lm_adc3, LM_IRQ_ADC3) /* Vector 33: ADC Sequence 3 */ +VECTOR(lm_wdog, LM_IRQ_WDOG) /* Vector 34: Watchdog Timer */ +VECTOR(lm_tmr0a, LM_IRQ_TIMER0A) /* Vector 35: Timer 0 A */ +VECTOR(lm_tmr0b, LM_IRQ_TIMER0B) /* Vector 36: Timer 0 B */ +VECTOR(lm_tmr1a, LM_IRQ_TIMER1A) /* Vector 37: Timer 1 A */ +VECTOR(lm_tmr1b, LM_IRQ_TIMER1B) /* Vector 38: Timer 1 B */ +VECTOR(lm_tmr2a, LM_IRQ_TIMER2A) /* Vector 39: Timer 2 A */ + +VECTOR(lm_tmr2b, LM_IRQ_TIMER2B) /* Vector 40: Timer 3 B */ +VECTOR(lm_cmp0, LM_IRQ_COMPARE0) /* Vector 41: Analog Comparator 0 */ +VECTOR(lm_cmp1, LM_IRQ_COMPARE1) /* Vector 42: Analog Comparator 1 */ +VECTOR(lm_cmp2, LM_IRQ_COMPARE2) /* Vector 43: Analog Comparator 2 */ +VECTOR(lm_syscon, LM_IRQ_SYSCON) /* Vector 44: System Control */ +VECTOR(lm_flashcon, LM_IRQ_FLASHCON) /* Vector 45: FLASH Control */ +VECTOR(lm_gpiof, LM_IRQ_GPIOF) /* Vector 46: GPIO Port F */ +VECTOR(lm_gpiog, LM_IRQ_GPIOG) /* Vector 47: GPIO Port G */ +VECTOR(lm_gpioh, LM_IRQ_GPIOH) /* Vector 48: GPIO Port H */ +VECTOR(lm_uart2, LM_IRQ_UART2) /* Vector 49: UART 2 */ + +VECTOR(lm_ssi1, LM_IRQ_SSI1) /* Vector 50: GPIO Port H */ +VECTOR(lm_tmr3a, LM_IRQ_TIMER3A) /* Vector 51: Timer 3 A */ +VECTOR(lm_tmr3b, LM_IRQ_TIMER3B) /* Vector 52: Timer 3 B */ +VECTOR(lm_i2c1, LM_IRQ_I2C1) /* Vector 53: I2C 1 */ +VECTOR(lm_qei1, LM_IRQ_QEI1) /* Vector 54: QEI 1 */ +VECTOR(lm_can0, LM_IRQ_CAN0) /* Vector 55: CAN 0 */ +VECTOR(lm_can1, LM_IRQ_CAN1) /* Vector 56: CAN 1 */ +UNUSED(LM_RESERVED_57) /* Vector 57: Reserved */ +VECTOR(lm_eth, LM_IRQ_ETHCON) /* Vector 58: Ethernet Controller */ +UNUSED(LM_RESERVED_59) /* Vector 59: Reserved */ + +VECTOR(lm_usb, LM_IRQ_USB) /* Vector 60: USB */ +VECTOR(lm_pwm3, LM_IRQ_PWM3) /* Vector 61: PWM 3 */ +VECTOR(lm_udmasoft, LM_IRQ_UDMASOFT) /* Vector 62: uDMA Software */ +VECTOR(lm_udmaerror, LM_IRQ_UDMAERROR) /* Vector 63: uDMA Error */ +VECTOR(lm_adc1_0, LM_IRQ_ADC1_0) /* Vector 64: ADC1 Sequence 0 */ +VECTOR(lm_adc1_1, LM_IRQ_ADC1_1) /* Vector 65: ADC1 Sequence 1 */ +VECTOR(lm_adc1_2, LM_IRQ_ADC1_2) /* Vector 66: ADC1 Sequence 2 */ +VECTOR(lm_adc1_3, LM_IRQ_ADC1_3) /* Vector 67: ADC1 Sequence 3 */ +VECTOR(lm_i2s0, LM_IRQ_I2S0) /* Vector 68: I2S 0 */ +VECTOR(lm_epi, LM_IRQ_EPI) /* Vector 69: EPI */ + +VECTOR(lm_gpioj, LM_IRQ_GPIOJ) /* Vector 70: GPIO Port J */ +UNUSED(LM_RESERVED_71) /* Vector 71: Reserved */ +#endif + +#else +# error "Vectors not specified for this Stellaris chip" +#endif diff --git a/nuttx/arch/arm/src/lm/chip/lm_memorymap.h b/nuttx/arch/arm/src/lm/chip/lm_memorymap.h index 530ecdf64..d8257fc02 100644 --- a/nuttx/arch/arm/src/lm/chip/lm_memorymap.h +++ b/nuttx/arch/arm/src/lm/chip/lm_memorymap.h @@ -44,8 +44,10 @@ /* Include the memory map file for the specific Stellaris chip */ -#ifdef CONFIG_ARCH_CHIP_LM3S +#if defined(CONFIG_ARCH_CHIP_LM3S) # include "chip/lm3s_memorymap.h" +#elif defined(CONFIG_ARCH_CHIP_LM4F) +# include "chip/lm4f_memorymap.h" #else # error "Unsupported Stellaris memory map" #endif diff --git a/nuttx/arch/arm/src/lm/chip/lm_pinmap.h b/nuttx/arch/arm/src/lm/chip/lm_pinmap.h index 311d6fcdc..00b42e73b 100644 --- a/nuttx/arch/arm/src/lm/chip/lm_pinmap.h +++ b/nuttx/arch/arm/src/lm/chip/lm_pinmap.h @@ -44,8 +44,10 @@ /* Include the pin mapping file for the specific Stellaris chip */ -#ifdef CONFIG_ARCH_CHIP_LM3S +#if defined(CONFIG_ARCH_CHIP_LM3S) # include "chip/lm3s_pinmap.h" +#elif defined(CONFIG_ARCH_CHIP_LM4F) +# include "chip/lm4f_pinmap.h" #else # error "Unsupported Stellaris PIN mapping" #endif diff --git a/nuttx/arch/arm/src/lm/chip/lm_vectors.h b/nuttx/arch/arm/src/lm/chip/lm_vectors.h new file mode 100644 index 000000000..97227bf29 --- /dev/null +++ b/nuttx/arch/arm/src/lm/chip/lm_vectors.h @@ -0,0 +1,64 @@ +/************************************************************************************ + * arch/arm/src/lm/chip/lm_vectors.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +/* Include the vector file for the specific Stellaris chip */ + +#if defined(CONFIG_ARCH_CHIP_LM3S) +# include "chip/lm3s_vectors.h" +#elif defined(CONFIG_ARCH_CHIP_LM4F) +# include "chip/lm4f_vectors.h" +#else +# error "Unsupported Stellaris vector file" +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ diff --git a/nuttx/arch/arm/src/lm/lm_vectors.S b/nuttx/arch/arm/src/lm/lm_vectors.S index fecff0428..d3798fbb7 100644 --- a/nuttx/arch/arm/src/lm/lm_vectors.S +++ b/nuttx/arch/arm/src/lm/lm_vectors.S @@ -127,290 +127,15 @@ lm_vectors: /* External Interrupts */ -#if defined(CONFIG_ARCH_CHIP_LM3S6918) - .word lm_gpioa /* Vector 16: GPIO Port A */ - .word lm_gpiob /* Vector 17: GPIO Port B */ - .word lm_gpioc /* Vector 18: GPIO Port C */ - .word lm_gpiod /* Vector 19: GPIO Port D */ - .word lm_gpioe /* Vector 20: GPIO Port E */ - .word lm_uart0 /* Vector 21: UART 0 */ - .word lm_uart1 /* Vector 22: UART 1 */ - .word lm_ssi0 /* Vector 23: SSI 0 */ - .word lm_i2c0 /* Vector 24: I2C 0 */ - .word lm_reserved /* Vector 25: Reserved */ - .word lm_reserved /* Vector 26: Reserved */ - .word lm_reserved /* Vector 27: Reserved */ - .word lm_reserved /* Vector 28: Reserved */ - .word lm_reserved /* Vector 29: Reserved */ - .word lm_adc0 /* Vector 30: ADC Sequence 0 */ - .word lm_adc1 /* Vector 31: ADC Sequence 1 */ - .word lm_adc2 /* Vector 32: ADC Sequence 2 */ - .word lm_adc3 /* Vector 33: ADC Sequence 3 */ - .word lm_wdog /* Vector 34: Watchdog Timer */ - .word lm_tmr0a /* Vector 35: Timer 0 A */ - .word lm_tmr0b /* Vector 36: Timer 0 B */ - .word lm_tmr1a /* Vector 37: Timer 1 A */ - .word lm_tmr1b /* Vector 38: Timer 1 B */ - .word lm_tmr2a /* Vector 39: Timer 2 A */ - .word lm_tmr2b /* Vector 40: Timer 3 B */ - .word lm_cmp0 /* Vector 41: Analog Comparator 0 */ - .word lm_cmp1 /* Vector 42: Analog Comparator 1 */ - .word lm_reserved /* Vector 43: Reserved */ - .word lm_syscon /* Vector 44: System Control */ - .word lm_flashcon /* Vector 45: FLASH Control */ - .word lm_gpiof /* Vector 46: GPIO Port F */ - .word lm_gpiog /* Vector 47: GPIO Port G */ - .word lm_gpioh /* Vector 48: GPIO Port H */ - .word lm_reserved /* Vector 49: Reserved */ - .word lm_ssi1 /* Vector 50: SSI 1 */ - .word lm_tmr3a /* Vector 51: Timer 3 A */ - .word lm_tmr3b /* Vector 52: Timer 3 B */ - .word lm_i2c1 /* Vector 53: I2C 1 */ - .word lm_reserved /* Vector 54: Reserved */ - .word lm_reserved /* Vector 55: Reserved */ - .word lm_reserved /* Vector 56: Reserved */ - .word lm_reserved /* Vector 57: Reserved */ - .word lm_eth /* Vector 58: Ethernet Controller */ - .word lm_hib /* Vector 59: Hibernation Module */ - .word lm_reserved /* Vector 60: Reserved */ - .word lm_reserved /* Vector 61: Reserved */ - .word lm_reserved /* Vector 62: Reserved */ - .word lm_reserved /* Vector 63: Reserved */ - .word lm_reserved /* Vector 64: Reserved */ - .word lm_reserved /* Vector 65: Reserved */ - .word lm_reserved /* Vector 66: Reserved */ - .word lm_reserved /* Vector 67: Reserved */ - .word lm_reserved /* Vector 68: Reserved */ - .word lm_reserved /* Vector 69: Reserved */ - .word lm_reserved /* Vector 70: Reserved */ -#elif defined(CONFIG_ARCH_CHIP_LM3S6432) - .word lm_gpioa /* Vector 16: GPIO Port A */ - .word lm_gpiob /* Vector 17: GPIO Port B */ - .word lm_gpioc /* Vector 18: GPIO Port C */ - .word lm_gpiod /* Vector 19: GPIO Port D */ - .word lm_gpioe /* Vector 20: GPIO Port E */ - .word lm_uart0 /* Vector 21: UART 0 */ - .word lm_uart1 /* Vector 22: UART 1 */ - .word lm_ssi0 /* Vector 23: SSI 0 */ - .word lm_i2c0 /* Vector 24: I2C 0 */ - .word lm_reserved /* Vector 25: Reserved */ - .word lm_pwm0 /* Vector 26: PWM Generator 0 */ - .word lm_reserved /* Vector 27: Reserved */ - .word lm_reserved /* Vector 28: Reserved */ - .word lm_reserved /* Vector 29: Reserved */ - .word lm_adc0 /* Vector 30: ADC Sequence 0 */ - .word lm_adc1 /* Vector 31: ADC Sequence 1 */ - .word lm_adc2 /* Vector 32: ADC Sequence 2 */ - .word lm_adc3 /* Vector 33: ADC Sequence 3 */ - .word lm_wdog /* Vector 34: Watchdog Timer */ - .word lm_tmr0a /* Vector 35: Timer 0 A */ - .word lm_tmr0b /* Vector 36: Timer 0 B */ - .word lm_tmr1a /* Vector 37: Timer 1 A */ - .word lm_tmr1b /* Vector 38: Timer 1 B */ - .word lm_tmr2a /* Vector 39: Timer 2 A */ - .word lm_tmr2b /* Vector 40: Timer 3 B */ - .word lm_cmp0 /* Vector 41: Analog Comparator 0 */ - .word lm_cmp1 /* Vector 42: Analog Comparator 1 */ - .word lm_reserved /* Vector 43: Reserved */ - .word lm_syscon /* Vector 44: System Control */ - .word lm_flashcon /* Vector 45: FLASH Control */ - .word lm_gpiof /* Vector 46: GPIO Port F */ - .word lm_gpiog /* Vector 47: GPIO Port G */ - .word lm_reserved /* Vector 48: Reserved */ - .word lm_reserved /* Vector 49: Reserved */ - .word lm_reserved /* Vector 50: Reserved */ - .word lm_reserved /* Vector 51: Reserved */ - .word lm_reserved /* Vector 52: Reserved */ - .word lm_reserved /* Vector 53: Reserved */ - .word lm_reserved /* Vector 54: Reserved */ - .word lm_reserved /* Vector 55: Reserved */ - .word lm_reserved /* Vector 56: Reserved */ - .word lm_reserved /* Vector 57: Reserved */ - .word lm_eth /* Vector 58: Ethernet Controller */ - .word lm_reserved /* Vector 59: Reserved */ - .word lm_reserved /* Vector 60: Reserved */ - .word lm_reserved /* Vector 61: Reserved */ - .word lm_reserved /* Vector 62: Reserved */ - .word lm_reserved /* Vector 63: Reserved */ - .word lm_reserved /* Vector 64: Reserved */ - .word lm_reserved /* Vector 65: Reserved */ - .word lm_reserved /* Vector 66: Reserved */ - .word lm_reserved /* Vector 67: Reserved */ - .word lm_reserved /* Vector 68: Reserved */ - .word lm_reserved /* Vector 69: Reserved */ - .word lm_reserved /* Vector 70: Reserved */ -#elif defined(CONFIG_ARCH_CHIP_LM3S6965) - .word lm_gpioa /* Vector 16: GPIO Port A */ - .word lm_gpiob /* Vector 17: GPIO Port B */ - .word lm_gpioc /* Vector 18: GPIO Port C */ - .word lm_gpiod /* Vector 19: GPIO Port D */ - .word lm_gpioe /* Vector 20: GPIO Port E */ - .word lm_uart0 /* Vector 21: UART 0 */ - .word lm_uart1 /* Vector 22: UART 1 */ - .word lm_ssi0 /* Vector 23: SSI 0 */ - .word lm_i2c0 /* Vector 24: I2C 0 */ - .word lm_pwmfault /* Vector 25: PWM Fault */ - .word lm_pwm0 /* Vector 26: PWM Generator 0 */ - .word lm_pwm1 /* Vector 27: PWM Generator 1 */ - .word lm_pwm2 /* Vector 28: PWM Generator 2 */ - .word lm_qei0 /* Vector 29: QEI0 */ - .word lm_adc0 /* Vector 30: ADC Sequence 0 */ - .word lm_adc1 /* Vector 31: ADC Sequence 1 */ - .word lm_adc2 /* Vector 32: ADC Sequence 2 */ - .word lm_adc3 /* Vector 33: ADC Sequence 3 */ - .word lm_wdog /* Vector 34: Watchdog Timer */ - .word lm_tmr0a /* Vector 35: Timer 0 A */ - .word lm_tmr0b /* Vector 36: Timer 0 B */ - .word lm_tmr1a /* Vector 37: Timer 1 A */ - .word lm_tmr1b /* Vector 38: Timer 1 B */ - .word lm_tmr2a /* Vector 39: Timer 2 A */ - .word lm_tmr2b /* Vector 40: Timer 3 B */ - .word lm_cmp0 /* Vector 41: Analog Comparator 0 */ - .word lm_cmp1 /* Vector 42: Analog Comparator 1 */ - .word lm_reserved /* Vector 43: Reserved */ - .word lm_syscon /* Vector 44: System Control */ - .word lm_flashcon /* Vector 45: FLASH Control */ - .word lm_gpiof /* Vector 46: GPIO Port F */ - .word lm_gpiog /* Vector 47: GPIO Port G */ - .word lm_reserved /* Vector 48: Reserved */ - .word lm_uart2 /* Vector 49: UART 2 */ - .word lm_reserved /* Vector 50: Reserved */ - .word lm_tmr3a /* Vector 51: Timer 3 A */ - .word lm_tmr3b /* Vector 52: Timer 3 B */ - .word lm_i2c1 /* Vector 53: I2C 1 */ - .word lm_qei1 /* Vector 54: QEI1 */ - .word lm_reserved /* Vector 55: Reserved */ - .word lm_reserved /* Vector 56: Reserved */ - .word lm_reserved /* Vector 57: Reserved */ - .word lm_eth /* Vector 58: Ethernet Controller */ - .word lm_hib /* Vector 59: Hibernation Module */ - .word lm_reserved /* Vector 60: Reserved */ - .word lm_reserved /* Vector 61: Reserved */ - .word lm_reserved /* Vector 62: Reserved */ - .word lm_reserved /* Vector 63: Reserved */ - .word lm_reserved /* Vector 64: Reserved */ - .word lm_reserved /* Vector 65: Reserved */ - .word lm_reserved /* Vector 66: Reserved */ - .word lm_reserved /* Vector 67: Reserved */ - .word lm_reserved /* Vector 68: Reserved */ - .word lm_reserved /* Vector 69: Reserved */ - .word lm_reserved /* Vector 70: Reserved */ -#elif defined(CONFIG_ARCH_CHIP_LM3S9B96) - .word lm_gpioa /* Vector 16: GPIO Port A */ - .word lm_gpiob /* Vector 17: GPIO Port B */ - .word lm_gpioc /* Vector 18: GPIO Port C */ - .word lm_gpiod /* Vector 19: GPIO Port D */ - .word lm_gpioe /* Vector 20: GPIO Port E */ - .word lm_uart0 /* Vector 21: UART 0 */ - .word lm_uart1 /* Vector 22: UART 1 */ - .word lm_ssi0 /* Vector 23: SSI 0 */ - .word lm_i2c0 /* Vector 24: I2C 0 */ - .word lm_pwmfault /* Vector 25: PWM Fault */ - .word lm_pwm0 /* Vector 26: PWM Generator 0 */ - .word lm_pwm1 /* Vector 27: PWM Generator 1 */ - .word lm_pwm2 /* Vector 28: PWM Generator 2 */ - .word lm_qei0 /* Vector 29: QEI0 */ - .word lm_adc0 /* Vector 30: ADC Sequence 0 */ - .word lm_adc1 /* Vector 31: ADC Sequence 1 */ - .word lm_adc2 /* Vector 32: ADC Sequence 2 */ - .word lm_adc3 /* Vector 33: ADC Sequence 3 */ - .word lm_wdog /* Vector 34: Watchdog Timer */ - .word lm_tmr0a /* Vector 35: Timer 0 A */ - .word lm_tmr0b /* Vector 36: Timer 0 B */ - .word lm_tmr1a /* Vector 37: Timer 1 A */ - .word lm_tmr1b /* Vector 38: Timer 1 B */ - .word lm_tmr2a /* Vector 39: Timer 2 A */ - .word lm_tmr2b /* Vector 40: Timer 3 B */ - .word lm_cmp0 /* Vector 41: Analog Comparator 0 */ - .word lm_cmp1 /* Vector 42: Analog Comparator 1 */ - .word lm_cmp2 /* Vector 43: Reserved */ - .word lm_syscon /* Vector 44: System Control */ - .word lm_flashcon /* Vector 45: FLASH Control */ - .word lm_gpiof /* Vector 46: GPIO Port F */ - .word lm_gpiog /* Vector 47: GPIO Port G */ - .word lm_gpioh /* Vector 48: GPIO Port H */ - .word lm_uart2 /* Vector 49: UART 2 */ - .word lm_ssi1 /* Vector 50: SSI 1 */ - .word lm_tmr3a /* Vector 51: Timer 3 A */ - .word lm_tmr3b /* Vector 52: Timer 3 B */ - .word lm_i2c1 /* Vector 53: I2C 1 */ - .word lm_qei1 /* Vector 54: QEI1 */ - .word lm_can0 /* Vector 55: CAN 0 */ - .word lm_can1 /* Vector 56: CAN 1 */ - .word lm_reserved /* Vector 57: Reserved */ - .word lm_eth /* Vector 58: Ethernet Controller */ - .word lm_reserved /* Vector 59: Reserved */ - .word lm_usb /* Vector 60: USB */ - .word lm_pwm3 /* Vector 61: PWM 3 */ - .word lm_udmasoft /* Vector 62: uDMA Software */ - .word lm_udmaerror /* Vector 63: uDMA Error */ - .word lm_adc1_0 /* Vector 64: ADC1 Sequence 0 */ - .word lm_adc1_1 /* Vector 65: ADC1 Sequence 1 */ - .word lm_adc1_2 /* Vector 66: ADC1 Sequence 2 */ - .word lm_adc1_3 /* Vector 67: ADC1 Sequence 3 */ - .word lm_i2s0 /* Vector 68: I2S 0 */ - .word lm_epi /* Vector 69: Reserved */ - .word lm_gpioj /* Vector 70: GPIO J */ - .word lm_reserved /* Vector 71: Reserved */ - #elif defined(CONFIG_ARCH_CHIP_LM3S8962) - .word lm_gpioa /* Vector 16: GPIO Port A */ - .word lm_gpiob /* Vector 17: GPIO Port B */ - .word lm_gpioc /* Vector 18: GPIO Port C */ - .word lm_gpiod /* Vector 19: GPIO Port D */ - .word lm_gpioe /* Vector 20: GPIO Port E */ - .word lm_uart0 /* Vector 21: UART 0 */ - .word lm_uart1 /* Vector 22: UART 1 */ - .word lm_ssi0 /* Vector 23: SSI 0 */ - .word lm_i2c0 /* Vector 24: I2C 0 */ - .word lm_pwmfault /* Vector 25: PWM Fault */ - .word lm_pwm0 /* Vector 26: PWM Generator 0 */ - .word lm_pwm1 /* Vector 27: PWM Generator 1 */ - .word lm_pwm2 /* Vector 28: PWM Generator 2 */ - .word lm_qei0 /* Vector 29: QEI0 */ - .word lm_adc0 /* Vector 30: ADC Sequence 0 */ - .word lm_adc1 /* Vector 31: ADC Sequence 1 */ - .word lm_adc2 /* Vector 32: ADC Sequence 2 */ - .word lm_adc3 /* Vector 33: ADC Sequence 3 */ - .word lm_wdog /* Vector 34: Watchdog Timer */ - .word lm_tmr0a /* Vector 35: Timer 0 A */ - .word lm_tmr0b /* Vector 36: Timer 0 B */ - .word lm_tmr1a /* Vector 37: Timer 1 A */ - .word lm_tmr1b /* Vector 38: Timer 1 B */ - .word lm_tmr2a /* Vector 39: Timer 2 A */ - .word lm_tmr2b /* Vector 40: Timer 3 B */ - .word lm_cmp0 /* Vector 41: Analog Comparator 0 */ - .word lm_reserved /* Vector 42: Reserved */ - .word lm_reserved /* Vector 43: Reserved */ - .word lm_syscon /* Vector 44: System Control */ - .word lm_flashcon /* Vector 45: FLASH Control */ - .word lm_gpiof /* Vector 46: GPIO Port F */ - .word lm_gpiog /* Vector 47: GPIO Port G */ - .word lm_reserved /* Vector 48: Reserved */ - .word lm_reserved /* Vector 49: Reserved */ - .word lm_reserved /* Vector 50: Reserved */ - .word lm_tmr3a /* Vector 51: Timer 3 A */ - .word lm_tmr3b /* Vector 52: Timer 3 B */ - .word lm_reserved /* Vector 53: Reserved*/ - .word lm_qei1 /* Vector 54: QEI1 */ - .word lm_can0 /* Vector 55: Can Controller */ - .word lm_reserved /* Vector 56: Reserved */ - .word lm_reserved /* Vector 57: Reserved */ - .word lm_eth /* Vector 58: Ethernet Controller */ - .word lm_hib /* Vector 59: Hibernation Module */ - .word lm_reserved /* Vector 60: Reserved */ - .word lm_reserved /* Vector 61: Reserved */ - .word lm_reserved /* Vector 62: Reserved */ - .word lm_reserved /* Vector 63: Reserved */ - .word lm_reserved /* Vector 64: Reserved */ - .word lm_reserved /* Vector 65: Reserved */ - .word lm_reserved /* Vector 66: Reserved */ - .word lm_reserved /* Vector 67: Reserved */ - .word lm_reserved /* Vector 68: Reserved */ - .word lm_reserved /* Vector 69: Reserved */ - .word lm_reserved /* Vector 70: Reserved */ -#else -# error "Vectors not specified for this LM3S chip" -#endif +/* External Interrupts */ + +#undef VECTOR +#define VECTOR(l,i) .word l + +#undef UNUSED +#define UNUSED(i) .word lm_reserved + +#include "chip/chip/lm_vectors.h" .size lm_vectors, .-lm_vectors /************************************************************************************ @@ -432,204 +157,13 @@ handlers: HANDLER lm_pendsv, LM_IRQ_PENDSV /* Vector 14: Penable system service request */ HANDLER lm_systick, LM_IRQ_SYSTICK /* Vector 15: System tick */ -#if defined(CONFIG_ARCH_CHIP_LM3S6918) - HANDLER lm_gpioa, LM_IRQ_GPIOA /* Vector 16: GPIO Port A */ - HANDLER lm_gpiob, LM_IRQ_GPIOB /* Vector 17: GPIO Port B */ - HANDLER lm_gpioc, LM_IRQ_GPIOC /* Vector 18: GPIO Port C */ - HANDLER lm_gpiod, LM_IRQ_GPIOD /* Vector 19: GPIO Port D */ - HANDLER lm_gpioe, LM_IRQ_GPIOE /* Vector 20: GPIO Port E */ - HANDLER lm_uart0, LM_IRQ_UART0 /* Vector 21: UART 0 */ - HANDLER lm_uart1, LM_IRQ_UART1 /* Vector 22: UART 1 */ - HANDLER lm_ssi0, LM_IRQ_SSI0 /* Vector 23: SSI 0 */ - HANDLER lm_i2c0, LM_IRQ_I2C0 /* Vector 24: I2C 0 */ - HANDLER lm_adc0, LM_IRQ_ADC0 /* Vector 30: ADC Sequence 0 */ - HANDLER lm_adc1, LM_IRQ_ADC1 /* Vector 31: ADC Sequence 1 */ - HANDLER lm_adc2, LM_IRQ_ADC2 /* Vector 32: ADC Sequence 2 */ - HANDLER lm_adc3, LM_IRQ_ADC3 /* Vector 33: ADC Sequence 3 */ - HANDLER lm_wdog, LM_IRQ_WDOG /* Vector 34: Watchdog Timer */ - HANDLER lm_tmr0a, LM_IRQ_TIMER0A /* Vector 35: Timer 0 A */ - HANDLER lm_tmr0b, LM_IRQ_TIMER0B /* Vector 36: Timer 0 B */ - HANDLER lm_tmr1a, LM_IRQ_TIMER1A /* Vector 37: Timer 1 A */ - HANDLER lm_tmr1b, LM_IRQ_TIMER1B /* Vector 38: Timer 1 B */ - HANDLER lm_tmr2a, LM_IRQ_TIMER2A /* Vector 39: Timer 2 A */ - HANDLER lm_tmr2b, LM_IRQ_TIMER2B /* Vector 40: Timer 3 B */ - HANDLER lm_cmp0, LM_IRQ_COMPARE0 /* Vector 41: Analog Comparator 0 */ - HANDLER lm_cmp1, LM_IRQ_COMPARE1 /* Vector 42: Analog Comparator 1 */ - HANDLER lm_syscon, LM_IRQ_SYSCON /* Vector 44: System Control */ - HANDLER lm_flashcon, LM_IRQ_FLASHCON /* Vector 45: FLASH Control */ - HANDLER lm_gpiof, LM_IRQ_GPIOF /* Vector 46: GPIO Port F */ - HANDLER lm_gpiog, LM_IRQ_GPIOG /* Vector 47: GPIO Port G */ - HANDLER lm_gpioh, LM_IRQ_GPIOH /* Vector 48: GPIO Port H */ - HANDLER lm_ssi1, LM_IRQ_SSI1 /* Vector 50: SSI 1 */ - HANDLER lm_tmr3a, LM_IRQ_TIMER3A /* Vector 51: Timer 3 A */ - HANDLER lm_tmr3b, LM_IRQ_TIMER3B /* Vector 52: Timer 3 B */ - HANDLER lm_i2c1, LM_IRQ_I2C1 /* Vector 53: I2C 1 */ - HANDLER lm_eth, LM_IRQ_ETHCON /* Vector 58: Ethernet Controller */ - HANDLER lm_hib, LM_IRQ_HIBERNATE /* Vector 59: Hibernation Module */ -#elif defined(CONFIG_ARCH_CHIP_LM3S6432) - HANDLER lm_gpioa, LM_IRQ_GPIOA /* Vector 16: GPIO Port A */ - HANDLER lm_gpiob, LM_IRQ_GPIOB /* Vector 17: GPIO Port B */ - HANDLER lm_gpioc, LM_IRQ_GPIOC /* Vector 18: GPIO Port C */ - HANDLER lm_gpiod, LM_IRQ_GPIOD /* Vector 19: GPIO Port D */ - HANDLER lm_gpioe, LM_IRQ_GPIOE /* Vector 20: GPIO Port E */ - HANDLER lm_uart0, LM_IRQ_UART0 /* Vector 21: UART 0 */ - HANDLER lm_uart1, LM_IRQ_UART1 /* Vector 22: UART 1 */ - HANDLER lm_ssi0, LM_IRQ_SSI0 /* Vector 23: SSI 0 */ - HANDLER lm_i2c0, LM_IRQ_I2C0 /* Vector 24: I2C 0 */ - HANDLER lm_pwm0, LM_IRQ_PWM0 /* Vector 26: PWM Generator 0 */ - HANDLER lm_adc0, LM_IRQ_ADC0 /* Vector 30: ADC Sequence 0 */ - HANDLER lm_adc1, LM_IRQ_ADC1 /* Vector 31: ADC Sequence 1 */ - HANDLER lm_adc2, LM_IRQ_ADC2 /* Vector 32: ADC Sequence 2 */ - HANDLER lm_adc3, LM_IRQ_ADC3 /* Vector 33: ADC Sequence 3 */ - HANDLER lm_wdog, LM_IRQ_WDOG /* Vector 34: Watchdog Timer */ - HANDLER lm_tmr0a, LM_IRQ_TIMER0A /* Vector 35: Timer 0 A */ - HANDLER lm_tmr0b, LM_IRQ_TIMER0B /* Vector 36: Timer 0 B */ - HANDLER lm_tmr1a, LM_IRQ_TIMER1A /* Vector 37: Timer 1 A */ - HANDLER lm_tmr1b, LM_IRQ_TIMER1B /* Vector 38: Timer 1 B */ - HANDLER lm_tmr2a, LM_IRQ_TIMER2A /* Vector 39: Timer 2 A */ - HANDLER lm_tmr2b, LM_IRQ_TIMER2B /* Vector 40: Timer 3 B */ - HANDLER lm_cmp0, LM_IRQ_COMPARE0 /* Vector 41: Analog Comparator 0 */ - HANDLER lm_cmp1, LM_IRQ_COMPARE1 /* Vector 42: Analog Comparator 1 */ - HANDLER lm_syscon, LM_IRQ_SYSCON /* Vector 44: System Control */ - HANDLER lm_flashcon, LM_IRQ_FLASHCON /* Vector 45: FLASH Control */ - HANDLER lm_gpiof, LM_IRQ_GPIOF /* Vector 46: GPIO Port F */ - HANDLER lm_gpiog, LM_IRQ_GPIOG /* Vector 47: GPIO Port G */ - HANDLER lm_eth, LM_IRQ_ETHCON /* Vector 58: Ethernet Controller */ -#elif defined(CONFIG_ARCH_CHIP_LM3S6965) - HANDLER lm_gpioa, LM_IRQ_GPIOA /* Vector 16: GPIO Port A */ - HANDLER lm_gpiob, LM_IRQ_GPIOB /* Vector 17: GPIO Port B */ - HANDLER lm_gpioc, LM_IRQ_GPIOC /* Vector 18: GPIO Port C */ - HANDLER lm_gpiod, LM_IRQ_GPIOD /* Vector 19: GPIO Port D */ - HANDLER lm_gpioe, LM_IRQ_GPIOE /* Vector 20: GPIO Port E */ - HANDLER lm_uart0, LM_IRQ_UART0 /* Vector 21: UART 0 */ - HANDLER lm_uart1, LM_IRQ_UART1 /* Vector 22: UART 1 */ - HANDLER lm_ssi0, LM_IRQ_SSI0 /* Vector 23: SSI 0 */ - HANDLER lm_i2c0, LM_IRQ_I2C0 /* Vector 24: I2C 0 */ - HANDLER lm_pwmfault, LM_IRQ_PWMFAULT /* Vector 25: PWM Fault */ - HANDLER lm_pwm0, LM_IRQ_PWM0 /* Vector 26: PWM Generator 0 */ - HANDLER lm_pwm1, LM_IRQ_PWM1 /* Vector 27: PWM Generator 1 */ - HANDLER lm_pwm2, LM_IRQ_PWM2 /* Vector 28: PWM Generator 2 */ - HANDLER lm_qei0, LM_IRQ_QEI0 /* Vector 29: QEI 0 */ - HANDLER lm_adc0, LM_IRQ_ADC0 /* Vector 30: ADC Sequence 0 */ - HANDLER lm_adc1, LM_IRQ_ADC1 /* Vector 31: ADC Sequence 1 */ - HANDLER lm_adc2, LM_IRQ_ADC2 /* Vector 32: ADC Sequence 2 */ - HANDLER lm_adc3, LM_IRQ_ADC3 /* Vector 33: ADC Sequence 3 */ - HANDLER lm_wdog, LM_IRQ_WDOG /* Vector 34: Watchdog Timer */ - HANDLER lm_tmr0a, LM_IRQ_TIMER0A /* Vector 35: Timer 0 A */ - HANDLER lm_tmr0b, LM_IRQ_TIMER0B /* Vector 36: Timer 0 B */ - HANDLER lm_tmr1a, LM_IRQ_TIMER1A /* Vector 37: Timer 1 A */ - HANDLER lm_tmr1b, LM_IRQ_TIMER1B /* Vector 38: Timer 1 B */ - HANDLER lm_tmr2a, LM_IRQ_TIMER2A /* Vector 39: Timer 2 A */ - HANDLER lm_tmr2b, LM_IRQ_TIMER2B /* Vector 40: Timer 3 B */ - HANDLER lm_cmp0, LM_IRQ_COMPARE0 /* Vector 41: Analog Comparator 0 */ - HANDLER lm_cmp1, LM_IRQ_COMPARE1 /* Vector 42: Analog Comparator 1 */ - HANDLER lm_syscon, LM_IRQ_SYSCON /* Vector 44: System Control */ - HANDLER lm_flashcon, LM_IRQ_FLASHCON /* Vector 45: FLASH Control */ - HANDLER lm_gpiof, LM_IRQ_GPIOF /* Vector 46: GPIO Port F */ - HANDLER lm_gpiog, LM_IRQ_GPIOG /* Vector 47: GPIO Port G */ - HANDLER lm_uart2, LM_IRQ_UART1 /* Vector 49: UART 1 */ - HANDLER lm_tmr3a, LM_IRQ_TIMER3A /* Vector 51: Timer 3 A */ - HANDLER lm_tmr3b, LM_IRQ_TIMER3B /* Vector 52: Timer 3 B */ - HANDLER lm_i2c1, LM_IRQ_I2C1 /* Vector 53: I2C 1 */ - HANDLER lm_qei1, LM_IRQ_QEI1 /* Vector 54: QEI 1 */ - HANDLER lm_eth, LM_IRQ_ETHCON /* Vector 58: Ethernet Controller */ - HANDLER lm_hib, LM_IRQ_HIBERNATE /* Vector 59: Hibernation Module */ -#elif defined(CONFIG_ARCH_CHIP_LM3S8962) - HANDLER lm_gpioa, LM_IRQ_GPIOA /* Vector 16: GPIO Port A */ - HANDLER lm_gpiob, LM_IRQ_GPIOB /* Vector 17: GPIO Port B */ - HANDLER lm_gpioc, LM_IRQ_GPIOC /* Vector 18: GPIO Port C */ - HANDLER lm_gpiod, LM_IRQ_GPIOD /* Vector 19: GPIO Port D */ - HANDLER lm_gpioe, LM_IRQ_GPIOE /* Vector 20: GPIO Port E */ - HANDLER lm_uart0, LM_IRQ_UART0 /* Vector 21: UART 0 */ - HANDLER lm_uart1, LM_IRQ_UART1 /* Vector 22: UART 1 */ - HANDLER lm_ssi0, LM_IRQ_SSI0 /* Vector 23: SSI 0 */ - HANDLER lm_i2c0, LM_IRQ_I2C0 /* Vector 24: I2C 0 */ - HANDLER lm_pwmfault, LM_IRQ_PWMFAULT /* Vector 25: PWM Fault */ - HANDLER lm_pwm0, LM_IRQ_PWM0 /* Vector 26: PWM Generator 0 */ - HANDLER lm_pwm1, LM_IRQ_PWM1 /* Vector 27: PWM Generator 1 */ - HANDLER lm_pwm2, LM_IRQ_PWM2 /* Vector 28: PWM Generator 2 */ - HANDLER lm_qei0, LM_IRQ_QEI0 /* Vector 29: QEI 0 */ - HANDLER lm_adc0, LM_IRQ_ADC0 /* Vector 30: ADC Sequence 0 */ - HANDLER lm_adc1, LM_IRQ_ADC1 /* Vector 31: ADC Sequence 1 */ - HANDLER lm_adc2, LM_IRQ_ADC2 /* Vector 32: ADC Sequence 2 */ - HANDLER lm_adc3, LM_IRQ_ADC3 /* Vector 33: ADC Sequence 3 */ - HANDLER lm_wdog, LM_IRQ_WDOG /* Vector 34: Watchdog Timer */ - HANDLER lm_tmr0a, LM_IRQ_TIMER0A /* Vector 35: Timer 0 A */ - HANDLER lm_tmr0b, LM_IRQ_TIMER0B /* Vector 36: Timer 0 B */ - HANDLER lm_tmr1a, LM_IRQ_TIMER1A /* Vector 37: Timer 1 A */ - HANDLER lm_tmr1b, LM_IRQ_TIMER1B /* Vector 38: Timer 1 B */ - HANDLER lm_tmr2a, LM_IRQ_TIMER2A /* Vector 39: Timer 2 A */ - HANDLER lm_tmr2b, LM_IRQ_TIMER2B /* Vector 40: Timer 3 B */ - HANDLER lm_cmp0, LM_IRQ_COMPARE0 /* Vector 41: Analog Comparator 0 */ - HANDLER lm_syscon, LM_IRQ_SYSCON /* Vector 44: System Control */ - HANDLER lm_flashcon, LM_IRQ_FLASHCON /* Vector 45: FLASH Control */ - HANDLER lm_gpiof, LM_IRQ_GPIOF /* Vector 46: GPIO Port F */ - HANDLER lm_gpiog, LM_IRQ_GPIOG /* Vector 47: GPIO Port G */ - HANDLER lm_uart2, LM_IRQ_UART1 /* Vector 49: UART 1 */ - HANDLER lm_tmr3a, LM_IRQ_TIMER3A /* Vector 51: Timer 3 A */ - HANDLER lm_tmr3b, LM_IRQ_TIMER3B /* Vector 52: Timer 3 B */ - HANDLER lm_i2c1, LM_IRQ_I2C1 /* Vector 53: I2C 1 */ - HANDLER lm_qei1, LM_IRQ_QEI1 /* Vector 54: QEI 1 */ - HANDLER lm_can0, LM_IRQ_CAN0 /* Vector 55: CAN 0 */ - HANDLER lm_eth, LM_IRQ_ETHCON /* Vector 58: Ethernet Controller */ - HANDLER lm_hib, LM_IRQ_HIBERNATE /* Vector 59: Hibernation Module */ -#elif defined(CONFIG_ARCH_CHIP_LM3S9B96) - HANDLER lm_gpioa, LM_IRQ_GPIOA /* Vector 16: GPIO Port A */ - HANDLER lm_gpiob, LM_IRQ_GPIOB /* Vector 17: GPIO Port B */ - HANDLER lm_gpioc, LM_IRQ_GPIOC /* Vector 18: GPIO Port C */ - HANDLER lm_gpiod, LM_IRQ_GPIOD /* Vector 19: GPIO Port D */ - HANDLER lm_gpioe, LM_IRQ_GPIOE /* Vector 20: GPIO Port E */ - HANDLER lm_uart0, LM_IRQ_UART0 /* Vector 21: UART 0 */ - HANDLER lm_uart1, LM_IRQ_UART1 /* Vector 22: UART 1 */ - HANDLER lm_ssi0, LM_IRQ_SSI0 /* Vector 23: SSI 0 */ - HANDLER lm_i2c0, LM_IRQ_I2C0 /* Vector 24: I2C 0 */ - HANDLER lm_pwmfault, LM_IRQ_PWMFAULT /* Vector 25: PWM Fault */ - HANDLER lm_pwm0, LM_IRQ_PWM0 /* Vector 26: PWM Generator 0 */ - HANDLER lm_pwm1, LM_IRQ_PWM1 /* Vector 27: PWM Generator 1 */ - HANDLER lm_pwm2, LM_IRQ_PWM2 /* Vector 28: PWM Generator 2 */ - HANDLER lm_qei0, LM_IRQ_QEI0 /* Vector 29: QEI 0 */ - HANDLER lm_adc0, LM_IRQ_ADC0 /* Vector 30: ADC Sequence 0 */ - HANDLER lm_adc1, LM_IRQ_ADC1 /* Vector 31: ADC Sequence 1 */ - HANDLER lm_adc2, LM_IRQ_ADC2 /* Vector 32: ADC Sequence 2 */ - HANDLER lm_adc3, LM_IRQ_ADC3 /* Vector 33: ADC Sequence 3 */ - HANDLER lm_wdog, LM_IRQ_WDOG /* Vector 34: Watchdog Timer */ - HANDLER lm_tmr0a, LM_IRQ_TIMER0A /* Vector 35: Timer 0 A */ - HANDLER lm_tmr0b, LM_IRQ_TIMER0B /* Vector 36: Timer 0 B */ - HANDLER lm_tmr1a, LM_IRQ_TIMER1A /* Vector 37: Timer 1 A */ - HANDLER lm_tmr1b, LM_IRQ_TIMER1B /* Vector 38: Timer 1 B */ - HANDLER lm_tmr2a, LM_IRQ_TIMER2A /* Vector 39: Timer 2 A */ - HANDLER lm_tmr2b, LM_IRQ_TIMER2B /* Vector 40: Timer 3 B */ - HANDLER lm_cmp0, LM_IRQ_COMPARE0 /* Vector 41: Analog Comparator 0 */ - HANDLER lm_cmp1, LM_IRQ_COMPARE1 /* Vector 42: Analog Comparator 1 */ - HANDLER lm_cmp2, LM_IRQ_COMPARE2 /* Vector 43: Analog Comparator 2 */ - HANDLER lm_syscon, LM_IRQ_SYSCON /* Vector 44: System Control */ - HANDLER lm_flashcon, LM_IRQ_FLASHCON /* Vector 45: FLASH Control */ - HANDLER lm_gpiof, LM_IRQ_GPIOF /* Vector 46: GPIO Port F */ - HANDLER lm_gpiog, LM_IRQ_GPIOG /* Vector 47: GPIO Port G */ - HANDLER lm_gpioh, LM_IRQ_GPIOH /* Vector 48: GPIO Port H */ - HANDLER lm_uart2, LM_IRQ_UART2 /* Vector 49: UART 2 */ - HANDLER lm_ssi1, LM_IRQ_SSI1 /* Vector 50: GPIO Port H */ - HANDLER lm_tmr3a, LM_IRQ_TIMER3A /* Vector 51: Timer 3 A */ - HANDLER lm_tmr3b, LM_IRQ_TIMER3B /* Vector 52: Timer 3 B */ - HANDLER lm_i2c1, LM_IRQ_I2C1 /* Vector 53: I2C 1 */ - HANDLER lm_qei1, LM_IRQ_QEI1 /* Vector 54: QEI 1 */ - HANDLER lm_can0, LM_IRQ_CAN0 /* Vector 55: CAN 0 */ - HANDLER lm_can1, LM_IRQ_CAN1 /* Vector 56: CAN 1 */ - HANDLER lm_eth, LM_IRQ_ETHCON /* Vector 58: Ethernet Controller */ - HANDLER lm_usb, LM_IRQ_USB /* Vector 60: USB */ - HANDLER lm_pwm3, LM_IRQ_PWM3 /* Vector 61: PWM 3 */ - HANDLER lm_udmasoft, LM_IRQ_UDMASOFT /* Vector 62: uDMA Software */ - HANDLER lm_udmaerror, LM_IRQ_UDMAERROR /* Vector 63: uDMA Error */ - HANDLER lm_adc1_0, LM_IRQ_ADC1_0 /* Vector 64: ADC1 Sequence 0 */ - HANDLER lm_adc1_1, LM_IRQ_ADC1_1 /* Vector 65: ADC1 Sequence 1 */ - HANDLER lm_adc1_2, LM_IRQ_ADC1_2 /* Vector 66: ADC1 Sequence 2 */ - HANDLER lm_adc1_3, LM_IRQ_ADC1_3 /* Vector 67: ADC1 Sequence 3 */ - HANDLER lm_i2s0, LM_IRQ_I2S0 /* Vector 68: I2S 0 */ - HANDLER lm_epi, LM_IRQ_EPI /* Vector 69: EPI */ - HANDLER lm_gpioj, LM_IRQ_GPIOJ /* Vector 70: GPIO Port J */ -#else -# error "Vectors not specified for this Stellaris chip" -#endif +#undef VECTOR +#define VECTOR(l,i) HANDLER l, i + +#undef UNUSED +#define UNUSED(i) + +#include "chip/chip/lm_vectors.h" /* Common IRQ handling logic. On entry here, the return stack is on either * the PSP or the MSP and looks like the following: -- cgit v1.2.3