From b0ae31a3651e8655669416e25cec9ff5433fa080 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 12 May 2014 18:43:06 -0600 Subject: Add support for Fujitsu MB85RS1MT part. From Charles Ash --- nuttx/ChangeLog | 3 +- nuttx/drivers/mtd/ramtron.c | 92 +++++++++++++++++++++++++++------------------ 2 files changed, 57 insertions(+), 38 deletions(-) diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog index cd655a695..3af6b8e61 100644 --- a/nuttx/ChangeLog +++ b/nuttx/ChangeLog @@ -7329,4 +7329,5 @@ https://github.com/PX4/NuttX (2014-5-10). * include/nuttx/video/rgbcolors.h: Fix typo in several macros: RBG -> RGB. (2014-5-12). - + * drivers/mtd/ramtron.c: Add support for Fujitsu MB85RS1MT part. From + Charles Ash (2014-5-12). diff --git a/nuttx/drivers/mtd/ramtron.c b/nuttx/drivers/mtd/ramtron.c index 70bd6dfb5..2ced81238 100644 --- a/nuttx/drivers/mtd/ramtron.c +++ b/nuttx/drivers/mtd/ramtron.c @@ -100,7 +100,6 @@ #define RAMTRON_RDID 0x9f /* 1 Read Identification 0 0 1-3 */ #define RAMTRON_SN 0xc3 // TODO: - /* Status register bit definitions */ #define RAMTRON_SR_WIP (1 << 0) /* Bit 0: Write in progress bit */ @@ -140,13 +139,13 @@ struct ramtron_parts_s struct ramtron_dev_s { - struct mtd_dev_s mtd; /* MTD interface */ - FAR struct spi_dev_s *dev; /* Saved SPI interface instance */ - uint8_t sectorshift; - uint8_t pageshift; + struct mtd_dev_s mtd; /* MTD interface */ + FAR struct spi_dev_s *dev; /* Saved SPI interface instance */ + uint8_t sectorshift; + uint8_t pageshift; uint16_t nsectors; uint32_t npages; - const struct ramtron_parts_s *part; /* part instance */ + FAR const struct ramtron_parts_s *part; /* Part instance */ }; /************************************************************************************ @@ -159,7 +158,7 @@ struct ramtron_dev_s #define RAMTRON_INIT_CLK_MAX 40000000UL -static struct ramtron_parts_s ramtron_parts[] = +static const struct ramtron_parts_s g_ramtron_parts[] = { { "FM25V01", /* name */ @@ -178,12 +177,12 @@ static struct ramtron_parts_s ramtron_parts[] = 40000000 /* speed */ }, { - "FM25VN02", /* name */ - 0x22, /* id1 */ - 0x01, /* id2 */ - 32L*1024L, /* size */ - 2, /* addr_len */ - 40000000 /* speed */ + "FM25VN02", /* name */ + 0x22, /* id1 */ + 0x01, /* id2 */ + 32L*1024L, /* size */ + 2, /* addr_len */ + 40000000 /* speed */ }, { "FM25V05", /* name */ @@ -194,12 +193,12 @@ static struct ramtron_parts_s ramtron_parts[] = 40000000 /* speed */ }, { - "FM25VN05", /* name */ - 0x23, /* id1 */ - 0x01, /* id2 */ - 64L*1024L, /* size */ - 2, /* addr_len */ - 40000000 /* speed */ + "FM25VN05", /* name */ + 0x23, /* id1 */ + 0x01, /* id2 */ + 64L*1024L, /* size */ + 2, /* addr_len */ + 40000000 /* speed */ }, { "FM25V10", /* name */ @@ -217,6 +216,14 @@ static struct ramtron_parts_s ramtron_parts[] = 3, /* addr_len */ 40000000 /* speed */ }, + { + "MB85RS1MT", /* name */ + 0x27, /* id1 */ + 0x03, /* id2 */ + 128L*1024L, /* size */ + 3, /* addr_len */ + 25000000 /* speed */ + }, #ifdef CONFIG_RAMTRON_FRAM_NON_JEDEC { "FM25H20", /* name */ @@ -237,7 +244,6 @@ static struct ramtron_parts_s ramtron_parts[] = #endif }; - /************************************************************************************ * Private Function Prototypes ************************************************************************************/ @@ -249,8 +255,8 @@ static inline void ramtron_unlock(FAR struct spi_dev_s *dev); static inline int ramtron_readid(struct ramtron_dev_s *priv); static void ramtron_waitwritecomplete(struct ramtron_dev_s *priv); static void ramtron_writeenable(struct ramtron_dev_s *priv); -static inline void ramtron_pagewrite(struct ramtron_dev_s *priv, FAR const uint8_t *buffer, - off_t offset); +static inline void ramtron_pagewrite(struct ramtron_dev_s *priv, + FAR const uint8_t *buffer, off_t offset); /* MTD driver methods */ @@ -277,11 +283,11 @@ static int ramtron_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg); static void ramtron_lock(FAR struct spi_dev_s *dev) { - /* On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + /* On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. * - * This is a blocking call and will not return until we have exclusiv access to + * This is a blocking call and will not return until we have exclusive access to * the SPI buss. We will retain that exclusive access until the bus is unlocked. */ @@ -289,7 +295,7 @@ static void ramtron_lock(FAR struct spi_dev_s *dev) /* After locking the SPI bus, the we also need call the setfrequency, setbits, and * setmode methods to make sure that the SPI is properly configured for the device. - * If the SPI buss is being shared, then it may have been left in an incompatible + * If the SPI bus is being shared, then it may have been left in an incompatible * state. */ @@ -333,11 +339,20 @@ static inline int ramtron_readid(struct ramtron_dev_s *priv) for (i = 0; i < 6; i++) { manufacturer = SPI_SEND(priv->dev, RAMTRON_DUMMY); + + /* Fujitsu parts such as MB85RS1MT only have 1-byte for the manufacturer + * ID. The manufacturer code is "0x4". + */ + + if (manufacturer == 0x04) + { + break; + } } memory = SPI_SEND(priv->dev, RAMTRON_DUMMY); - capacity = SPI_SEND(priv->dev, RAMTRON_DUMMY); // fram.id1 - part = SPI_SEND(priv->dev, RAMTRON_DUMMY); // fram.id2 + capacity = SPI_SEND(priv->dev, RAMTRON_DUMMY); /* fram.id1 */ + part = SPI_SEND(priv->dev, RAMTRON_DUMMY); /* fram.id2 */ /* Deselect the FLASH and unlock the bus */ @@ -346,9 +361,10 @@ static inline int ramtron_readid(struct ramtron_dev_s *priv) /* Select part from the part list */ - for (priv->part = ramtron_parts; - priv->part->name != NULL && !(priv->part->id1 == capacity && priv->part->id2 == part); - priv->part++); + for (priv->part = g_ramtron_parts; + priv->part->name != NULL && + !(priv->part->id1 == capacity && priv->part->id2 == part); + priv->part++); if (priv->part->name) { @@ -498,8 +514,8 @@ static int ramtron_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nbl * Name: ramtron_bread ************************************************************************************/ -static ssize_t ramtron_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks, - FAR uint8_t *buffer) +static ssize_t ramtron_bread(FAR struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, FAR uint8_t *buffer) { FAR struct ramtron_dev_s *priv = (FAR struct ramtron_dev_s *)dev; ssize_t nbytes; @@ -508,7 +524,8 @@ static ssize_t ramtron_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t /* On this device, we can handle the block read just like the byte-oriented read */ - nbytes = ramtron_read(dev, startblock << priv->pageshift, nblocks << priv->pageshift, buffer); + nbytes = ramtron_read(dev, startblock << priv->pageshift, + nblocks << priv->pageshift, buffer); if (nbytes > 0) { return nbytes >> priv->pageshift; @@ -521,8 +538,8 @@ static ssize_t ramtron_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t * Name: ramtron_bwrite ************************************************************************************/ -static ssize_t ramtron_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks, - FAR const uint8_t *buffer) +static ssize_t ramtron_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, FAR const uint8_t *buffer) { FAR struct ramtron_dev_s *priv = (FAR struct ramtron_dev_s *)dev; size_t blocksleft = nblocks; @@ -536,7 +553,7 @@ static ssize_t ramtron_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_ { ramtron_pagewrite(priv, buffer, startblock); startblock++; - } + } ramtron_unlock(priv->dev); return nblocks; @@ -582,6 +599,7 @@ static ssize_t ramtron_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbyt SPI_SELECT(priv->dev, SPIDEV_FLASH, false); ramtron_unlock(priv->dev); + fvdbg("return nbytes: %d\n", (int)nbytes); return nbytes; } -- cgit v1.2.3