From 10b9a1fa0c8d68bb7f2c6fac7176669052831401 Mon Sep 17 00:00:00 2001
From: patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>
Date: Wed, 4 Jan 2012 00:14:45 +0000
Subject: Fix an issue for architectures where interrupt numbers and vector
 numbers do not match 1-to-1

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4258 42af7a65-404d-4744-a932-0658087f49c3
---
 nuttx/Documentation/NuttxPortingGuide.html | 9 +++++++++
 1 file changed, 9 insertions(+)

(limited to 'nuttx/Documentation')

diff --git a/nuttx/Documentation/NuttxPortingGuide.html b/nuttx/Documentation/NuttxPortingGuide.html
index b0a7a243c..7ef4e522a 100644
--- a/nuttx/Documentation/NuttxPortingGuide.html
+++ b/nuttx/Documentation/NuttxPortingGuide.html
@@ -3554,6 +3554,15 @@ void (*notify)(FAR struct pm_callback_s *cb, enum pm_state_e pmstate);
   <li><code>CONFIG_ARCH_NOINTC</code>:
      Define if the architecture does not support an interrupt controller
      or otherwise cannot support APIs like up_enable_irq() and up_disable_irq().</li>
+  <li><code>CONFIG_ARCH_VECNOTIRQ</code>:
+     Usually the interrupt vector number provided to interfaces like <code>irq_attach()</code>
+     and <code>irq_detach</code> are the same as IRQ numbers that are provied to IRQ
+     management functions like <code>up_enable_irq()</code> and <code>up_disable_irq()</code>.
+     But that is not true for all interrupt controller implementations.  For example, the
+     PIC32MX interrupt controller manages interrupt sources that have a many-to-one
+     relationship to interrupt vectors.
+     In such cases, <code>CONFIG_ARCH_VECNOTIRQ</code> must defined so that the OS logic
+     will know not to assume it can use a vector number to enable or disable interrupts.
   <li><code>CONFIG_ARCH_IRQPRIO</code>:
      Define if the architecture supports prioritization of interrupts and the
      up_prioritize_irq() API.</li>
-- 
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