From 9255670a9d9fab07e941008aa9e9edbf5b460c0b Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 16 Apr 2013 18:00:59 -0600 Subject: Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register --- nuttx/arch/arm/include/armv7-m/irq.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'nuttx/arch/arm/include/armv7-m') diff --git a/nuttx/arch/arm/include/armv7-m/irq.h b/nuttx/arch/arm/include/armv7-m/irq.h index 663a703e3..30ce8993b 100644 --- a/nuttx/arch/arm/include/armv7-m/irq.h +++ b/nuttx/arch/arm/include/armv7-m/irq.h @@ -293,7 +293,7 @@ static inline void irqrestore(irqstate_t flags) setbasepri((uint32_t)flags); #else /* If bit 0 of the primask is 0, then we need to restore - * interupts. + * interrupts. */ __asm__ __volatile__ -- cgit v1.2.3