From 1a5be88b91218994ccd12cf8bd2f2f676812f174 Mon Sep 17 00:00:00 2001 From: patacongo Date: Thu, 12 Aug 2010 01:49:25 +0000 Subject: Add changes for LM3S9B96 git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2841 42af7a65-404d-4744-a932-0658087f49c3 --- nuttx/arch/arm/src/lm3s/lm3s_gpio.c | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'nuttx/arch/arm/src/lm3s/lm3s_gpio.c') diff --git a/nuttx/arch/arm/src/lm3s/lm3s_gpio.c b/nuttx/arch/arm/src/lm3s/lm3s_gpio.c index cc1f77c35..5614b54f9 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_gpio.c +++ b/nuttx/arch/arm/src/lm3s/lm3s_gpio.c @@ -56,6 +56,17 @@ * Pre-processor Definitions ****************************************************************************/ +/* This current implementation can only support, at most, 8 GPIO ports. Some + * newer chips (such as the LM3S9B96) have 9 GPIO ports. It will require + * some restructuring of the definitions in lm3s_internal.h and to the size + * of the g_gpiobase[] table and the lm3s_gpiobaseaddress() function in this + * file to access GPIOs in ports above GPIOH. + */ + +#if LC3S_NGPIOS > 64 +# warning "This design must be extended to access ports above GPIOH" +#endif + /* These definitions are part of the implementation of the GPIO pad * configuration of Table 9-1 in the LM3S6918 data sheet. */ -- cgit v1.2.3