From b2b4e94276a9e54322925e95a61dd82820242725 Mon Sep 17 00:00:00 2001 From: patacongo Date: Sun, 28 Mar 2010 16:10:36 +0000 Subject: A little more DMA logic git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2558 42af7a65-404d-4744-a932-0658087f49c3 --- nuttx/arch/arm/src/sam3u/sam3u_dmac.h | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) (limited to 'nuttx/arch/arm/src/sam3u/sam3u_dmac.h') diff --git a/nuttx/arch/arm/src/sam3u/sam3u_dmac.h b/nuttx/arch/arm/src/sam3u/sam3u_dmac.h index 817b3934c..c92c45edf 100755 --- a/nuttx/arch/arm/src/sam3u/sam3u_dmac.h +++ b/nuttx/arch/arm/src/sam3u/sam3u_dmac.h @@ -360,8 +360,8 @@ /* DMAC Channel n [n = 0..3] Control B Register */ -#define DMACHAN_CTRLB_SRCDSCR (1 << 16) /* Bit 16: Source uffer Descriptor Fetch operation disabled */ -#define DMACHAN_CTRLB_DSTDSCR (1 << 20) /* Bit 20: Dest Buffer Descriptor Fetch operation disabled */ +#define DMACHAN_CTRLB_SRCDSCR (1 << 16) /* Bit 16: Source buffer descriptor fetch operation disabled */ +#define DMACHAN_CTRLB_DSTDSCR (1 << 20) /* Bit 20: Dest buffer descriptor fetch operation disabled */ #define DMACHAN_CTRLB_FC_SHIFT (21) /* Bits 21-22: Flow controller */ #define DMACHAN_CTRLB_FC_MASK (3 << DMACHAN_CTRLB_FC_SHIFT) # define DMACHAN_CTRLB_FC_M2M (0 << DMACHAN_CTRLB_FC_SHIFT) /* Memory-to-Memory */ @@ -380,7 +380,7 @@ /* DMAC Channel n [n = 0..3] Configuration Register */ -#define DMACHAN_CFG_SRCPER_SHIFT (0) /* Bits 0-3: Chanel source associated with peripheral ID */ +#define DMACHAN_CFG_SRCPER_SHIFT (0) /* Bits 0-3: Channel source associated with peripheral ID */ #define DMACHAN_CFG_SRCPER_MASK (15 << DMACHAN_CFG_SRCPER_SHIFT) #define DMACHAN_CFG_DSTPER_SHIFT (4) /* Bits 4-7: Channel dest associated with peripheral ID */ #define DMACHAN_CFG_DSTPER_MASK (15 << DMACHAN_CFG_DSTPER_SHIFT) @@ -401,6 +401,12 @@ # define DMACHAN_CFG_FIFOCFG_HALF (1 << DMACHAN_CFG_FIFOCFG_SHIFT) /* Half FIFO size */ # define DMACHAN_CFG_FIFOCFG_SINGLE (2 << DMACHAN_CFG_FIFOCFG_SHIFT) /* Single AHB access */ +/* DMA Peripheral IDs *******************************************************************/ + +#define DMACHAN_PID_MCI0 0 +#define DMACHAN_PID_SSC 3 +#define DMACHAN_PID_MCI1 13 + /**************************************************************************************** * Public Types ****************************************************************************************/ -- cgit v1.2.3