From a9de389d80485f8f305c7161e1312ef9a450892a Mon Sep 17 00:00:00 2001 From: patacongo Date: Mon, 26 Nov 2012 13:22:51 +0000 Subject: STM32 FLASH pre-fetch is no long enabled unless it is so configured git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5388 42af7a65-404d-4744-a932-0658087f49c3 --- nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c') diff --git a/nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c b/nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c index 14ee1e754..c6c0b2382 100644 --- a/nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c +++ b/nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c @@ -633,7 +633,11 @@ static void stm32_stdclockconfig(void) /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */ +#ifdef STM32_FLASH_PREFETCH regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN); +#else + regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN); +#endif putreg32(regval, STM32_FLASH_ACR); /* Select the main PLL as system clock source */ -- cgit v1.2.3