From c25666adf284ff77a9bd0b0d9cebdb19f5670569 Mon Sep 17 00:00:00 2001 From: patacongo Date: Wed, 30 Dec 2009 18:18:16 +0000 Subject: Add function to change fract dividers git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2466 42af7a65-404d-4744-a932-0658087f49c3 --- nuttx/arch/arm/src/lpc313x/Make.defs | 2 +- nuttx/arch/arm/src/lpc313x/lpc313x_cgudrvr.h | 17 +++- nuttx/arch/arm/src/lpc313x/lpc313x_setfdiv.c | 135 +++++++++++++++++++++++++++ 3 files changed, 152 insertions(+), 2 deletions(-) create mode 100755 nuttx/arch/arm/src/lpc313x/lpc313x_setfdiv.c (limited to 'nuttx/arch/arm/src') diff --git a/nuttx/arch/arm/src/lpc313x/Make.defs b/nuttx/arch/arm/src/lpc313x/Make.defs index f46378a91..b7f036a0b 100755 --- a/nuttx/arch/arm/src/lpc313x/Make.defs +++ b/nuttx/arch/arm/src/lpc313x/Make.defs @@ -50,7 +50,7 @@ CGU_CSRCS = lpc313x_bcrndx.c lpc313x_clkdomain.c lpc313x_clkexten.c \ lpc313x_clkfreq.c lpc313x_clkinit.c lpc313x_defclk.c \ lpc313x_esrndx.c lpc313x_fdcndx.c lpc313x_fdivinit.c \ lpc313x_freqin.c lpc313x_pllconfig.c lpc313x_resetclks.c \ - lpc313x_setfreqin.c lpc313x_softreset.c + lpc313x_setfreqin.c lpc313x_setfdiv.c lpc313x_softreset.c CHIP_ASRCS = $(CGU_ASRCS) CHIP_CSRCS = lpc313x_allocateheap.c lpc313x_boot.c lpc313x_irq.c \ diff --git a/nuttx/arch/arm/src/lpc313x/lpc313x_cgudrvr.h b/nuttx/arch/arm/src/lpc313x/lpc313x_cgudrvr.h index b4825a12e..91eb6a052 100755 --- a/nuttx/arch/arm/src/lpc313x/lpc313x_cgudrvr.h +++ b/nuttx/arch/arm/src/lpc313x/lpc313x_cgudrvr.h @@ -646,7 +646,9 @@ EXTERN void lpc313x_clkinit(const struct lpc313x_clkinit_s* cfg); * Name: lpc313x_fdivinit * * Description: - * Enable and configure (or disable) a fractional divider. + * Enable and configure (or disable) a fractional divider. For + * internal us only... see lpc313x_setfdiv() the externally usable + * function. * ************************************************************************/ @@ -654,6 +656,19 @@ EXTERN uint32_t lpc313x_fdivinit(int fdcndx, const struct lpc313x_fdivconfig_s *fdiv, bool enable); +/************************************************************************ + * Name: lpc313x_setfdiv + * + * Description: + * Set/reset subdomain frequency containing the specified clock using + * the provided divider settings + * + ************************************************************************/ + +EXTERN void lpc313x_setfdiv(enum lpc313x_domainid_e dmnid, + enum lpc313x_clockid_e clkid, + const struct lpc313x_subdomainconfig_s *fdiv); + /**************************************************************************** * Name: lpc313x_pllconfig * diff --git a/nuttx/arch/arm/src/lpc313x/lpc313x_setfdiv.c b/nuttx/arch/arm/src/lpc313x/lpc313x_setfdiv.c new file mode 100755 index 000000000..9659bd3af --- /dev/null +++ b/nuttx/arch/arm/src/lpc313x/lpc313x_setfdiv.c @@ -0,0 +1,135 @@ +/**************************************************************************** + * arch/arm/src/lpc313x/lpc313x_setfdiv.c + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#include "lpc313x_cgu.h" +#include "lpc313x_cgudrvr.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc313x_setfdiv + * + * Description: + * Set/reset subdomain frequency containing the specified clock using the + * provided divider settings + * + ****************************************************************************/ + +void lpc313x_setfdiv(enum lpc313x_domainid_e dmnid, + enum lpc313x_clockid_e clkid, + const struct lpc313x_subdomainconfig_s *fdiv) +{ + uint32_t regaddr; + unsigned int basefreq; + int fdcndx; + int bcrndx; + + /* Get the frequency divider associated with this clock */ + + fdcndx = lpc313x_fdcndx(clkid, dmnid); + + /* Does this clock have a frequency divicer? */ + + if (fdcndx != FDCNDX_INVALID) + { + /* Yes.. Save the current reference frequency selection */ + + regaddr = LPC313X_CGU_SSR_OFFSET((int)dmnid); + basefreq = (getreg32(regaddr) & CGU_SSR_FS_MASK) >> CGU_SSR_FS_SHIFT; + + /* Switch domain to FFAST input */ + + lpc313x_selectfreqin(dmnid, CGU_FS_FFAST); + + /* Get the index of the associated BCR register. Does this domain + * have a BCR? + */ + + bcrndx = lp313x_bcrndx(dmnid); + if (bcrndx != BCRNDX_INVALID) + { + + /* Yes... Disable the BCR */ + + regaddr = LPC313X_CGU_BCR(bcrndx); + putreg32(0, regaddr); + } + + /* Change fractional divider to the provided settings */ + + lpc313x_fdivinit(fdcndx, fdiv, true); + + /* Re-enable the BCR (if one is associated with this domain) */ + + if (bcrndx != BCRNDX_INVALID) + { + regaddr = LPC313X_CGU_BCR(bcrndx); + putreg32(CGU_BCR_FDRUN, regaddr); + } + + /* Switch the domain back to its original base frequency */ + + lpc313x_selectfreqin(dmnid, basefreq); + } +} -- cgit v1.2.3