From a89135e23145cd538db501fd5c8b60bc2fcd4cb3 Mon Sep 17 00:00:00 2001 From: patacongo Date: Fri, 20 Jan 2012 03:37:29 +0000 Subject: Leverage some bit timing logic from LPC17xx to the STM32 CAN driver git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4317 42af7a65-404d-4744-a932-0658087f49c3 --- nuttx/arch/arm/src/lpc17xx/lpc17_can.c | 8 +++++-- nuttx/arch/arm/src/lpc17xx/lpc17_can.h | 5 ++-- nuttx/arch/arm/src/stm32/chip/stm32_can.h | 4 ++++ nuttx/arch/arm/src/stm32/stm32_can.c | 38 +++++++++++++++++-------------- nuttx/arch/arm/src/stm32/stm32_can.h | 23 +++++++++++++++++++ 5 files changed, 57 insertions(+), 21 deletions(-) (limited to 'nuttx/arch/arm') diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_can.c b/nuttx/arch/arm/src/lpc17xx/lpc17_can.c index 80e148077..0494904cf 100755 --- a/nuttx/arch/arm/src/lpc17xx/lpc17_can.c +++ b/nuttx/arch/arm/src/lpc17xx/lpc17_can.c @@ -151,6 +151,10 @@ # define CONFIG_CAN_TSEG2 7 #endif +#if CONFIG_CAN_TSEG2 < 1 || CONFIG_CAN_TSEG2 > CAN_BTR_TSEG2_MAX +# errror "CONFIG_CAN_TSEG2 is out of range" +#endif + #define CAN_BIT_QUANTA (CONFIG_CAN_TSEG1 + CONFIG_CAN_TSEG2 + 1) /* Debug ********************************************************************/ @@ -1127,7 +1131,7 @@ static int can_bittiming(struct up_dev_s *priv) { /* At the smallest brp value (1), there are already too few bit times * (CAN_CLOCK / baud) to meet our goal. brp must be one and we need - * make some reasonalble guesses about ts1 and ts2. + * make some reasonable guesses about ts1 and ts2. */ brp = 1; @@ -1153,7 +1157,7 @@ static int can_bittiming(struct up_dev_s *priv) ts1 = CONFIG_CAN_TSEG1; ts2 = CONFIG_CAN_TSEG2; brp = (nclks + (CAN_BIT_QUANTA/2)) / CAN_BIT_QUANTA; - DEBUGASSERT(brp >=1 && brp < 1024); + DEBUGASSERT(brp >=1 && brp <= CAN_BTR_BRP_MAX); } sjw = 1; diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_can.h b/nuttx/arch/arm/src/lpc17xx/lpc17_can.h index 0950dffe5..e990958fd 100755 --- a/nuttx/arch/arm/src/lpc17xx/lpc17_can.h +++ b/nuttx/arch/arm/src/lpc17xx/lpc17_can.h @@ -370,9 +370,10 @@ #define CAN_BTR_TSEG2_MASK (7 << CAN_BTR_TSEG2_SHIFT) #define CAN_BTR_SAM (1 << 23) /* Bit 23: Sampling */ /* Bits 24-31: Reserved */ + #define CAN_BTR_BRP_MAX (1024) /* Maximum BTR value (without decrement) */ -#define CAN_BTR_TSEG1_MAX (16) /* Maximum TSEG value (without decrement) */ -#define CAN_BTR_TSEG2_MAX (8) /* Maximum TSEG value (without decrement) */ +#define CAN_BTR_TSEG1_MAX (16) /* Maximum TSEG1 value (without decrement) */ +#define CAN_BTR_TSEG2_MAX (8) /* Maximum TSEG2 value (without decrement) */ /* Error Warning Limit */ diff --git a/nuttx/arch/arm/src/stm32/chip/stm32_can.h b/nuttx/arch/arm/src/stm32/chip/stm32_can.h index 55aba3331..b8a0eee91 100644 --- a/nuttx/arch/arm/src/stm32/chip/stm32_can.h +++ b/nuttx/arch/arm/src/stm32/chip/stm32_can.h @@ -358,6 +358,10 @@ #define CAN_BTR_LBKM (1 << 30) /* Bit 30: Loop Back Mode (Debug) */ #define CAN_BTR_SILM (1 << 31) /* Bit 31: Silent Mode (Debug) */ +#define CAN_BTR_BRP_MAX (1024) /* Maximum BTR value (without decrement) */ +#define CAN_BTR_TSEG1_MAX (16) /* Maximum TSEG1 value (without decrement) */ +#define CAN_BTR_TSEG2_MAX (8) /* Maximum TSEG2 value (without decrement) */ + /* TX mailbox identifier register */ #define CAN_TIR_TXRQ (1 << 0) /* Bit 0: Transmit Mailbox Request */ diff --git a/nuttx/arch/arm/src/stm32/stm32_can.c b/nuttx/arch/arm/src/stm32/stm32_can.c index 9cd6c5712..8f5a6b8b1 100755 --- a/nuttx/arch/arm/src/stm32/stm32_can.c +++ b/nuttx/arch/arm/src/stm32/stm32_can.c @@ -74,6 +74,10 @@ #define CAN_ALL_MAILBOXES (CAN_TSR_TME0 | CAN_TSR_TME1 | CAN_TSR_TME2) +/* Bit timing ***************************************************************/ + +#define CAN_BIT_QUANTA (CONFIG_CAN_TSEG1 + CONFIG_CAN_TSEG2 + 1) + /* Debug ********************************************************************/ /* Non-standard debug that may be enabled just for testing CAN */ @@ -1259,14 +1263,13 @@ static int can_bittiming(struct stm32_can_s *priv) canllvdbg("CAN%d PCLK1: %d baud: %d\n", priv->port, STM32_PCLK1_FREQUENCY, priv->baud); - /* Try to get 14 quanta in one bit_time. That is based on the idea that the ideal - * would be ts1=6 nd ts2=7 and (1 + ts1 + ts2) = 14. + /* Try to get CAN_BIT_QUANTA quanta in one bit_time. * - * bit_time = Tq*(1 +ts1 + ts2) - * nquanta = bit_time/Tq - * nquanta = (1 +ts1 + ts2) + * bit_time = Tq*(ts1 + ts2 + 1) + * nquanta = bit_time / Tq + * nquanta = (ts1 + ts2 + 1) * - * bit_time = brp * Tpclk1 * (1 + ts1 + ts2) + * bit_time = brp * Tpclk1 * (ts1 + ts2 + 1) * nquanta = bit_time / brp / Tpclk1 * = PCLK1 / baud / brp * brp = PCLK1 / baud / nquanta; @@ -1277,11 +1280,11 @@ static int can_bittiming(struct stm32_can_s *priv) */ tmp = STM32_PCLK1_FREQUENCY / priv->baud; - if (tmp < 14) + if (tmp < CAN_BIT_QUANTA) { - /* At the smallest brp value (1), there are already fewer bit times - * (PCLCK1 / baud) is already smaller than our goal. brp must be one - * and we need make some reasonalble guesses about ts1 and ts2. + /* At the smallest brp value (1), there are already too few bit times + * (PCLCK1 / baud) to meet our goal. brp must be one and we need + * make some reasonable guesses about ts1 and ts2. */ brp = 1; @@ -1290,23 +1293,24 @@ static int can_bittiming(struct stm32_can_s *priv) ts1 = (tmp - 1) >> 1; ts2 = tmp - ts1 - 1; - if (ts1 == ts2 && ts1 > 1 && ts2 < 16) + if (ts1 == ts2 && ts1 > 1 && ts2 < CAN_BTR_TSEG2_MAX) { ts1--; ts2++; } } - /* Otherwise, nquanta is 14, ts1 is 6, ts2 is 7 and we calculate brp to - * achieve 14 quanta in the bit time + /* Otherwise, nquanta is CAN_BIT_QUANTA, ts1 is CONFIG_CAN_TSEG1, ts2 is + * CONFIG_CAN_TSEG2 and we calculate brp to achieve CAN_BIT_QUANTA quanta + * in the bit time */ else { - ts1 = 6; - ts2 = 7; - brp = tmp / 14; - DEBUGASSERT(brp >=1 && brp < 1024); + ts1 = CONFIG_CAN_TSEG1; + ts2 = CONFIG_CAN_TSEG2; + brp = (tmp + (CAN_BIT_QUANTA/2)) / CAN_BIT_QUANTA; + DEBUGASSERT(brp >=1 && brp <= CAN_BTR_BRP_MAX); } canllvdbg("TS1: %d TS2: %d BRP: %d\n", ts1, ts2, brp); diff --git a/nuttx/arch/arm/src/stm32/stm32_can.h b/nuttx/arch/arm/src/stm32/stm32_can.h index b842627b8..15203b5c9 100644 --- a/nuttx/arch/arm/src/stm32/stm32_can.h +++ b/nuttx/arch/arm/src/stm32/stm32_can.h @@ -73,6 +73,29 @@ # error "CONFIG_CAN2_BAUD is not defined" #endif +/* User-defined TSEG1 and TSEG2 settings may be used. + * + * CONFIG_CAN_TSEG1 = the number of CAN time quanta in segment 1 + * CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2 + * CAN_BIT_QUANTA = The number of CAN time quanta in on bit time + */ + +#ifndef CONFIG_CAN_TSEG1 +# define CONFIG_CAN_TSEG1 6 +#endif + +#if CONFIG_CAN_TSEG1 < 1 || CONFIG_CAN_TSEG1 > CAN_BTR_TSEG1_MAX +# errror "CONFIG_CAN_TSEG1 is out of range" +#endif + +#ifndef CONFIG_CAN_TSEG2 +# define CONFIG_CAN_TSEG2 7 +#endif + +#if CONFIG_CAN_TSEG2 < 1 || CONFIG_CAN_TSEG2 > CAN_BTR_TSEG2_MAX +# errror "CONFIG_CAN_TSEG2 is out of range" +#endif + /************************************************************************************ * Public Types ************************************************************************************/ -- cgit v1.2.3