From 9e91dba9e4c647edef9d745af68321436007b4f5 Mon Sep 17 00:00:00 2001 From: patacongo Date: Sun, 22 Aug 2010 03:44:18 +0000 Subject: Fix demand-paging compilation errors git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2879 42af7a65-404d-4744-a932-0658087f49c3 --- nuttx/arch/arm/src/arm/pg_macros.h | 2 +- nuttx/arch/arm/src/arm/up_allocpage.c | 6 ++++-- nuttx/arch/arm/src/arm/up_checkmapping.c | 2 +- nuttx/arch/arm/src/arm/up_dataabort.c | 2 +- nuttx/arch/arm/src/arm/up_head.S | 6 +++--- nuttx/arch/arm/src/arm/up_prefetchabort.c | 2 +- nuttx/arch/arm/src/arm/up_va2pte.c | 5 +++-- nuttx/arch/arm/src/lpc313x/Make.defs | 2 +- nuttx/arch/arm/src/lpc313x/lpc313x_boot.c | 10 ++++++++-- nuttx/arch/arm/src/lpc313x/lpc313x_memorymap.h | 6 +++--- 10 files changed, 26 insertions(+), 17 deletions(-) (limited to 'nuttx/arch') diff --git a/nuttx/arch/arm/src/arm/pg_macros.h b/nuttx/arch/arm/src/arm/pg_macros.h index 8119ef941..5a6438e14 100644 --- a/nuttx/arch/arm/src/arm/pg_macros.h +++ b/nuttx/arch/arm/src/arm/pg_macros.h @@ -429,7 +429,7 @@ * non-mappings */ - sub \npages, \npages, PTE_NPAGES + sub \npages, \npages, #PTE_NPAGES 2: /* Check if all of the pages have been written. If not, then * loop and write the next L1 entry. diff --git a/nuttx/arch/arm/src/arm/up_allocpage.c b/nuttx/arch/arm/src/arm/up_allocpage.c index cd577ee9e..15309f61b 100755 --- a/nuttx/arch/arm/src/arm/up_allocpage.c +++ b/nuttx/arch/arm/src/arm/up_allocpage.c @@ -50,7 +50,9 @@ #ifdef CONFIG_PAGING #include + #include "pg_macros.h" +#include "up_internal.h" /**************************************************************************** * Pre-processor Definitions @@ -177,7 +179,7 @@ int up_allocpage(FAR _TCB *tcb, FAR void **vpage) */ pgndx = g_pgndx++; - if (p_pgndx >= CONFIG_PAGING) + if (g_pgndx >= CONFIG_PAGING) { g_pgndx = 0; g_pgwrap = true; @@ -199,7 +201,7 @@ int up_allocpage(FAR _TCB *tcb, FAR void **vpage) /* Invalidate the instruction TLB corresponding to the virtual address */ - tlb_inst_invalidate_single(oldvaddr) + tlb_inst_invalidate_single(oldvaddr); } /* Then convert the index to a (physical) page address. */ diff --git a/nuttx/arch/arm/src/arm/up_checkmapping.c b/nuttx/arch/arm/src/arm/up_checkmapping.c index 9b7a166f0..370c94c9d 100755 --- a/nuttx/arch/arm/src/arm/up_checkmapping.c +++ b/nuttx/arch/arm/src/arm/up_checkmapping.c @@ -100,7 +100,7 @@ bool up_checkmapping(FAR _TCB *tcb) { uintptr_t vaddr; - uint32_t *te; + uint32_t *pte; /* Since interrupts are disabled, we don't need to anything special. */ diff --git a/nuttx/arch/arm/src/arm/up_dataabort.c b/nuttx/arch/arm/src/arm/up_dataabort.c index ecad23b30..5ad67a9c6 100644 --- a/nuttx/arch/arm/src/arm/up_dataabort.c +++ b/nuttx/arch/arm/src/arm/up_dataabort.c @@ -133,7 +133,7 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr) * (It has not yet been saved in the register context save area). */ - if (far < PG_PAGEDBASE || far >= PG_PAGEDEND) + if (far < PG_PAGED_VBASE || far >= PG_PAGED_VEND) { goto segfault; } diff --git a/nuttx/arch/arm/src/arm/up_head.S b/nuttx/arch/arm/src/arm/up_head.S index 6cf16e168..acf02df19 100644 --- a/nuttx/arch/arm/src/arm/up_head.S +++ b/nuttx/arch/arm/src/arm/up_head.S @@ -400,7 +400,7 @@ __start: str r0, [r4, r3, lsr #18] /* Undo identity mapping */ #if defined(CONFIG_PAGING) - /* Populate the L1 table for the data regions */ + /* Populate the L1 table for the data region */ adr r0, .Ldataspan ldmia r0, {r0, r1, r2, r3} @@ -510,13 +510,13 @@ __start: .Ldataspan: .long PG_L1_DATA_VADDR /* Virtual address in the L1 table */ .long PG_L2_DATA_PADDR /* Physical address of the L2 page table */ - .long PG_DATA_NPAGED /* Number of pages in the data region */ + .long PG_DATA_NPAGES /* Number of pages in the data region */ .long MMU_L1_DATAFLAGS /* L1 MMU flags to use */ .Ldatamap: .long PG_L2_DATA_VADDR /* Virtual address of L2 table */ .long PG_DATA_VBASE /* Virtual address of data memory */ - .long PG_DATA_NPAGED /* Number of pages in the data region */ + .long PG_DATA_NPAGES /* Number of pages in the data region */ .long MMU_L2_DATAFLAGS /* L2 MMU flags to use */ #endif diff --git a/nuttx/arch/arm/src/arm/up_prefetchabort.c b/nuttx/arch/arm/src/arm/up_prefetchabort.c index 824fa30e1..14451fbab 100644 --- a/nuttx/arch/arm/src/arm/up_prefetchabort.c +++ b/nuttx/arch/arm/src/arm/up_prefetchabort.c @@ -105,7 +105,7 @@ void up_prefetchabort(uint32_t *regs) * virtual addresses. */ - if (regs[REG_R15] >= PG_PAGEDBASE && regs[REG_R15] < PG_PAGEDEND) + if (regs[REG_R15] >= PG_PAGED_VBASE && regs[REG_R15] < PG_PAGED_VEND) { /* Save the offending PC as the fault address in the TCB of the currently * executing task. This value is, of course, already known in regs[REG_R15], diff --git a/nuttx/arch/arm/src/arm/up_va2pte.c b/nuttx/arch/arm/src/arm/up_va2pte.c index 84bf25882..5f92ad821 100755 --- a/nuttx/arch/arm/src/arm/up_va2pte.c +++ b/nuttx/arch/arm/src/arm/up_va2pte.c @@ -46,6 +46,7 @@ #include #include +#include "chip.h" #include "pg_macros.h" #include "up_internal.h" @@ -88,7 +89,7 @@ * ****************************************************************************/ -uint32_t *up_va2pte(uintptr_t vaddr); +uint32_t *up_va2pte(uintptr_t vaddr) { uint32_t L1; uint32_t *L2; @@ -110,7 +111,7 @@ uint32_t *up_va2pte(uintptr_t vaddr); * 256 x 4Kb or 1024 x 1Kb pages. */ - ndx = ((vaddr & 0x000fffff) >> PAGESHIFT; + ndx = (vaddr & 0x000fffff) >> PAGESHIFT; /* Return true if this virtual address is mapped. */ diff --git a/nuttx/arch/arm/src/lpc313x/Make.defs b/nuttx/arch/arm/src/lpc313x/Make.defs index 5ca34d1cc..464c5bf31 100755 --- a/nuttx/arch/arm/src/lpc313x/Make.defs +++ b/nuttx/arch/arm/src/lpc313x/Make.defs @@ -47,7 +47,7 @@ CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \ up_undefinedinsn.c up_usestack.c ifeq ($(CONFIG_PAGING),y) -CMN_CSRCS += up_pginitialize.c up_checkmapping.c up_allocpage.c up_va1pte.c +CMN_CSRCS += up_pginitialize.c up_checkmapping.c up_allocpage.c up_va2pte.c endif CGU_ASRCS = diff --git a/nuttx/arch/arm/src/lpc313x/lpc313x_boot.c b/nuttx/arch/arm/src/lpc313x/lpc313x_boot.c index 1f0744328..09176cedd 100755 --- a/nuttx/arch/arm/src/lpc313x/lpc313x_boot.c +++ b/nuttx/arch/arm/src/lpc313x/lpc313x_boot.c @@ -51,6 +51,11 @@ #include "lpc313x_cgudrvr.h" #include "lpc313x_internal.h" +#ifdef CONFIG_PAGING +# include +# include "pg_macros.h" +#endif + /************************************************************************************ * Private Types ************************************************************************************/ @@ -201,14 +206,15 @@ static void up_setupmappings(void) ************************************************************************************/ #if !defined(CONFIG_ARCH_ROMPGTABLE) && defined(CONFIG_ARCH_LOWVECTORS) && defined(CONFIG_PAGING) -static void up_vectorpermissions(uint32 mmuflags) +static void up_vectorpermissions(uint32_t mmuflags) { - uint32_t *ptr = (uint3t*)PG_L2_VECT_VADDR; + uint32_t *ptr = (uint32_t*)PG_L2_VECT_VADDR; uint32_t pte; /* This is easily because we have already been told everything! */ pte = *ptr; + #ifdef CONFIG_PAGING_VECPPAGE /* We've been told to use a specify page for the vectors. In this * case, I expect the pte to be zero the first time this function is diff --git a/nuttx/arch/arm/src/lpc313x/lpc313x_memorymap.h b/nuttx/arch/arm/src/lpc313x/lpc313x_memorymap.h index 39e218a46..93a233c9f 100755 --- a/nuttx/arch/arm/src/lpc313x/lpc313x_memorymap.h +++ b/nuttx/arch/arm/src/lpc313x/lpc313x_memorymap.h @@ -79,7 +79,7 @@ /* 0x60001000-0x6fffffff: Reserved */ #define LPC313X_NAND_PSECTION 0x70000000 /* 0x70000000-0x700007ff: NANDFLASH Ctrl 2Kb */ /* 0x70000800-0xffffffff: Reserved */ -#ifdef CONDFIG_LPC313X_EXTNAND /* End of the physical address space */ +#ifdef CONFIG_LPC313X_EXTNAND /* End of the physical address space */ # define LPC313X_LAST_PSECTION (LPC313X_NAND_PSECTION + (1 << 20)) #else # define LPC313X_LAST_PSECTION (LPC313X_INTC_PSECTION + (1 << 20)) @@ -211,7 +211,7 @@ */ #ifndef CONFIG_ARCH_ROMPGTABLE -# defined LPC313X_FIRST_VSECTION 0x00000000 /* Beginning of the virtual address space */ +# define LPC313X_FIRST_VSECTION 0x00000000 /* Beginning of the virtual address space */ # define LPC313X_SHADOWSPACE_VSECTION 0x00000000 /* 0x00000000-0x00000fff: Shadow Area 4Kb */ # define LPC313X_INTSRAM_VSECTION 0x11028000 /* Internal SRAM 96Kb-192Kb */ # define LPC313X_INTSRAM0_VADDR 0x11028000 /* 0x11028000-0x1103ffff: Internal SRAM 0 96Kb */ @@ -233,7 +233,7 @@ # define LPC313X_INTC_VSECTION 0x60000000 /* 0x60000000-0x60000fff: Interrupt controller 4Kb */ # define LPC313X_NAND_VSECTION 0x70000000 /* 0x70000000-0x700007ff: NANDFLASH Ctrl 2Kb */ # -# ifdef CONDFIG_LPC313X_EXTNAND /* End of the virtual address space */ +# ifdef CONFIG_LPC313X_EXTNAND /* End of the virtual address space */ # define LPC313X_LAST_VSECTION (LPC313X_NAND_VSECTION + (1 << 20)) # else # define LPC313X_LAST_VSECTION (LPC313X_INTC_VSECTION + (1 << 20)) -- cgit v1.2.3