From 34c92a52d1e6627683300ff150445a326fd154a5 Mon Sep 17 00:00:00 2001 From: patacongo Date: Sun, 21 Aug 2011 16:00:32 +0000 Subject: Very initial SDHC driver for Kinetis parts git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3901 42af7a65-404d-4744-a932-0658087f49c3 --- nuttx/configs/kwikstik-k40/include/board.h | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'nuttx/configs/kwikstik-k40/include/board.h') diff --git a/nuttx/configs/kwikstik-k40/include/board.h b/nuttx/configs/kwikstik-k40/include/board.h index e709ea5af..58b2cd218 100755 --- a/nuttx/configs/kwikstik-k40/include/board.h +++ b/nuttx/configs/kwikstik-k40/include/board.h @@ -84,6 +84,36 @@ #define BOARD_FLEXBUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV3) #define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4) +/* SDHC clocking ********************************************************************/ + +/* SDCLK configurations corresponding to various modes of operation. Formula is: + * + * SDCLK frequency = (base clock) / (prescaler * divisor) + * + * The SDHC module is always configure configured so that the core clock is the base + * clock. + */ + +/* Identification mode: 400KHz = 96MHz / ( 16 * 15) */ + +#define BOARD_SDHC_IDMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV16 +#define BOARD_SDHC_IDMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(15) + +/* MMC normal mode: 16MHz = 96MHz / (2 * 3) */ + +#define BOARD_SDHC_MMCMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +#define BOARD_SDHC_MMCMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3) + +/* SD normal mode (1-bit): 16MHz = 96MHz / (2 * 3) */ + +#define BOARD_SDHC_SD1MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +#define BOARD_SDHC_SD1MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3) + +/* SD normal mode (4-bit): 24MHz = 96MHz / (2 * 2) */ + +#define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +#define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(2) + /* LED definitions ******************************************************************/ /* The KwikStik-K40 board has no MCU driven, GPIO-based LEDs */ -- cgit v1.2.3