From d7fadacd141270fc041f9cae09eb40fbd8ee7bce Mon Sep 17 00:00:00 2001 From: patacongo Date: Wed, 4 Jan 2012 23:46:00 +0000 Subject: Clarify some aspects of ADC configuration for the STM32 git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4262 42af7a65-404d-4744-a932-0658087f49c3 --- nuttx/configs/stm3240g-eval/README.txt | 44 ++++++++----------------------- nuttx/configs/stm3240g-eval/nsh/defconfig | 13 +++++++++ 2 files changed, 24 insertions(+), 33 deletions(-) (limited to 'nuttx/configs/stm3240g-eval') diff --git a/nuttx/configs/stm3240g-eval/README.txt b/nuttx/configs/stm3240g-eval/README.txt index cdf3d82ae..7e4046be9 100755 --- a/nuttx/configs/stm3240g-eval/README.txt +++ b/nuttx/configs/stm3240g-eval/README.txt @@ -418,38 +418,15 @@ STM3240G-EVAL-specific Configuration Options to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn is defined (as above) then the following may also be defined to indicate that the timer is intended to be used for pulsed output modulation, ADC conversion, - or DAC conversion. - - CONFIG_STM32_TIM1_PWM - CONFIG_STM32_TIM2_PWM - CONFIG_STM32_TIM3_PWM - CONFIG_STM32_TIM4_PWM - CONFIG_STM32_TIM5_PWM - CONFIG_STM32_TIM8_PWM - CONFIG_STM32_TIM9_PWM - CONFIG_STM32_TIM10_PWM - CONFIG_STM32_TIM11_PWM - CONFIG_STM32_TIM12_PWM - CONFIG_STM32_TIM13_PWM - CONFIG_STM32_TIM14_PWM - - CONFIG_STM32_TIM1_ADC - CONFIG_STM32_TIM2_ADC - CONFIG_STM32_TIM3_ADC - CONFIG_STM32_TIM4_ADC - CONFIG_STM32_TIM5_ADC - CONFIG_STM32_TIM6_ADC - CONFIG_STM32_TIM7_ADC - CONFIG_STM32_TIM8_ADC - - CONFIG_STM32_TIM1_DAC - CONFIG_STM32_TIM2_DAC - CONFIG_STM32_TIM3_DAC - CONFIG_STM32_TIM4_DAC - CONFIG_STM32_TIM5_DAC - CONFIG_STM32_TIM6_DAC - CONFIG_STM32_TIM7_DAC - CONFIG_STM32_TIM8_DAC + or DAC conversion. Note that ADC/DAC require two definition: Not only do you have + to assign the timer (n) for used by the ADC or DAC, but then you also have to + configure which ADC or DAC (m) it is assigned to. + + CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 + CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 + CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 + CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14 + CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2 For each timer that is enabled for PWM usage, we need the following additional configuration settings: @@ -604,7 +581,8 @@ Where is one of the following: CONFIG_ADC=y : Enable the generic ADC infrastructure CONFIG_STM32_ADC3=y : Enable ADC3 CONFIG_STM32_TIM1=y : Enable Timer 1 - CONFIG_STM32_TIM1_ADC3=y : Assign timer 1 to driver ADC3 sampling + CONFIG_STM32_TIM1_ADC=y : Indicate that timer 1 will be used to trigger an ADC + CONFIG_STM32_TIM1_ADC3=y : Assign timer 1 to drive ADC3 sampling CONFIG_STM32_ADC3_SAMPLE_FREQUENCY=100 : Select a sampling frequency See also apps/examples/README.txt diff --git a/nuttx/configs/stm3240g-eval/nsh/defconfig b/nuttx/configs/stm3240g-eval/nsh/defconfig index d85894ac4..be648022d 100755 --- a/nuttx/configs/stm3240g-eval/nsh/defconfig +++ b/nuttx/configs/stm3240g-eval/nsh/defconfig @@ -328,9 +328,22 @@ CONFIG_STM32_ETHMAC_REGDEBUG=n # # Enable ADC driver support. The STM3240G-EVAL has a 10 Kohm potentiometer # RV1 connected to PF9 of STM32F407IGH6 on the board: TIM14_CH1/ SMC_CD/ADC3_IN7 +# In order to use the ADC, you must make the following selections: +# +# Above: +# CONFIG_STM32_ADC3=y : Enable ADC3 +# CONFIG_STM32_TIM1=y : Enable Timer 1 +# +# Below: +# CONFIG_ADC=y : Enable the generic ADC infrastructure +# CONFIG_STM32_TIM1_ADC=y : Indicate that timer 1 will be used to trigger an ADC +# CONFIG_STM32_TIM1_ADC3=y : Assign timer 1 to drive ADC3 sampling +# CONFIG_STM32_ADC3_SAMPLE_FREQUENCY=100 : Select a sampling frequency # CONFIG_ADC=n +#CONFIG_STM32_TIM1_ADC=y CONFIG_STM32_TIM1_ADC3=y +CONFIG_STM32_ADC3_SAMPLE_FREQUENCY=100 # # PWM configuration -- cgit v1.2.3