From 1152e2332b5abae5490b1330bf2d75590527850a Mon Sep 17 00:00:00 2001 From: patacongo Date: Thu, 6 May 2010 00:08:02 +0000 Subject: Add ENC28J60 Interrupt git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2651 42af7a65-404d-4744-a932-0658087f49c3 --- nuttx/ChangeLog | 2 + nuttx/Documentation/NuttX.html | 10 +- nuttx/configs/olimex-strp711/README.txt | 135 +++++++++++++++++-------- nuttx/configs/olimex-strp711/src/up_enc28j60.c | 52 +++++++--- nuttx/configs/olimex-strp711/src/up_spi.c | 58 +++++------ nuttx/drivers/net/enc28j60.c | 2 +- 6 files changed, 170 insertions(+), 89 deletions(-) (limited to 'nuttx') diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog index e8906495c..3976f5aa9 100644 --- a/nuttx/ChangeLog +++ b/nuttx/ChangeLog @@ -1106,6 +1106,8 @@ (unverified on original check-in) * configs/olimex-str7p11/src/up_enc28j60.c - Add ENC28J60 initialization logic. + * configs/olimex-str7p11/src/up_spi.c - Fixed some bugs; added support + for ENC28J60. * arch/arm/src/str7x/str7x_xti.c - Add basic XTI support (external interrupts). diff --git a/nuttx/Documentation/NuttX.html b/nuttx/Documentation/NuttX.html index b44b4a43b..349cf84c8 100644 --- a/nuttx/Documentation/NuttX.html +++ b/nuttx/Documentation/NuttX.html @@ -8,7 +8,7 @@

NuttX RTOS

-

Last Updated: May 2, 2010

+

Last Updated: May 4, 2010

@@ -897,8 +897,10 @@ Two configurations have been verified: (1) The board boots and passes the OS test with console output visible on UART0, and the NuttShell (NSH) is fully functional with interrupt driven serial console. An SPI driver is available - but only partially tested. Additional features are needed: USB driver, MMC/SD integration, - to name two. And ENC29J60 Ethernet driver for add-on hardware is under development and + but only partially tested. Additional features are needed: USB driver, MMC integration, + to name two (the slot on the board appears to accept on MMC card dimensions; I have only + SD cards). + An SPI-based ENC29J60 Ethernet driver for add-on hardware is under development and should be available in the NuttX 5.5 release.

@@ -1689,6 +1691,8 @@ nuttx-5.5 2010-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr> (unverified on original check-in) * configs/olimex-str7p11/src/up_enc28j60.c - Add ENC28J60 initialization logic. + * configs/olimex-str7p11/src/up_spi.c - Fixed some bugs; added support + for ENC28J60. * arch/arm/src/str7x/str7x_xti.c - Add basic XTI support (external interrupts). diff --git a/nuttx/configs/olimex-strp711/README.txt b/nuttx/configs/olimex-strp711/README.txt index 12cdaaef5..4a21156c1 100644 --- a/nuttx/configs/olimex-strp711/README.txt +++ b/nuttx/configs/olimex-strp711/README.txt @@ -1,3 +1,25 @@ +README File for the Olimex STR-P711 NuttX Port +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Contents +^^^^^^^^ + + Olimex STR-P711 + Features + Power Supply + GIO Usage + Jumpers + External Interrupts + Development Environment + GNU Toolchain Options + NuttX buildroot Toolchain + Linux OpenOCD with Wiggler JTAG + Windows OpenOCD will Olimex JTAG + MMC/SD Slot + ENC28J60 Module + Configurations + STR71x-Specific Configuration Settings + Olimex STR-P711 ^^^^^^^^^^^^^^^ Features: @@ -57,6 +79,30 @@ Olimex STR-P711 Jumpers STNBY Will pull pin 23 /STDBY low + External Interrupt (XTI) availability. + + XTI TQFP64 + LINE PIN SIGNAL * OLIMEX USAGE + ---- ------ ------------------------- - ------------------------ + 2 -- P2.8 (Not available in TQFP64) + 3 -- P2.9 (Not available in TQFP64) + 4 -- P2.10 (Not available in TQFP64) + 5 25 P2.11 (Not available in TQFP64) + 6 42 P1.11/CANRX USBOP (to USB connector) + 7 47 P1.13/HCLK/I0.SCL CLK ?????????????? + 8 48 P1.14/HRXD/I0.SDA BUT button (PL open, PU closed) + 9 53 P0.1/S0.MOSI/U3.RX * SPI0-3 MOSI0 + 10 54 P0.2/S0.SCLK/I1.SCL * SPI0-5 SCLK0 + 11 61 P0.6/S1.SCLK * SPI1-5 SCLK1 (also to MMC slot) + 12 63 P0.8/U0.RX/U0.TX U0.TX + 13 1 P0.10/U1.RX/U1.TX/SC.DATA U1.RX + 14 5 P0.13/U2.RX/T2.OCMPA BUZZ (to buzzer circult) + 15 20 P0.15/WAKEUP WAKE-UP button (PL open, PU closed) + + * Only these pins are available at a + connector and are not dedicated to + other board functions. + Development Environment ^^^^^^^^^^^^^^^^^^^^^^^ @@ -160,8 +206,8 @@ NuttX buildroot Toolchain 8. Edit setenv.h so that the PATH variable includes the path to the newly built binaries. -OpenOCD -^^^^^^^ +Linux OpenOCD with Wiggler JTAG +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ For a debug environment, I am using OpenOCD with a Wiggler-clone JTAG interface. The following steps worked for me with a 20081028 OpenOCD snapshot. @@ -228,6 +274,44 @@ GENERAL STEPS: The same commands from the telnet interface can now be accessed through the 'monitor' command, e.g. 'monitor help' +Windows OpenOCD will Olimex JTAG +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + I have been using the Olimex ARM-USB-OCD JTAG debugger with the STR-P711 + (http://www.olimex.com). The OpenOCD configuration file is here: + scripts/oocd_ft2xx.cfg. There is also a script on the scripts/ directory that + I used to start the OpenOCD daemon on my system called oocd.sh. That + script would probably require some modifications to work in another + environment: + + - possibly the value of OPENOCD_PATH + - If you are working under Linux you will need to change any + occurances of `cygpath -w blablabla` to just blablabla + + The setenv.sh file includes some environment varialble settings + that are needed by oocd.sh. If you have $PATH and other environment + variables set up, then you should be able to start the OpenOCD daemon like: + + oocd.sh + + To use the Windows Olimex USB JTAG (or 'oocd.sh pp' to use the Wriggler + JTAG) where it is assumed that you are executing oocd.sh from the top level + level NuttX directory. + + Once the OpenOCD daemon has been started, you can connect to it via + GDB using the following GDB command: + + arm-elf-gdb + (gdb) target remote localhost:3333 + + And you can load the NuttX ELF file into FLASH: + + (gdb) load nuttx + + (There are also some files in the scripts/ directory that I used to + get OpenOCD working with a Wriggler clone... I never got that stuff + working). + MMC/SD Slot ^^^^^^^^^^^ @@ -253,7 +337,9 @@ ENC28J60 Module ^^^^^^^^^^^^^^^ The ENC28J60 module does not come on the Olimex-STR-P711, but this describes - how I have connected it: + how I have connected it. NOTE that the ENC28J60 requires an external interrupt + (XTI) pin. The only easily accessible XTI pins are on SPI0/1 so you can't have + both SPI0 and 1 together with this configuration. Module CON5 QFN ENC2860 Description --------------- ------------------------------------------------------- @@ -269,7 +355,7 @@ ENC28J60 Module 6 5 NET RST 6 ~RESET Active-low device Reset input For the Olimex STR-P711, the ENC28J60 module is placed on SPI0 and uses - P0.3 for CS, P1.4 for an interrupt, and P1.5 as a reset: + P0.3 for CS, P0.6 for an interrupt, and P0.4 as a reset: Module CON5 Olimex STR-P711 Connection --------------- ------------------------------------------------------- @@ -280,50 +366,13 @@ ENC28J60 Module 5 5 GND SPI0-1 GND 10 J9-1 3V3 SPI0-6 3.3V 9 2 WOL NC - 8 3 NET INT TMR1_EXT-5 P1.4 input P1.4/T1.ICAPA/T1.EXTCLK + 8 3 NET INT SPI1-5 P0.6 XTI 11 P0.6/S1.SCLK 7 4 CLKOUT NC - 6 5 NET RST TMR1_EXT_4 P1.5 output P1.5/T1.ICAPB + 6 5 NET RST SPI1-4 P0.4 output P0.4/S1.MISO UART3, I2C cannot be used with SPI0. The GPIOs selected for the ENC28J60 interrupt conflict with TIM1. -Using OpenOCD and GDB -^^^^^^^^^^^^^^^^^^^^^ - - I have been using the Olimex ARM-USB-OCD JTAG debugger with the STR-P711 - (http://www.olimex.com). The OpenOCD configuration file is here: - scripts/oocd_ft2xx.cfg. There is also a script on the scripts/ directory that - I used to start the OpenOCD daemon on my system called oocd.sh. That - script would probably require some modifications to work in another - environment: - - - possibly the value of OPENOCD_PATH - - If you are working under Linux you will need to change any - occurances of `cygpath -w blablabla` to just blablabla - - The setenv.sh file includes some environment varialble settings - that are needed by oocd.sh. If you have $PATH and other environment - variables set up, then you should be able to start the OpenOCD daemon like: - - oocd.sh - - Where it is assumed that you are executing oocd.sh from the top level - directory where NuttX is installed. - - Once the OpenOCD daemon has been started, you can connect to it via - GDB using the following GDB command: - - arm-elf-gdb - (gdb) target remote localhost:3333 - - And you can load the NuttX ELF file: - - (gdb) load nuttx - - (There are also some files in the scripts/ directory that I used to - get OpenOCD working with a Wriggler clone... I never got that stuff - working). - Configurations: --------------- diff --git a/nuttx/configs/olimex-strp711/src/up_enc28j60.c b/nuttx/configs/olimex-strp711/src/up_enc28j60.c index 63a21067f..fcb68b5bb 100755 --- a/nuttx/configs/olimex-strp711/src/up_enc28j60.c +++ b/nuttx/configs/olimex-strp711/src/up_enc28j60.c @@ -36,8 +36,10 @@ /* * ENC28J60 Module * - * The ENC28J60 module does not come on the Olimex-STR-P711, but this describes - * how I have connected it: + * The ENC28J60 module does not come on the Olimex-STR-P711, but this + * describes how I have connected it. NOTE that the ENC28J60 requires an + * external interrupt (XTI) pin. The only easily accessible XTI pins are on + * SPI0/1 so you can't have both SPI0 and 1 together with this configuration. * * Module CON5 QFN ENC2860 Description * --------------- ------------------------------------------------------- @@ -53,7 +55,7 @@ * 6 5 NET RST 6 ~RESET Active-low device Reset input * * For the Olimex STR-P711, the ENC28J60 module is placed on SPI0 and uses - * P0.3 for CS, P1.4 for an interrupt, and P1.5 as a reset: + * P0.3 for CS, P0.6 for an interrupt, and P0.4 as a reset: * * Module CON5 Olimex STR-P711 Connection * --------------- ------------------------------------------------------- @@ -64,14 +66,14 @@ * 5 5 GND SPI0-1 GND * 10 J9-1 3V3 SPI0-6 3.3V * 9 2 WOL NC - * 8 3 NET INT TMR1_EXT-5 P1.4 input P1.4/T1.ICAPA/T1.EXTCLK + * 8 3 NET INT SPI1-5 P0.6 XTI 11 P0.6/S1.SCLK * 7 4 CLKOUT NC - * 6 5 NET RST TMR1_EXT_4 P1.5 output P1.5/T1.ICAPB + * 6 5 NET RST SPI1-4 P0.4 output P0.4/S1.MISO * * UART3, I2C cannot be used with SPI0. The GPIOs selected for the ENC28J60 * interrupt conflict with TMR1. */ -#warning "Need to select differnt interrupt pin.. XTI doesn't support this one" + /**************************************************************************** * Included Files @@ -112,24 +114,41 @@ #endif /* UART3, I2C cannot be used with SPI0. The GPIOs selected for the ENC28J60 - * interrupt conflict with TIM1. + * interrupt conflict with BSPI1. */ #ifdef CONFIG_STR71X_UART3 # error "CONFIG_STR71X_UART3 cannot be used in this configuration" #endif -#ifdef CONFIG_STR71X_TIM1 -# error "CONFIG_STR71X_TIM1 cannot be used in this configuration" +#ifdef CONFIG_STR71X_I2C1 +# error "CONFIG_STR71X_I2C1 cannot be used in this configuration" +#endif + +#ifdef CONFIG_STR71X_BSP1 +# error "CONFIG_STR71X_BSP1 cannot be used in this configuration" #endif /* SPI Assumptions **********************************************************/ -#define ENC28J60_SPI_PORTNO 0 /* On SPI0 */ -#define ENC28J60_DEVNO 0 /* Only one ENC28J60 */ -#define ENC28J60_IRQ STR71X_IRQ_FIRSTXTI /* NEEDED!!!!!!!!!!!!!!!! */ +#define ENC28J60_SPI_PORTNO 0 /* On SPI0 */ +#define ENC28J60_DEVNO 0 /* Only one ENC28J60 */ +#define ENC28J60_IRQ STR71X_IRQ_PORT0p6 /* XTI Line 11: P0.6 */ + +/* ENC28J60 additional pins ************************************************* + * + * NOTE: The ENC28J60 is a 3.3V part; however, it was designed to be + * easily integrated into 5V systems. The SPI CS, SCK and SI inputs, + * as well as the RESET pin, are all 5V tolerant. On the other hand, + * if the host controller is operated at 5V, it quite likely will + * not be within specifications when its SPI and interrupt inputs + * are driven by the 3.3V CMOS outputs on the ENC28J60. A + * unidirectional level translator would be necessary. + */ -#warning "Eventually need to fix XTI IRQ number!" +# define ENC_GPIO0_CS (1 << 3) /* Chip select (P0.3) */ +# define ENC_GPIO0_NETRST (1 << 4) /* Reset (P0.4) */ +# define ENC_GPIO0_NETINT (1 << 6) /* Interrupt (P0.6) */ /**************************************************************************** * Private Data @@ -150,6 +169,7 @@ void up_netinitialize(void) { FAR struct spi_dev_s *spi; + uint16_t reg16; int ret; /* Get the SPI port */ @@ -170,6 +190,12 @@ void up_netinitialize(void) return; } + /* Take ENC28J60 out of reset (active low)*/ + + reg16 = getreg16(STR71X_GPIO0_PD); + reg16 &= ~ENC_GPIO0_NETRST; + putreg16(reg16, STR71X_GPIO0_PD); + /* Bind the SPI port to the ENC28J60 driver */ ret = enc_initialize(spi, ENC28J60_DEVNO, ENC28J60_IRQ); diff --git a/nuttx/configs/olimex-strp711/src/up_spi.c b/nuttx/configs/olimex-strp711/src/up_spi.c index 3636bc8fa..c01cbbc87 100644 --- a/nuttx/configs/olimex-strp711/src/up_spi.c +++ b/nuttx/configs/olimex-strp711/src/up_spi.c @@ -80,6 +80,14 @@ # define CONFIG_STR714X_BSPI1_RXFIFO_DEPTH 8 #endif +#if defined(CONFIG_STR71X_UART3) && defined (CONFIG_STR71X_BSPI0) +# warning "BSPI0 GPIO usage conflicts with UART3" +#endif + +#if defined(CONFIG_STR71X_IC21) && defined (CONFIG_STR71X_BSPI0) +# warning "BSPI0 GPIO usage conflicts with IC21" +#endif + #if defined(CONFIG_STR71X_HDLC) && defined (CONFIG_STR71X_BSPI1) # warning "BSPI1 GPIO usage conflicts with HDLC" #endif @@ -129,7 +137,9 @@ /* ENC28J60 Module * * The ENC28J60 module does not come on the Olimex-STR-P711, but this describes - * how I have connected it: + * how I have connected it. NOTE that the ENC28J60 requires an external interrupt + * (XTI) pin. The only easily accessible XTI pins are on SPI0/1 so you can't have + * both SPI0 and 1 together with this configuration. * * STR-P711 PIN PIN CONFIGURATION ENC28J60 CONNECTION * ----------------------- ----------------- ----------------------- @@ -140,23 +150,19 @@ * GND GND 5 5 GND * 3.3V 3.3V 10 J9-1 3V3 * NC NC 9 2 WOL - * P1.4/T1.ICAPA/T1.EXTCLK P1.4 input 8 3 NET INT + * P0.6/S1.SCLK P0.6 input 8 3 NET INT * NC NC 7 4 CLKOUT - * P1.5/T1.ICAPB P1.5 output 6 5 NET RST + * P0.4/S1.MISO P0.4 output 6 5 NET RST */ #ifdef CONFIG_NET_ENC28J60 /* UART3, I2C cannot be used with SPI0. The GPIOs selected for the ENC28J60 - * interrupt conflict with TMR1. + * interrupt conflict with BSPI1 */ -# ifdef CONFIG_STR71X_UART3 -# error "CONFIG_STR71X_UART3 cannot be used in this configuration" -# endif - -# ifdef CONFIG_STR71X_TIM3 -# error "CONFIG_STR71X_TIM3 cannot be used in this configuration" +# ifdef CONFIG_STR71X_BSPI1 +# warning "CONFIG_STR71X_BSPI1 cannot be used in this configuration" # endif /* ENC28J60 additional pins @@ -171,28 +177,19 @@ */ # define ENC_GPIO0_CS (1 << 3) -# define ENC_GPIO0_INTTL (0) -# define ENC_GPIO0_INCMOS (0) -# define ENC_GPIO0_OUTPP ENC_GPIO0_CS -# define ENC_GPIO0_ALL ENC_GPIO0_CS +# define ENC_GPIO0_NETRST (1 << 4) +# define ENC_GPIO0_NETINT (1 << 6) -# define ENC_GPIO1_NETINT ( 1 << 4) -# define ENC_GPIO1_NETRST (1 << 5) -# define ENC_GPIO1_INTTL (0) -# define ENC_GPIO1_INCMOS ENC_GPIO1_NETINT -# define ENC_GPIO1_OUTPP ENC_GPIO1_NETRST -# define ENC_GPIO1_ALL (ENC_GPIO1_NETINT|ENC_GPIO1_NETRST) +# define ENC_GPIO0_INTTL (0) +# define ENC_GPIO0_INCMOS ENC_GPIO0_NETINT +# define ENC_GPIO0_OUTPP (ENC_GPIO0_CS|ENC_GPIO0_NETRST) +# define ENC_GPIO0_ALL (ENC_GPIO0_CS|ENC_GPIO0_NETINT|ENC_GPIO0_NETRST) # define BSPI0_GPIO0_INTTL ENC_GPIO0_INTTL # define BSPI0_GPIO0_INCMOS ENC_GPIO0_INCMOS # define BSPI0_GPIO0_OUTPP ENC_GPIO0_OUTPP # define BSPI0_GPIO0_ALL (BSPI0_GPIO0_ALT|ENC_GPIO0_ALL) -# define BSPI0_GPIO1_INTTL ENC_GPIO1_INTTL -# define BSPI0_GPIO1_INCMOS ENC_GPIO1_INCMOS -# define BSPI0_GPIO1_OUTPP ENC_GPIO1_OUTPP -# define BSPI0_GPIO1_ALL ENC_GPIO1_ALL - #else # define BSPI0_GPIO0_INTTL (0) # define BSPI0_GPIO0_INCMOS (0) @@ -227,7 +224,7 @@ * P1.15/HTXD 13/15 CP P1.15 input * * Use of SPI1 doesn't conflict with anything. WP conflicts USB; CP conflicts - * with NTXD. + * with HTXD. */ /* MMC/SD additional pins */ @@ -907,11 +904,13 @@ FAR struct spi_dev_s *up_spiinitialize(int port) reg16 |= (BSPI0_GPIO0_ALT|BSPI0_GPIO0_OUTPP); putreg16(reg16, STR71X_GPIO0_PC2); - /* Start with enc28j60 disabled */ + /* Start with enc28j60 de-selected (active low) and in + * reset (also active low) + */ #ifdef CONFIG_NET_ENC28J60 reg16 = getreg16(STR71X_GPIO0_PD); - reg16 |= ENC_GPIO0_CS; + reg16 |= (ENC_GPIO0_CS | ENC_GPIO0_NETRST); putreg16(reg16, STR71X_GPIO0_PD); #endif @@ -933,6 +932,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port) * PC0=1 PC1=0 PC2=1: Output, push pull */ +#ifdef BSPI0_GPIO1_ALL reg16 = getreg16(STR71X_GPIO1_PC0); reg16 &= ~BSPI0_GPIO1_ALL; reg16 |= (BSPI0_GPIO1_INTTL|BSPI0_GPIO1_OUTPP); @@ -947,7 +947,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port) reg16 &= ~BSPI0_GPIO1_ALL; reg16 |= BSPI0_GPIO0_OUTPP; putreg16(reg16, STR71X_GPIO1_PC2); - +#endif g_spidev0.initialized = true; } diff --git a/nuttx/drivers/net/enc28j60.c b/nuttx/drivers/net/enc28j60.c index ad356a0af..881b97393 100755 --- a/nuttx/drivers/net/enc28j60.c +++ b/nuttx/drivers/net/enc28j60.c @@ -1981,7 +1981,7 @@ static int enc_reset(FAR struct enc_driver_s *priv) regval = enc_rdbreg(priv, ENC_EREVID); if (regval == 0x00 || regval == 0xff) { - nlldbg("Bad Rev ID: %0x\n", regval); + nlldbg("Bad Rev ID: %02x\n", regval); return -ENODEV; } nllvdbg("Rev ID: %02x\n", regval); -- cgit v1.2.3