From 58c30c007b0d51e2ffc6bbc19407ac73436d833e Mon Sep 17 00:00:00 2001 From: patacongo Date: Thu, 29 Oct 2009 20:30:46 +0000 Subject: Initial USB debug changes git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2187 42af7a65-404d-4744-a932-0658087f49c3 --- nuttx/arch/arm/src/stm32/stm32_rcc.c | 29 ++++++++++++++++++--------- nuttx/arch/arm/src/stm32/stm32_rcc.h | 2 +- nuttx/arch/arm/src/stm32/stm32_usbdev.c | 31 ++++++++++++++++++++++++++--- nuttx/configs/stm3210e-eval/include/board.h | 2 +- 4 files changed, 50 insertions(+), 14 deletions(-) (limited to 'nuttx') diff --git a/nuttx/arch/arm/src/stm32/stm32_rcc.c b/nuttx/arch/arm/src/stm32/stm32_rcc.c index 972b036a4..7742e46b0 100755 --- a/nuttx/arch/arm/src/stm32/stm32_rcc.c +++ b/nuttx/arch/arm/src/stm32/stm32_rcc.c @@ -145,6 +145,22 @@ static inline void rcc_enableapb1(void) { uint32 regval; +#if CONFIG_STM32_USB + /* USB clock divider. This bit must be valid before enabling the USB + * clock in the RCC_APB1ENR register. This bit can’t be reset if the USB + * clock is enabled. + */ + + regval = getreg32(STM32_RCC_CFGR); + regval &= ~RCC_CFGR_USBPRE; + regval |= STM32_CFGR_USBPRE; + putreg32(regval, STM32_RCC_CFGR); +#endif + + /* Set the appropriate bits in the APB1ENR register to enabled the + * selected APB1 peripherals. + */ + regval = getreg32(STM32_RCC_APB1ENR); #if CONFIG_STM32_TIM2 /* Timer 2 clock enable */ @@ -266,21 +282,16 @@ static inline void rcc_enableapb1(void) regval |= RCC_APB1ENR_DACEN; #endif putreg32(regval, STM32_RCC_APB1ENR); - -#if CONFIG_STM32_USB - /* USB clock divider */ - - regval = getreg32(STM32_RCC_CFGR); - regval &= ~RCC_CFGR_USBPRE; - regval |= STM32_CFGR_USBPRE; - putreg32(regval, STM32_RCC_CFGR); -#endif } static inline void rcc_enableapb2(void) { uint32 regval; + /* Set the appropriate bits in the APB2ENR register to enabled the + * selected APB2 peripherals. + */ + /* Enable GPIOA, GPIOB, ... and AFIO clocks */ regval = getreg32(STM32_RCC_APB2ENR); diff --git a/nuttx/arch/arm/src/stm32/stm32_rcc.h b/nuttx/arch/arm/src/stm32/stm32_rcc.h index e5e69fe4e..eacb65522 100755 --- a/nuttx/arch/arm/src/stm32/stm32_rcc.h +++ b/nuttx/arch/arm/src/stm32/stm32_rcc.h @@ -153,6 +153,7 @@ # define RCC_CFGR_PLLMUL_CLKx14 (12 << RCC_CFGR_PLLMUL_SHIFT) /* 1100: PLL input clock x 14 */ # define RCC_CFGR_PLLMUL_CLKx15 (13 << RCC_CFGR_PLLMUL_SHIFT) /* 1101: PLL input clock x 15 */ # define RCC_CFGR_PLLMUL_CLKx16 (14 << RCC_CFGR_PLLMUL_SHIFT) /* 111x: PLL input clock x 16 */ +#define RCC_CFGR_USBPRE (1 << 22) /* Bit 22: USB prescaler */ #define RCC_CFGR_MCO_SHIFT (24) /* Bits 26-24: Microcontroller Clock Output */ #define RCC_CFGR_MCO_MASK (7 << RCC_CFGR_MCO_SHIFT) # define RCC_CFGR_NOCLK (0 << RCC_CFGR_MCO_SHIFT) /* 0xx: No clock */ @@ -160,7 +161,6 @@ # define RCC_CFGR_INTCLK (5 << RCC_CFGR_MCO_SHIFT) /* 101: Internal 8 MHz RC oscillator clock selected */ # define RCC_CFGR_EXTCLK (6 << RCC_CFGR_MCO_SHIFT) /* 110: External 1-25 MHz oscillator clock selected */ # define RCC_CFGR_PLLCLKd2 (7 << RCC_CFGR_MCO_SHIFT) /* 111: PLL clock divided by 2 selected */ -#define RCC_CFGR_USBPRE (1 << 22) /* Bit 22: USB prescaler */ /* Clock interrupt register */ diff --git a/nuttx/arch/arm/src/stm32/stm32_usbdev.c b/nuttx/arch/arm/src/stm32/stm32_usbdev.c index fa7e5a56a..51f16416e 100644 --- a/nuttx/arch/arm/src/stm32/stm32_usbdev.c +++ b/nuttx/arch/arm/src/stm32/stm32_usbdev.c @@ -335,9 +335,11 @@ struct stm32_usbdev_s #if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG) static uint16 stm32_getreg(uint32 addr); static void stm32_putreg(uint16 val, uint32 addr); +static void stm32_checksetup(void); #else # define stm32_getreg(addr) getreg16(addr) # define stm32_putreg(val,addr) putreg16(val,addr) +# define stm32_checksetup() #endif /* Low-Level Helpers ********************************************************/ @@ -566,6 +568,27 @@ static void stm32_putreg(uint16 val, uint32 addr) } #endif +/**************************************************************************** + * Name: stm32_checksetup + ****************************************************************************/ + +#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG) +static void stm32_checksetup(void) +{ + uint32 cfgr = getreg32(STM32_RCC_CFGR); + uint32 apb1rstr = getreg32(STM32_RCC_APB1RSTR); + uint32 apb1enr = getreg32(STM32_RCC_APB1ENR); + + lldbg("CFGR: %08x APB1RSTR: %08x APB1ENR: %08x\n", cfgr, apb1rstr, apb1enr); + + if ((apb1rstr & RCC_APB1RSTR_USBRST) != 0 || + (apb1enr & RCC_APB1ENR_USBEN) == 0) + { + lldbg("ERROR: USB is NOT setup correctly\n"); + } +} +#endif + /**************************************************************************** * Low-Level Helpers ****************************************************************************/ @@ -1106,7 +1129,7 @@ static int stm32_wrrequest(struct stm32_usbdev_s *priv, struct stm32_ep_s *prive bytesleft = privreq->req.len - privreq->req.xfrd; nbytes = bytesleft; -#warning REVISIT... If the EP supports double buffering, then we can do better +#warning "REVISIT: If the EP supports double buffering, then we can do better" /* Send the next packet */ @@ -2440,6 +2463,7 @@ static int stm32_epconfigure(struct usbdev_ep_s *ep, break; case USB_EP_ATTR_XFER_ISOC: /* Isochronous endpoint */ +#warning "REVISIT: Need to review isochronous EP setup" setting = USB_EPR_EPTYPE_ISOC; break; @@ -2456,7 +2480,7 @@ static int stm32_epconfigure(struct usbdev_ep_s *ep, /* Get the address of the PMA buffer allocated for this endpoint */ -#warning "Should configure BULK EPs using double buffer feature" +#warning "REVISIT: Should configure BULK EPs using double buffer feature" pma = STM32_BUFNO2BUF(privep->bufno); /* Get the maxpacket size of the endpoint. */ @@ -2877,7 +2901,7 @@ static struct usbdev_ep_s *stm32_allocep(struct usbdev_s *dev, ubyte epno, /* Allocate a PMA buffer for this endpoint */ -#warning "Should configure BULK EPs using double buffer feature" +#warning "REVISIT: Should configure BULK EPs using double buffer feature" bufno = stm32_allocpma(priv); if (bufno < 0) { @@ -3134,6 +3158,7 @@ void up_usbinitialize(void) int epno; usbtrace(TRACE_DEVINIT, 0); + stm32_checksetup(); /* Disable the USB controller, disable all USB interrupts */ diff --git a/nuttx/configs/stm3210e-eval/include/board.h b/nuttx/configs/stm3210e-eval/include/board.h index 30ad0ae98..9968957c2 100755 --- a/nuttx/configs/stm3210e-eval/include/board.h +++ b/nuttx/configs/stm3210e-eval/include/board.h @@ -85,7 +85,7 @@ #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) -/* USB divider */ +/* USB divider -- Divide PLL clock by 1.5 */ #define STM32_CFGR_USBPRE 0 -- cgit v1.2.3