From 6df6162e40f9b1c5ed1d3c42585baf3e1a2be161 Mon Sep 17 00:00:00 2001 From: patacongo Date: Mon, 18 Feb 2008 18:53:07 +0000 Subject: Low uart fixes git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@710 42af7a65-404d-4744-a932-0658087f49c3 --- nuttx/arch/z80/src/z8/z8_lowuart.c | 4 ++-- nuttx/arch/z80/src/z8/z8_serial.c | 45 +++++++++++++++++++++++++++++++++++++- 2 files changed, 46 insertions(+), 3 deletions(-) (limited to 'nuttx') diff --git a/nuttx/arch/z80/src/z8/z8_lowuart.c b/nuttx/arch/z80/src/z8/z8_lowuart.c index bfcb26aae..e18c4b5d1 100644 --- a/nuttx/arch/z80/src/z8/z8_lowuart.c +++ b/nuttx/arch/z80/src/z8/z8_lowuart.c @@ -102,7 +102,7 @@ void up_lowuartinit(void) putreg8(0x00, PAADDR); putreg8(0x00, U0CTL1); /* no multi-processor operation mode */ - putreg8(0x00, U0CTL0); /* Transmit enable, Receive enable, no Parity, 1 Stop bit */ + putreg8(0xc0, U0CTL0); /* Transmit enable, Receive enable, no Parity, 1 Stop bit */ #elif defined(EZ8_UART1) && defined(CONFIG_UART1_SERIAL_CONSOLE) /* Set the baudrate */ @@ -124,7 +124,7 @@ void up_lowuartinit(void) putreg8(0x00, PDADDR); putreg8(0x00, U1CTL1); /* no multi-processor operation mode */ - putreg8(0x00, U1CTL0); /* Transmit enable, Receive enable, no Parity, 1 Stop bit */ + putreg8(0xc0, U1CTL0); /* Transmit enable, Receive enable, no Parity, 1 Stop bit */ #endif } #endif /* CONFIG_USE_LOWUARTINIT */ \ No newline at end of file diff --git a/nuttx/arch/z80/src/z8/z8_serial.c b/nuttx/arch/z80/src/z8/z8_serial.c index 19ee84786..eb41bdd04 100755 --- a/nuttx/arch/z80/src/z8/z8_serial.c +++ b/nuttx/arch/z80/src/z8/z8_serial.c @@ -290,6 +290,48 @@ static void z8_consoleput(ubyte ch) putreg8(ch, priv->uartbase + Z8_UART_TXD); } +/**************************************************************************** + * Name: z8_uartconfigure + * + * Description: + * Configure hardware for UART functionality + * + ****************************************************************************/ + +void z8_uartconfigure(void) +{ + uint16 brg; + ubyte val; + + /* Configure GPIO Port A pins 4 & 5 for alternate function */ + + putreg8(0x02, PAADDR); + val = getreg8(PACTL) | 0x30; /* Set bits in alternate function register */ + putreg8(val, PACTL); + putreg8(0x07, PAADDR); + val = getreg8(PACTL) & 0xcf; /* Reset bits in alternate function set-1 register */ + putreg8(val, PACTL); + putreg8(0x08, PAADDR); + val = getreg8(PACTL) & 0xcf; /* Reset bits in alternate function set-2 register */ + putreg8(val, PACTL); + putreg8(0x00, PAADDR); + +#ifdef EZ8_UART1 + /* Configure GPIO Port D pins 4 & 5 for alternate function */ + + putreg8(0x02, PAADDR); + val = getreg8(PDCTL) | 0x30; /* Set bits in alternate function register */ + putreg8(val, PDCTL); + putreg8(0x07, PDADDR); + val = getreg8(PDCTL) & 0xcf; /* Reset bits in alternate function set-1 register */ + putreg8(val, PDCTL); + putreg8(0x08, PDADDR); + val = getreg8(PDCTL) & 0xcf; /* Reset bits in alternate function set-2 register */ + putreg8(val, PDCTL); + putreg8(0x00, PDADDR); +#endif +} + /**************************************************************************** * Name: z8_setup * @@ -303,6 +345,7 @@ static int z8_setup(struct uart_dev_s *dev) { #ifndef CONFIG_SUPPRESS_UART_CONFIG struct z8_uart_s *priv = (struct z8_uart_s*)dev->priv; + uint32 freq = get_freq(); uint32 brg; ubyte ctl0; ubyte ctl1; @@ -311,7 +354,7 @@ static int z8_setup(struct uart_dev_s *dev) * BRG = (freq + baud * 8)/(baud * 16) */ - brg = (_DEFCLK + (priv->baud << 3))/(priv->baud << 4); + brg = (freq + (priv->baud << 3))/(priv->baud << 4); putreg16((uint16)brg, priv->uartbase + Z8_UART_BR); /* Configure STOP bits */ -- cgit v1.2.3