From 8f307c44c06d63f4ff974fb1f0e31bf6f7676b2f Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 29 Mar 2015 07:14:09 -0600 Subject: PIC32MZ Ethernet: Enable PBCLK5 and MII divider for PHY. From Kistopher Tate --- nuttx/configs/pic32mz-starterkit/include/board.h | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'nuttx') diff --git a/nuttx/configs/pic32mz-starterkit/include/board.h b/nuttx/configs/pic32mz-starterkit/include/board.h index c2ccae56f..fcfcc96c0 100644 --- a/nuttx/configs/pic32mz-starterkit/include/board.h +++ b/nuttx/configs/pic32mz-starterkit/include/board.h @@ -136,7 +136,10 @@ * FRC clock is used for programming */ -#undef BOARD_PBCLK5_ENABLE +#define BOARD_PBCLK5_ENABLE 1 /* Enable PBCLK5 */ +#define BOARD_PB5DIV 2 /* Divider = 2 */ +#define BOARD_PBCLK5 100000000 /* PBCLK5 frequency = 200MHz/2 = 100MHz */ + /* PBCLK6 * Peripherals: @@ -160,6 +163,16 @@ #define BOARD_WD_PRESCALER 1048576 /* Watchdog pre-scaler */ +/* Ethernet MII clocking. + * + * The clock divider used to create the MII Management Clock (MDC). The MIIM + * module uses the PBCLK5 as an input clock. According to the IEEE 802.3 + * Specification this should be no faster than 2.5 MHz. However, some PHYs + * support clock rates up to 12.5 MHz. + */ + +#define BOARD_EMAC_MIIM_DIV 40 /* Ideal: 100MHz/40 = 2.5MHz */ + /* LED definitions **********************************************************/ /* LED Configuration ********************************************************/ /* The PIC32MZ Ethernet Starter kit has 3 user LEDs labelled LED1-3 on the -- cgit v1.2.3