From ac94ef18a7373645f708c1256df06e369ea9f371 Mon Sep 17 00:00:00 2001 From: patacongo Date: Sat, 7 Jul 2012 15:29:13 +0000 Subject: Straighten out LPC32 UART clocking (still some baud calculation issues) git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4917 42af7a65-404d-4744-a932-0658087f49c3 --- nuttx/arch/arm/src/common/up_internal.h | 2 +- nuttx/arch/arm/src/lpc43xx/Make.defs | 4 +- .../arm/src/lpc43xx/chip/lpc4310203050_pinconfig.h | 98 ++-- nuttx/arch/arm/src/lpc43xx/chip/lpc43_cgu.h | 23 + nuttx/arch/arm/src/lpc43xx/lpc43_allocateheap.c | 15 + nuttx/arch/arm/src/lpc43xx/lpc43_cgu.h | 8 +- nuttx/arch/arm/src/lpc43xx/lpc43_lowputc.c | 422 ---------------- nuttx/arch/arm/src/lpc43xx/lpc43_lowputc.h | 88 ---- nuttx/arch/arm/src/lpc43xx/lpc43_rgu.c | 4 +- nuttx/arch/arm/src/lpc43xx/lpc43_serial.c | 332 +++---------- nuttx/arch/arm/src/lpc43xx/lpc43_serial.h | 3 +- nuttx/arch/arm/src/lpc43xx/lpc43_start.c | 2 +- nuttx/arch/arm/src/lpc43xx/lpc43_uart.c | 531 +++++++++++++++++++++ nuttx/arch/arm/src/lpc43xx/lpc43_uart.h | 142 ++++++ nuttx/configs/lpc4330-xplorer/include/board.h | 15 + 15 files changed, 842 insertions(+), 847 deletions(-) delete mode 100644 nuttx/arch/arm/src/lpc43xx/lpc43_lowputc.c delete mode 100644 nuttx/arch/arm/src/lpc43xx/lpc43_lowputc.h create mode 100644 nuttx/arch/arm/src/lpc43xx/lpc43_uart.c create mode 100644 nuttx/arch/arm/src/lpc43xx/lpc43_uart.h (limited to 'nuttx') diff --git a/nuttx/arch/arm/src/common/up_internal.h b/nuttx/arch/arm/src/common/up_internal.h index 015b2b4bc..67f11d619 100644 --- a/nuttx/arch/arm/src/common/up_internal.h +++ b/nuttx/arch/arm/src/common/up_internal.h @@ -142,7 +142,7 @@ extern volatile uint32_t *current_regs; * CONFIG_DRAM_END */ -extern uint32_t g_heapbase; +extern const uint32_t g_heapbase; /* Address of the saved user stack pointer */ diff --git a/nuttx/arch/arm/src/lpc43xx/Make.defs b/nuttx/arch/arm/src/lpc43xx/Make.defs index ee8b647c9..1dbb3e957 100644 --- a/nuttx/arch/arm/src/lpc43xx/Make.defs +++ b/nuttx/arch/arm/src/lpc43xx/Make.defs @@ -59,8 +59,8 @@ endif CHIP_ASRCS = CHIP_CSRCS = lpc43_allocateheap.c lpc43_cgu.c lpc43_clrpend.c lpc43_gpio.c -CHIP_CSRCS += lpc43_irq.c lpc43_lowputc.c lpc43_pinconfig.c lpc43_rgu.c -CHIP_CSRCS += lpc43_start.c lpc43_timerisr.c +CHIP_CSRCS += lpc43_irq.c lpc43_pinconfig.c lpc43_rgu.c lpc43_serial.c +CHIP_CSRCS += lpc43_start.c lpc43_timerisr.c lpc43_uart.c ifneq ($(CONFIG_IDLE_CUSTOM),y) CHIP_CSRCS += lpc43_idle.c diff --git a/nuttx/arch/arm/src/lpc43xx/chip/lpc4310203050_pinconfig.h b/nuttx/arch/arm/src/lpc43xx/chip/lpc4310203050_pinconfig.h index 1b2546753..375b0ceb7 100644 --- a/nuttx/arch/arm/src/lpc43xx/chip/lpc4310203050_pinconfig.h +++ b/nuttx/arch/arm/src/lpc43xx/chip/lpc4310203050_pinconfig.h @@ -812,55 +812,55 @@ #define PINCONF_TRACEDATA3_1 (PINCONF_FUNC3|PINCONF_PINSF|PINCONF_PIN_8) #define PINCONF_TRACEDATA3_2 (PINCONF_FUNC5|PINCONF_PINS7|PINCONF_PIN_7) -#define PINCONF_U0_DIR_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_6) -#define PINCONF_U0_DIR_2 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_9) -#define PINCONF_U0_DIR_3 (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_2) -#define PINCONF_U0_RXD_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_1) -#define PINCONF_U0_RXD_2 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_11) -#define PINCONF_U0_RXD_3 (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_5) -#define PINCONF_U0_RXD_4 (PINCONF_FUNC7|PINCONF_PINS9|PINCONF_PIN_6) -#define PINCONF_U0_TXD_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_0) -#define PINCONF_U0_TXD_2 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_10) -#define PINCONF_U0_TXD_3 (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_4) -#define PINCONF_U0_TXD_4 (PINCONF_FUNC7|PINCONF_PINS9|PINCONF_PIN_5) -#define PINCONF_U0_UCLK_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_2) -#define PINCONF_U0_UCLK_2 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_8) -#define PINCONF_U0_UCLK_3 (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_1) - -#define PINCONF_U1_CTS_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_11) -#define PINCONF_U1_CTS_2 (PINCONF_FUNC2|PINCONF_PINSC|PINCONF_PIN_2) -#define PINCONF_U1_CTS_3 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_7) -#define PINCONF_U1_CTS_4 (PINCONF_FUNC4|PINCONF_PINS5|PINCONF_PIN_4) -#define PINCONF_U1_DCD_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_12) -#define PINCONF_U1_DCD_2 (PINCONF_FUNC2|PINCONF_PINSC|PINCONF_PIN_11) -#define PINCONF_U1_DCD_3 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_9) -#define PINCONF_U1_DCD_4 (PINCONF_FUNC4|PINCONF_PINS5|PINCONF_PIN_5) -#define PINCONF_U1_DSR_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_7) -#define PINCONF_U1_DSR_2 (PINCONF_FUNC2|PINCONF_PINSC|PINCONF_PIN_10) -#define PINCONF_U1_DSR_3 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_8) -#define PINCONF_U1_DSR_4 (PINCONF_FUNC4|PINCONF_PINS5|PINCONF_PIN_0) -#define PINCONF_U1_DTR_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_8) -#define PINCONF_U1_DTR_2 (PINCONF_FUNC2|PINCONF_PINSC|PINCONF_PIN_12) -#define PINCONF_U1_DTR_3 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_10) -#define PINCONF_U1_DTR_4 (PINCONF_FUNC4|PINCONF_PINS5|PINCONF_PIN_1) -#define PINCONF_U1_RI_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_10) -#define PINCONF_U1_RI_2 (PINCONF_FUNC2|PINCONF_PINSC|PINCONF_PIN_1) -#define PINCONF_U1_RI_3 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_6) -#define PINCONF_U1_RI_4 (PINCONF_FUNC4|PINCONF_PINS5|PINCONF_PIN_3) -#define PINCONF_U1_RTS_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_9) -#define PINCONF_U1_RTS_2 (PINCONF_FUNC2|PINCONF_PINSC|PINCONF_PIN_3) -#define PINCONF_U1_RTS_3 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_5) -#define PINCONF_U1_RTS_4 (PINCONF_FUNC4|PINCONF_PINS5|PINCONF_PIN_2) -#define PINCONF_U1_RXD_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_14) -#define PINCONF_U1_RXD_2 (PINCONF_FUNC2|PINCONF_PINSC|PINCONF_PIN_14) -#define PINCONF_U1_RXD_3 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_12) -#define PINCONF_U1_RXD_4 (PINCONF_FUNC4|PINCONF_PINS3|PINCONF_PIN_5) -#define PINCONF_U1_RXD_5 (PINCONF_FUNC4|PINCONF_PINS5|PINCONF_PIN_7) -#define PINCONF_U1_TXD_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_13) -#define PINCONF_U1_TXD_2 (PINCONF_FUNC2|PINCONF_PINSC|PINCONF_PIN_13) -#define PINCONF_U1_TXD_3 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_11) -#define PINCONF_U1_TXD_4 (PINCONF_FUNC4|PINCONF_PINS3|PINCONF_PIN_4) -#define PINCONF_U1_TXD_5 (PINCONF_FUNC4|PINCONF_PINS5|PINCONF_PIN_6) +#define PINCONF_U0_DIR_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_6) +#define PINCONF_U0_DIR_2 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_9) +#define PINCONF_U0_DIR_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_2) +#define PINCONF_U0_RXD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_1) +#define PINCONF_U0_RXD_2 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_11) +#define PINCONF_U0_RXD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_5) +#define PINCONF_U0_RXD_4 (PINCONF_FUNC7|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_6) +#define PINCONF_U0_TXD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_0) +#define PINCONF_U0_TXD_2 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_10) +#define PINCONF_U0_TXD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_4) +#define PINCONF_U0_TXD_4 (PINCONF_FUNC7|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_5) +#define PINCONF_U0_UCLK_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_2) +#define PINCONF_U0_UCLK_2 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_8) +#define PINCONF_U0_UCLK_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_1) + +#define PINCONF_U1_CTS_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_11) +#define PINCONF_U1_CTS_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_2) +#define PINCONF_U1_CTS_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_7) +#define PINCONF_U1_CTS_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_4) +#define PINCONF_U1_DCD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_12) +#define PINCONF_U1_DCD_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_11) +#define PINCONF_U1_DCD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_9) +#define PINCONF_U1_DCD_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_5) +#define PINCONF_U1_DSR_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_7) +#define PINCONF_U1_DSR_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_10) +#define PINCONF_U1_DSR_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_8) +#define PINCONF_U1_DSR_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_0) +#define PINCONF_U1_DTR_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_8) +#define PINCONF_U1_DTR_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_12) +#define PINCONF_U1_DTR_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_10) +#define PINCONF_U1_DTR_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_1) +#define PINCONF_U1_RI_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_10) +#define PINCONF_U1_RI_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_1) +#define PINCONF_U1_RI_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_6) +#define PINCONF_U1_RI_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_3) +#define PINCONF_U1_RTS_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_9) +#define PINCONF_U1_RTS_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_3) +#define PINCONF_U1_RTS_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_5) +#define PINCONF_U1_RTS_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_2) +#define PINCONF_U1_RXD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_14) +#define PINCONF_U1_RXD_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_14) +#define PINCONF_U1_RXD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_12) +#define PINCONF_U1_RXD_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_5) +#define PINCONF_U1_RXD_5 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_7) +#define PINCONF_U1_TXD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_13) +#define PINCONF_U1_TXD_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_13) +#define PINCONF_U1_TXD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_11) +#define PINCONF_U1_TXD_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_4) +#define PINCONF_U1_TXD_5 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_6) #define PINCONF_U2_DIR_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_18) #define PINCONF_U2_DIR_2 (PINCONF_FUNC7|PINCONF_PINS2|PINCONF_PIN_13) diff --git a/nuttx/arch/arm/src/lpc43xx/chip/lpc43_cgu.h b/nuttx/arch/arm/src/lpc43xx/chip/lpc43_cgu.h index 0c223335b..911bc6764 100644 --- a/nuttx/arch/arm/src/lpc43xx/chip/lpc43_cgu.h +++ b/nuttx/arch/arm/src/lpc43xx/chip/lpc43_cgu.h @@ -712,6 +712,29 @@ # define BASE_USART0_CLKSEL_IDIVD (15 << BASE_USART0_CLK_CLKSEL_SHIFT) /* IDIVD */ # define BASE_USART0_CLKSEL_IDIVE (16 << BASE_USART0_CLK_CLKSEL_SHIFT) /* IDIVE */ /* Bits 29-31: Reserved */ +/* Output stage 17 control register (BASE_UART1_CLK) */ +/* NOTE: Clocks 4-19 are identical */ + +#define BASE_UART1_CLK_PD (1 << 0) /* Bit 0: Output stage power down */ + /* Bits 1-10: Reserved */ +#define BASE_UART1_CLK_AUTOBLOCK (1 << 11) /* Bit 11: Block clock during frequency change */ + /* Bits 12-23: Reserved */ +#define BASE_UART1_CLK_CLKSEL_SHIFT (24) /* Bits 24-28: Clock source selection */ +#define BASE_UART1_CLK_CLKSEL_MASK (31 << BASE_UART1_CLK_CLKSEL_SHIFT) +# define BASE_UART1_CLKSEL_32KHZOSC (0 << BASE_UART1_CLK_CLKSEL_SHIFT) /* 32 kHz oscillator */ +# define BASE_UART1_CLKSEL_IRC (1 << BASE_UART1_CLK_CLKSEL_SHIFT) /* IRC (default) */ +# define BASE_UART1_CLKSEL_ENET_RXCLK (2 << BASE_UART1_CLK_CLKSEL_SHIFT) /* ENET_RX_CLK */ +# define BASE_UART1_CLKSEL_ENET_TXCLK (3 << BASE_UART1_CLK_CLKSEL_SHIFT) /* ENET_TX_CLK */ +# define BASE_UART1_CLKSEL_GPCLKIN (4 << BASE_UART1_CLK_CLKSEL_SHIFT) /* GP_CLKIN */ +# define BASE_UART1_CLKSEL_XTAL (6 << BASE_UART1_CLK_CLKSEL_SHIFT) /* Crystal oscillator */ +# define BASE_UART1_CLKSEL_PLL0AUDIO (8 << BASE_UART1_CLK_CLKSEL_SHIFT) /* PLL0AUDIO */ +# define BASE_UART1_CLKSEL_PLL1 (9 << BASE_UART1_CLK_CLKSEL_SHIFT) /* PLL1 */ +# define BASE_UART1_CLKSEL_IDIVA (12 << BASE_UART1_CLK_CLKSEL_SHIFT) /* IDIVA */ +# define BASE_UART1_CLKSEL_IDIVB (13 << BASE_UART1_CLK_CLKSEL_SHIFT) /* IDIVB */ +# define BASE_UART1_CLKSEL_IDIVC (14 << BASE_UART1_CLK_CLKSEL_SHIFT) /* IDIVC */ +# define BASE_UART1_CLKSEL_IDIVD (15 << BASE_UART1_CLK_CLKSEL_SHIFT) /* IDIVD */ +# define BASE_UART1_CLKSEL_IDIVE (16 << BASE_UART1_CLK_CLKSEL_SHIFT) /* IDIVE */ + /* Bits 29-31: Reserved */ /* Output stage 18 control register (BASE_USART2_CLK) */ /* NOTE: Clocks 4-19 are identical */ diff --git a/nuttx/arch/arm/src/lpc43xx/lpc43_allocateheap.c b/nuttx/arch/arm/src/lpc43xx/lpc43_allocateheap.c index cb15f0bc4..7912f6c6e 100644 --- a/nuttx/arch/arm/src/lpc43xx/lpc43_allocateheap.c +++ b/nuttx/arch/arm/src/lpc43xx/lpc43_allocateheap.c @@ -201,6 +201,21 @@ * Private Data ****************************************************************************/ +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* _sbss is the start of the BSS region (see the linker script) _ebss is the + * end of the BSS regsion (see the linker script). The idle task stack starts + * at the end of BSS and is of size CONFIG_IDLETHREAD_STACKSIZE. The IDLE + * thread is the thread that the system boots on and, eventually, becomes the + * idle, do nothing task that runs only when there is nothing else to run. + * The heap continues from there until the configured end of memory. + * g_heapbase is the beginning of this heap region (not necessarily aligned). + */ + +const uint32_t g_heapbase = (uint32_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE; + /**************************************************************************** * Private Functions ****************************************************************************/ diff --git a/nuttx/arch/arm/src/lpc43xx/lpc43_cgu.h b/nuttx/arch/arm/src/lpc43xx/lpc43_cgu.h index a25db8c52..94254c648 100644 --- a/nuttx/arch/arm/src/lpc43xx/lpc43_cgu.h +++ b/nuttx/arch/arm/src/lpc43xx/lpc43_cgu.h @@ -1,5 +1,5 @@ /************************************************************************************ - * arch/arm/src/lpc43xx/lpc43_clockconfig.h + * arch/arm/src/lpc43xx/lpc43_cgu.h * * Copyright (C) 2012 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -33,8 +33,8 @@ * ************************************************************************************/ -#ifndef __ARCH_ARM_SRC_LPC43XX_CLOCKCONFIG_H -#define __ARCH_ARM_SRC_LPC43XX_CLOCKCONFIG_H +#ifndef __ARCH_ARM_SRC_LPC43XX_CGU_H +#define __ARCH_ARM_SRC_LPC43XX_CGU_H /************************************************************************************ * Included Files @@ -88,4 +88,4 @@ EXTERN void lpc43_clockconfig(void); #endif #endif /* __ASSEMBLY__ */ -#endif /* __ARCH_ARM_SRC_LPC43XX_CLOCKCONFIG_H */ +#endif /* __ARCH_ARM_SRC_LPC43XX_CGU_H */ diff --git a/nuttx/arch/arm/src/lpc43xx/lpc43_lowputc.c b/nuttx/arch/arm/src/lpc43xx/lpc43_lowputc.c deleted file mode 100644 index e865be11d..000000000 --- a/nuttx/arch/arm/src/lpc43xx/lpc43_lowputc.c +++ /dev/null @@ -1,422 +0,0 @@ -/************************************************************************** - * arch/arm/src/lpc43xx/lpc43_lowputc.c - * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - **************************************************************************/ - -/************************************************************************** - * Included Files - **************************************************************************/ - -#include - -#include - -#include -#include - -#include "up_internal.h" -#include "up_arch.h" - -#include "chip.h" -#include "lpc43_config.h" -#include "lpc43_pinconfig.h" -#include "chip/lpc43_uart.h" - -#include "lpc43_lowputc.h" - -/************************************************************************** - * Private Definitions - **************************************************************************/ - -/* Select UART parameters for the selected console */ - -#if defined(CONFIG_USART0_SERIAL_CONSOLE) -# define CONSOLE_BASE LPC43_USART0_BASE -# define CONSOLE_BAUD CONFIG_USART0_BAUD -# define CONSOLE_BITS CONFIG_USART0_BITS -# define CONSOLE_PARITY CONFIG_USART0_PARITY -# define CONSOLE_2STOP CONFIG_USART0_2STOP -#elif defined(CONFIG_UART1_SERIAL_CONSOLE) -# define CONSOLE_BASE LPC43_UART1_BASE -# define CONSOLE_BAUD CONFIG_UART1_BAUD -# define CONSOLE_BITS CONFIG_UART1_BITS -# define CONSOLE_PARITY CONFIG_UART1_PARITY -# define CONSOLE_2STOP CONFIG_UART1_2STOP -#elif defined(CONFIG_USART2_SERIAL_CONSOLE) -# define CONSOLE_BASE LPC43_USART2_BASE -# define CONSOLE_BAUD CONFIG_USART2_BAUD -# define CONSOLE_BITS CONFIG_USART2_BITS -# define CONSOLE_PARITY CONFIG_USART2_PARITY -# define CONSOLE_2STOP CONFIG_USART2_2STOP -#elif defined(CONFIG_USART3_SERIAL_CONSOLE) -# define CONSOLE_BASE LPC43_USART3_BASE -# define CONSOLE_BAUD CONFIG_USART3_BAUD -# define CONSOLE_BITS CONFIG_USART3_BITS -# define CONSOLE_PARITY CONFIG_USART3_PARITY -# define CONSOLE_2STOP CONFIG_USART3_2STOP -#elif defined(HAVE_CONSOLE) -# error "No CONFIG_UARTn_SERIAL_CONSOLE Setting" -#endif - -/* Get word length setting for the console */ - -#if CONSOLE_BITS == 5 -# define CONSOLE_LCR_WLS UART_LCR_WLS_5BIT -#elif CONSOLE_BITS == 6 -# define CONSOLE_LCR_WLS UART_LCR_WLS_6BIT -#elif CONSOLE_BITS == 7 -# define CONSOLE_LCR_WLS UART_LCR_WLS_7BIT -#elif CONSOLE_BITS == 8 -# define CONSOLE_LCR_WLS UART_LCR_WLS_8BIT -#elif defined(HAVE_CONSOLE) -# error "Invalid CONFIG_UARTn_BITS setting for console " -#endif - -/* Get parity setting for the console */ - -#if CONSOLE_PARITY == 0 -# define CONSOLE_LCR_PAR 0 -#elif CONSOLE_PARITY == 1 -# define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_ODD) -#elif CONSOLE_PARITY == 2 -# define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_EVEN) -#elif CONSOLE_PARITY == 3 -# define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_STICK1) -#elif CONSOLE_PARITY == 4 -# define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_STICK0) -#elif defined(HAVE_CONSOLE) -# error "Invalid CONFIG_UARTn_PARITY setting for CONSOLE" -#endif - -/* Get stop-bit setting for the console and USART0/2/3, UART1 */ - -#if CONSOLE_2STOP != 0 -# define CONSOLE_LCR_STOP UART_LCR_STOP -#else -# define CONSOLE_LCR_STOP 0 -#endif - -/* LCR and FCR values for the console */ - -#define CONSOLE_LCR_VALUE (CONSOLE_LCR_WLS | CONSOLE_LCR_PAR | CONSOLE_LCR_STOP) -#define CONSOLE_FCR_VALUE (UART_FCR_RXTRIGGER_8 | UART_FCR_TXRST |\ - UART_FCR_RXRST | UART_FCR_FIFOEN) - -/* We cannot allow the DLM/DLL divisor to become to small or will will lose too - * much accuracy. This following is a "fudge factor" that represents the minimum - * value of the divisor that we will permit. - */ - -#define UART_MINDL 32 - -/* Select a CCLK divider to produce the UART PCLK. The strategy is to select the - * smallest divisor that results in an solution within range of the 16-bit - * DLM and DLL divisor: - * - * BAUD = PCLK / (16 * DL), or - * DL = PCLK / BAUD / 16 - * - * Where: - * - * PCLK = CCLK / divisor - * - * Ignoring the fractional divider for now. - * - * Check divisor == 1. This works if the upper limit is met - * - * DL < 0xffff, or - * PCLK / BAUD / 16 < 0xffff, or - * CCLK / BAUD / 16 < 0xffff, or - * CCLK < BAUD * 0xffff * 16 - * BAUD > CCLK / 0xffff / 16 - * - * And the lower limit is met (we can't allow DL to get very close to one). - * - * DL >= MinDL - * CCLK / BAUD / 16 >= MinDL, or - * BAUD <= CCLK / 16 / MinDL - */ - -#if CONSOLE_BAUD < (LPC43_CCLK / 16 / UART_MINDL) -# define CONSOLE_CCLKDIV SYSCON_PCLKSEL_CCLK -# define CONSOLE_NUMERATOR (LPC43_CCLK) - -/* Check divisor == 2. This works if: - * - * 2 * CCLK / BAUD / 16 < 0xffff, or - * BAUD > CCLK / 0xffff / 8 - * - * And - * - * 2 * CCLK / BAUD / 16 >= MinDL, or - * BAUD <= CCLK / 8 / MinDL - */ - -#elif CONSOLE_BAUD < (LPC43_CCLK / 8 / UART_MINDL) -# define CONSOLE_CCLKDIV SYSCON_PCLKSEL_CCLK2 -# define CONSOLE_NUMERATOR (LPC43_CCLK / 2) - -/* Check divisor == 4. This works if: - * - * 4 * CCLK / BAUD / 16 < 0xffff, or - * BAUD > CCLK / 0xffff / 4 - * - * And - * - * 4 * CCLK / BAUD / 16 >= MinDL, or - * BAUD <= CCLK / 4 / MinDL - */ - -#elif CONSOLE_BAUD < (LPC43_CCLK / 4 / UART_MINDL) -# define CONSOLE_CCLKDIV SYSCON_PCLKSEL_CCLK4 -# define CONSOLE_NUMERATOR (LPC43_CCLK / 4) - -/* Check divisor == 8. This works if: - * - * 8 * CCLK / BAUD / 16 < 0xffff, or - * BAUD > CCLK / 0xffff / 2 - * - * And - * - * 8 * CCLK / BAUD / 16 >= MinDL, or - * BAUD <= CCLK / 2 / MinDL - */ - -#else /* if CONSOLE_BAUD < (LPC43_CCLK / 2 / UART_MINDL) */ -# define CONSOLE_CCLKDIV SYSCON_PCLKSEL_CCLK8 -# define CONSOLE_NUMERATOR (LPC43_CCLK / 8) -#endif - -/* Then this is the value to use for the DLM and DLL registers */ - -#define CONSOLE_DL (CONSOLE_NUMERATOR / (CONSOLE_BAUD << 4)) - -/************************************************************************** - * Private Types - **************************************************************************/ - -/************************************************************************** - * Private Function Prototypes - **************************************************************************/ - -/************************************************************************** - * Global Variables - **************************************************************************/ - -/************************************************************************** - * Private Variables - **************************************************************************/ - -/************************************************************************** - * Private Functions - **************************************************************************/ - -/************************************************************************** - * Public Functions - **************************************************************************/ - -/************************************************************************** - * Name: up_lowputc - * - * Description: - * Output one byte on the serial console - * - **************************************************************************/ - -void up_lowputc(char ch) -{ -#if defined HAVE_UART && defined HAVE_CONSOLE - /* Wait for the transmitter to be available */ - - while ((getreg32(CONSOLE_BASE+LPC43_UART_LSR_OFFSET) & UART_LSR_THRE) == 0); - - /* Send the character */ - - putreg32((uint32_t)ch, CONSOLE_BASE+LPC43_UART_THR_OFFSET); -#endif -} - -/************************************************************************** - * Name: lpc43_lowsetup - * - * Description: - * This performs basic initialization of the UART used for the serial - * console. Its purpose is to get the console output availabe as soon - * as possible. - * - * The USART0/2/3 and UART1 peripherals are configured using the following registers: - * 1. Power: In the PCONP register, set bits PCUSART0/1/2/3. - * On reset, USART0 and UART 1 are enabled (PCUSART0 = 1 and PCUART1 = 1) - * and USART2/3 are disabled (PCUART1 = 0 and PCUSART3 = 0). - * 2. Peripheral clock: In the PCLKSEL0 register, select PCLK_USART0 and - * PCLK_UART1; in the PCLKSEL1 register, select PCLK_USART2 and PCLK_USART3. - * 3. Baud rate: In the LCR register, set bit DLAB = 1. This enables access - * to registers DLL and DLM for setting the baud rate. Also, if needed, - * set the fractional baud rate in the fractional divider - * 4. UART FIFO: Use bit FIFO enable (bit 0) in FCR register to - * enable FIFO. - * 5. Pins: Select UART pins through the PINSEL registers and pin modes - * through the PINMODE registers. UART receive pins should not have - * pull-down resistors enabled. - * 6. Interrupts: To enable UART interrupts set bit DLAB = 0 in the LCRF - * register. This enables access to IER. Interrupts are enabled - * in the NVIC using the appropriate Interrupt Set Enable register. - * 7. DMA: UART transmit and receive functions can operate with the - * GPDMA controller. - * - **************************************************************************/ - -void lpc43_lowsetup(void) -{ -#ifdef HAVE_UART - uint32_t regval; - - /* Step 1: Enable power for all console UART and disable power for - * other UARTs - * - * USART0/2/3 clocking and power control: - * - * ----------------------------------- -------------- -------------- - * BASE CLOCK BRANCH CLOCK - * ----------------------------------- -------------- -------------- - * USART0 clock to register interface BASE_M4_CLK CLK_M4_USART0 - * USART0 peripheral clock (PCLK) BASE_UART0_CLK CLK_APB0_UART0 - * UART1 clock to register interface BASE_M4_CLK CLK_M4_UART1 - * UART1 peripheral clock (PCLK) BASE_UART1_CLK CLK_APB0_UART1 - * USART2 clock to register interface BASE_M4_CLK CLK_M4_USART2 - * USART2 peripheral clock (PCLK) BASE_UART2_CLK CLK_APB2_UART2 - * USART3 clock to register interface BASE_M4_CLK CLK_M4_USART3 - * USART3 peripheral clock (PCLK) BASE_UART3_CLK CLK_APB2_UART3 - * ----------------------------------- -------------- -------------- - */ - -#warning "Missing logic" -#if 0 - regval = getreg32(LPC43_SYSCON_PCONP); - regval &= ~(SYSCON_PCONP_PCUSART0|SYSCON_PCONP_PCUART1| - SYSCON_PCONP_PCUSART2|SYSCON_PCONP_PCUSART3); -#if defined(CONFIG_USART0_SERIAL_CONSOLE) - regval |= SYSCON_PCONP_PCUSART0; -#elif defined(CONFIG_UART1_SERIAL_CONSOLE) - regval |= SYSCON_PCONP_PCUART1; -#elif defined(CONFIG_USART2_SERIAL_CONSOLE) - regval |= SYSCON_PCONP_PCUSART2; -#elif defined(CONFIG_USART3_SERIAL_CONSOLE) - regval |= SYSCON_PCONP_PCUSART3; -#endif - putreg32(regval, LPC43_SYSCON_PCONP); - -/* Step 2: Enable peripheral clocking for the console UART and disable - * clocking for all other UARTs - */ - - regval = getreg32(LPC43_SYSCON_PCLKSEL0); - regval &= ~(SYSCON_PCLKSEL0_USART0_MASK|SYSCON_PCLKSEL0_UART1_MASK); -#if defined(CONFIG_USART0_SERIAL_CONSOLE) - regval |= (CONSOLE_CCLKDIV << SYSCON_PCLKSEL0_USART0_SHIFT); -#elif defined(CONFIG_UART1_SERIAL_CONSOLE) - regval |= (CONSOLE_CCLKDIV << SYSCON_PCLKSEL0_UART1_SHIFT); -#endif - putreg32(regval, LPC43_SYSCON_PCLKSEL0); - - regval = getreg32(LPC43_SYSCON_PCLKSEL1); - regval &= ~(SYSCON_PCLKSEL1_USART2_MASK|SYSCON_PCLKSEL1_USART3_MASK); -#if defined(CONFIG_USART2_SERIAL_CONSOLE) - regval |= (CONSOLE_CCLKDIV << SYSCON_PCLKSEL1_USART2_SHIFT); -#elif defined(CONFIG_USART3_SERIAL_CONSOLE) - regval |= (CONSOLE_CCLKDIV << SYSCON_PCLKSEL1_USART3_SHIFT); -#endif - putreg32(regval, LPC43_SYSCON_PCLKSEL1); -#endif - - /* Configure UART pins for the selected CONSOLE. Definitions are - * required in the board.h header file in order to map pins to the - * correct pin and GPIO configuration. - */ - -#if defined(CONFIG_USART0_SERIAL_CONSOLE) - lpc43_pin_config(PINCONF_U0_TXD); - lpc43_pin_config(PINCONF_U0_RXD); -#elif defined(CONFIG_UART1_SERIAL_CONSOLE) - lpc43_pin_config(PINCONF_U1_TXD); - lpc43_pin_config(PINCONF_U1_RXD); -#ifdef CONFIG_UART1_FLOWCONTROL - lpc43_pin_config(PINCONF_U1_CTS); - lpc43_pin_config(PINCONF_U1_DCD); - lpc43_pin_config(PINCONF_U1_DSR); - lpc43_pin_config(PINCONF_U1_DTR); - lpc43_pin_config(PINCONF_U1_RI); - lpc43_pin_config(PINCONF_U1_RTS); -#endif -#elif defined(CONFIG_USART2_SERIAL_CONSOLE) - lpc43_pin_config(PINCONF_U2_TXD); - lpc43_pin_config(PINCONF_U2_RXD); -#elif defined(CONFIG_USART3_SERIAL_CONSOLE) - lpc43_pin_config(PINCONF_U3_TXD); - lpc43_pin_config(PINCONF_U3_RXD); -#endif - - /* Configure the console (only) */ - -#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG) - - /* Clear fifos */ - - putreg32(UART_FCR_RXRST|UART_FCR_TXRST, CONSOLE_BASE+LPC43_UART_FCR_OFFSET); - - /* Set trigger */ - - putreg32(UART_FCR_FIFOEN|UART_FCR_RXTRIGGER_8, CONSOLE_BASE+LPC43_UART_FCR_OFFSET); - - /* Set up the LCR and set DLAB=1 */ - - putreg32(CONSOLE_LCR_VALUE|UART_LCR_DLAB, CONSOLE_BASE+LPC43_UART_LCR_OFFSET); - - /* Set the BAUD divisor */ - - putreg32(CONSOLE_DL >> 8, CONSOLE_BASE+LPC43_UART_DLM_OFFSET); - putreg32(CONSOLE_DL & 0xff, CONSOLE_BASE+LPC43_UART_DLL_OFFSET); - - /* Clear DLAB */ - - putreg32(CONSOLE_LCR_VALUE, CONSOLE_BASE+LPC43_UART_LCR_OFFSET); - - /* Configure the FIFOs */ - - putreg32(UART_FCR_RXTRIGGER_8|UART_FCR_TXRST|UART_FCR_RXRST|UART_FCR_FIFOEN, - CONSOLE_BASE+LPC43_UART_FCR_OFFSET); -#endif -#endif /* HAVE_UART */ -} - - diff --git a/nuttx/arch/arm/src/lpc43xx/lpc43_lowputc.h b/nuttx/arch/arm/src/lpc43xx/lpc43_lowputc.h deleted file mode 100644 index d74d5a8bd..000000000 --- a/nuttx/arch/arm/src/lpc43xx/lpc43_lowputc.h +++ /dev/null @@ -1,88 +0,0 @@ -/**************************************************************************** - * arch/arm/src/lpc43xx/lpc43_lowputc.h - * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_SRC_LPC43XX_LPC43_LOWSETUP_H -#define __ARCH_ARM_SRC_LPC43XX_LPC43_LOWSETUP_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -#ifndef __ASSEMBLY__ - -#undef EXTERN -#if defined(__cplusplus) -#define EXTERN extern "C" -extern "C" { -#else -#define EXTERN extern -#endif - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: lpc43_lowsetup - * - * Description: - * Called at the very beginning of _start. Performs low level - * initialization of the serial console. - * - ****************************************************************************/ - -EXTERN void lpc43_lowsetup(void); - -#undef EXTERN -#if defined(__cplusplus) -} -#endif - -#endif /* __ASSEMBLY__ */ -#endif /* __ARCH_ARM_SRC_LPC43XX_LPC43_LOWSETUP_H */ diff --git a/nuttx/arch/arm/src/lpc43xx/lpc43_rgu.c b/nuttx/arch/arm/src/lpc43xx/lpc43_rgu.c index daa746483..544afe187 100644 --- a/nuttx/arch/arm/src/lpc43xx/lpc43_rgu.c +++ b/nuttx/arch/arm/src/lpc43xx/lpc43_rgu.c @@ -1,6 +1,6 @@ /**************************************************************************** - * arch/arm/src/lpc43/lpc43_clrpend.c - * arch/arm/src/chip/lpc43_clrpend.c + * arch/arm/src/lpc43/lpc43_rgu.c + * arch/arm/src/chip/lpc43_rgu.c * * Copyright (C) 2012 Gregory Nutt. All rights reserved. * Author: Gregory Nutt diff --git a/nuttx/arch/arm/src/lpc43xx/lpc43_serial.c b/nuttx/arch/arm/src/lpc43xx/lpc43_serial.c index 4aed36110..76439b38d 100644 --- a/nuttx/arch/arm/src/lpc43xx/lpc43_serial.c +++ b/nuttx/arch/arm/src/lpc43xx/lpc43_serial.c @@ -87,12 +87,13 @@ struct up_dev_s { uint32_t uartbase; /* Base address of UART registers */ + uint8_t basefreq; /* Base frequency of input clock */ uint32_t baud; /* Configured baud */ uint32_t ier; /* Saved IER value */ + uint8_t id; /* ID=0,1,2,3 */ uint8_t irq; /* IRQ associated with this UART */ uint8_t parity; /* 0=none, 1=odd, 2=even */ uint8_t bits; /* Number of bits (7 or 8) */ - uint8_t cclkdiv; /* Divisor needed to get PCLK from CCLK */ bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */ }; @@ -159,7 +160,9 @@ static char g_uart3txbuffer[CONFIG_USART3_TXBUFSIZE]; static struct up_dev_s g_uart0priv = { .uartbase = LPC43_USART0_BASE, + .basefreq = BOARD_USART0_BASEFREQ, .baud = CONFIG_USART0_BAUD, + .id = 0, .irq = LPC43M4_IRQ_USART0, .parity = CONFIG_USART0_PARITY, .bits = CONFIG_USART0_BITS, @@ -189,7 +192,9 @@ static uart_dev_t g_uart0port = static struct up_dev_s g_uart1priv = { .uartbase = LPC43_UART1_BASE, + .basefreq = BOARD_UART1_BASEFREQ, .baud = CONFIG_UART1_BAUD, + .id = 1, .irq = LPC43M4_IRQ_UART1, .parity = CONFIG_UART1_PARITY, .bits = CONFIG_UART1_BITS, @@ -219,7 +224,9 @@ static uart_dev_t g_uart1port = static struct up_dev_s g_uart2priv = { .uartbase = LPC43_USART2_BASE, + .basefreq = BOARD_USART2_BASEFREQ, .baud = CONFIG_USART2_BAUD, + .id = 2, .irq = LPC43M4_IRQ_USART2, .parity = CONFIG_USART2_PARITY, .bits = CONFIG_USART2_BITS, @@ -249,7 +256,9 @@ static uart_dev_t g_uart2port = static struct up_dev_s g_uart3priv = { .uartbase = LPC43_USART3_BASE, + .basefreq = BOARD_USART3_BASEFREQ, .baud = CONFIG_USART3_BAUD, + .id = 3, .irq = LPC43M4_IRQ_USART3, .parity = CONFIG_USART3_PARITY, .bits = CONFIG_USART3_BITS, @@ -539,283 +548,23 @@ static inline void up_enablebreaks(struct up_dev_s *priv, bool enable) up_serialout(priv, LPC43_UART_LCR_OFFSET, lcr); } -/************************************************************************************ - * Name: lpc43_uartcclkdiv - * - * Descrption: - * Select a CCLK divider to produce the UART PCLK. The stratey is to select the - * smallest divisor that results in an solution within range of the 16-bit - * DLM and DLL divisor: - * - * PCLK = CCLK / divisor - * BAUD = PCLK / (16 * DL) - * - * Ignoring the fractional divider for now. - * - * NOTE: This is an inline function. If a typical optimization level is used and - * a constant is provided for the desired frequency, then most of the following - * logic will be optimized away. - * - ************************************************************************************/ - -static inline uint32_t lpc43_uartcclkdiv(uint32_t baud) -{ - /* Ignoring the fractional divider, the BAUD is given by: - * - * BAUD = PCLK / (16 * DL), or - * DL = PCLK / BAUD / 16 - * - * Where: - * - * PCLK = CCLK / divisor. - * - * Check divisor == 1. This works if the upper limit is met - * - * DL < 0xffff, or - * PCLK / BAUD / 16 < 0xffff, or - * CCLK / BAUD / 16 < 0xffff, or - * CCLK < BAUD * 0xffff * 16 - * BAUD > CCLK / 0xffff / 16 - * - * And the lower limit is met (we can't allow DL to get very close to one). - * - * DL >= MinDL - * CCLK / BAUD / 16 >= MinDL, or - * BAUD <= CCLK / 16 / MinDL - */ - - if (baud < (LPC43_CCLK / 16 / UART_MINDL )) - { - return SYSCON_PCLKSEL_CCLK; - } - - /* Check divisor == 2. This works if: - * - * 2 * CCLK / BAUD / 16 < 0xffff, or - * BAUD > CCLK / 0xffff / 8 - * - * And - * - * 2 * CCLK / BAUD / 16 >= MinDL, or - * BAUD <= CCLK / 8 / MinDL - */ - - else if (baud < (LPC43_CCLK / 8 / UART_MINDL )) - { - return SYSCON_PCLKSEL_CCLK2; - } - - /* Check divisor == 4. This works if: - * - * 4 * CCLK / BAUD / 16 < 0xffff, or - * BAUD > CCLK / 0xffff / 4 - * - * And - * - * 4 * CCLK / BAUD / 16 >= MinDL, or - * BAUD <= CCLK / 4 / MinDL - */ - - else if (baud < (LPC43_CCLK / 4 / UART_MINDL )) - { - return SYSCON_PCLKSEL_CCLK4; - } - - /* Check divisor == 8. This works if: - * - * 8 * CCLK / BAUD / 16 < 0xffff, or - * BAUD > CCLK / 0xffff / 2 - * - * And - * - * 8 * CCLK / BAUD / 16 >= MinDL, or - * BAUD <= CCLK / 2 / MinDL - */ - - else /* if (baud < (LPC43_CCLK / 2 / UART_MINDL )) */ - { - return SYSCON_PCLKSEL_CCLK8; - } -} - -/************************************************************************************ - * Name: lpc43_uart0config, uart1config, uart2config, and uart3config - * - * Descrption: - * Configure the UART. USART0/2/3 and UART1 peripherals are configured using the following - * registers: - * - * 1. Power: In the PCONP register, set bits PCUSART0/1/2/3. - * On reset, USART0 and UART 1 are enabled (PCUSART0 = 1 and PCUART1 = 1) - * and USART2/3 are disabled (PCUART1 = 0 and PCUSART3 = 0). - * 2. Peripheral clock: In the PCLKSEL0 register, select PCLK_USART0 and - * PCLK_UART1; in the PCLKSEL1 register, select PCLK_USART2 and PCLK_USART3. - * 3. Pins: Select UART pins through the PINSEL registers and pin modes - * through the PINMODE registers. UART receive pins should not have - * pull-down resistors enabled. - * - ************************************************************************************/ - -#ifdef CONFIG_LPC43_USART0 -static inline void lpc43_uart0config(uint32_t clkdiv) -{ - uint32_t regval; - irqstate_t flags; - - /* Step 1: Enable power on USART0 */ - - flags = irqsave(); - regval = getreg32(LPC43_SYSCON_PCONP); - regval |= SYSCON_PCONP_PCUSART0; - putreg32(regval, LPC43_SYSCON_PCONP); - - /* Step 2: Enable clocking on UART */ - - regval = getreg32(LPC43_SYSCON_PCLKSEL0); - regval &= ~SYSCON_PCLKSEL0_USART0_MASK; - regval |= (clkdiv << SYSCON_PCLKSEL0_USART0_SHIFT); - putreg32(regval, LPC43_SYSCON_PCLKSEL0); - - /* Step 3: Configure I/O pins */ - - lpc43_configgpio(GPIO_USART0_TXD); - lpc43_configgpio(GPIO_USART0_RXD); - irqrestore(flags); -}; -#endif - -#ifdef CONFIG_LPC43_UART1 -static inline void lpc43_uart1config(uint32_t clkdiv) -{ - uint32_t regval; - irqstate_t flags; - - /* Step 1: Enable power on UART1 */ - - flags = irqsave(); - regval = getreg32(LPC43_SYSCON_PCONP); - regval |= SYSCON_PCONP_PCUART1; - putreg32(regval, LPC43_SYSCON_PCONP); - - /* Step 2: Enable clocking on UART */ - - regval = getreg32(LPC43_SYSCON_PCLKSEL0); - regval &= ~SYSCON_PCLKSEL0_UART1_MASK; - regval |= (clkdiv << SYSCON_PCLKSEL0_UART1_SHIFT); - putreg32(regval, LPC43_SYSCON_PCLKSEL0); - - /* Step 3: Configure I/O pins */ - - lpc43_configgpio(GPIO_UART1_TXD); - lpc43_configgpio(GPIO_UART1_RXD); -#ifdef CONFIG_UART1_FLOWCONTROL - lpc43_configgpio(GPIO_UART1_CTS); - lpc43_configgpio(GPIO_UART1_RTS); - lpc43_configgpio(GPIO_UART1_DCD); - lpc43_configgpio(GPIO_UART1_DSR); - lpc43_configgpio(GPIO_UART1_DTR); -#ifdef CONFIG_UART1_RINGINDICATOR - lpc43_configgpio(GPIO_UART1_RI); -#endif -#endif - irqrestore(flags); -}; -#endif - -#ifdef CONFIG_LPC43_USART2 -static inline void lpc43_uart2config(uint32_t clkdiv) -{ - uint32_t regval; - irqstate_t flags; - - /* Step 1: Enable power on USART2 */ - - flags = irqsave(); - regval = getreg32(LPC43_SYSCON_PCONP); - regval |= SYSCON_PCONP_PCUSART2; - putreg32(regval, LPC43_SYSCON_PCONP); - - /* Step 2: Enable clocking on UART */ - - regval = getreg32(LPC43_SYSCON_PCLKSEL1); - regval &= ~SYSCON_PCLKSEL1_USART2_MASK; - regval |= (clkdiv << SYSCON_PCLKSEL1_USART2_SHIFT); - putreg32(regval, LPC43_SYSCON_PCLKSEL1); - - /* Step 3: Configure I/O pins */ - - lpc43_configgpio(GPIO_USART2_TXD); - lpc43_configgpio(GPIO_USART2_RXD); - irqrestore(flags); -}; -#endif - -#ifdef CONFIG_LPC43_USART3 -static inline void lpc43_uart3config(uint32_t clkdiv) -{ - uint32_t regval; - irqstate_t flags; - - /* Step 1: Enable power on USART3 */ - - flags = irqsave(); - regval = getreg32(LPC43_SYSCON_PCONP); - regval |= SYSCON_PCONP_PCUSART3; - putreg32(regval, LPC43_SYSCON_PCONP); - - /* Step 2: Enable clocking on UART */ - - regval = getreg32(LPC43_SYSCON_PCLKSEL1); - regval &= ~SYSCON_PCLKSEL1_USART3_MASK; - regval |= (clkdiv << SYSCON_PCLKSEL1_USART3_SHIFT); - putreg32(regval, LPC43_SYSCON_PCLKSEL1); - - /* Step 3: Configure I/O pins */ - - lpc43_configgpio(GPIO_USART3_TXD); - lpc43_configgpio(GPIO_USART3_RXD); - irqrestore(flags); -}; -#endif - /************************************************************************************ * Name: lpc43_uartdl * * Descrption: - * Select a divider to produce the BAUD from the UART PCLK. + * Select a divider to produce the BAUD from the UART BASEFREQ. * - * BAUD = PCLK / (16 * DL), or - * DL = PCLK / BAUD / 16 + * BAUD = BASEFREQ / (16 * DL), or + * DL = BASEFREQ / BAUD / 16 * * Ignoring the fractional divider for now. * ************************************************************************************/ -static inline uint32_t lpc43_uartdl(uint32_t baud, uint8_t divcode) +static inline uint32_t lpc43_uartdl(uint32_t baud) { - uint32_t num; - - switch (divcode) - { - - case SYSCON_PCLKSEL_CCLK4: /* PCLK_peripheral = CCLK/4 */ - num = (LPC43_CCLK / 4); - break; - - case SYSCON_PCLKSEL_CCLK: /* PCLK_peripheral = CCLK */ - num = LPC43_CCLK; - break; - - case SYSCON_PCLKSEL_CCLK2: /* PCLK_peripheral = CCLK/2 */ - num = (LPC43_CCLK / 2); - break; - - case SYSCON_PCLKSEL_CCLK8: /* PCLK_peripheral = CCLK/8 (except CAN1, CAN2, and CAN) */ - default: - num = (LPC43_CCLK / 8); - break; - } - return num / (baud << 4); +#warning "Missing logic" + return 0; } /**************************************************************************** @@ -883,7 +632,7 @@ static int up_setup(struct uart_dev_s *dev) /* Set the BAUD divisor */ - dl = lpc43_uartdl(priv->baud, priv->cclkdiv); + dl = lpc43_uartdl(priv->baud); up_serialout(priv, LPC43_UART_DLM_OFFSET, dl >> 8); up_serialout(priv, LPC43_UART_DLL_OFFSET, dl & 0xff); @@ -920,7 +669,42 @@ static int up_setup(struct uart_dev_s *dev) static void up_shutdown(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; + + /* Disable further interrupts from the U[S]ART */ + up_disableuartint(priv, NULL); + + /* Put the U[S]ART hardware back its reset state */ + + switch (priv->id) + { + #ifdef CONFIG_LPC43_USART0 + case 0: + lpc43_usart0_reset(); + break; + #endif + + #ifdef CONFIG_LPC43_UART1 + case 1: + lpc43_uart1_reset(); + break; + #endif + + #ifdef CONFIG_LPC43_USART2 + case 2: + lpc43_usart2_reset(); + break; + #endif + + #ifdef CONFIG_LPC43_USART3 + case 3: + lpc43_usart3_reset(); + break; + #endif + + default: + break; + } } /**************************************************************************** @@ -1321,33 +1105,29 @@ void up_earlyserialinit(void) /* Configure all UARTs (except the CONSOLE UART) and disable interrupts */ #ifdef CONFIG_LPC43_USART0 - g_uart0priv.cclkdiv = lpc43_uartcclkdiv(CONFIG_USART0_BAUD); #ifndef CONFIG_USART0_SERIAL_CONSOLE - lpc43_uart0config(g_uart0priv.cclkdiv); + lpc43_usart0_setup(); #endif up_disableuartint(&g_uart0priv, NULL); #endif #ifdef CONFIG_LPC43_UART1 - g_uart1priv.cclkdiv = lpc43_uartcclkdiv(CONFIG_UART1_BAUD); #ifndef CONFIG_UART1_SERIAL_CONSOLE - lpc43_uart1config(g_uart1priv.cclkdiv); + lpc43_uart1_setup(); #endif up_disableuartint(&g_uart1priv, NULL); #endif #ifdef CONFIG_LPC43_USART2 - g_uart2priv.cclkdiv = lpc43_uartcclkdiv(CONFIG_USART2_BAUD); #ifndef CONFIG_USART2_SERIAL_CONSOLE - lpc43_uart2config(g_uart2priv.cclkdiv); + lpc43_usart2_setup(); #endif up_disableuartint(&g_uart2priv, NULL); #endif #ifdef CONFIG_LPC43_USART3 - g_uart3priv.cclkdiv = lpc43_uartcclkdiv(CONFIG_USART3_BAUD); #ifndef CONFIG_USART3_SERIAL_CONSOLE - lpc43_uart3config(g_uart3priv.cclkdiv); + lpc43_usart3_setup(); #endif up_disableuartint(&g_uart3priv, NULL); #endif diff --git a/nuttx/arch/arm/src/lpc43xx/lpc43_serial.h b/nuttx/arch/arm/src/lpc43xx/lpc43_serial.h index 78c321407..f29a99023 100644 --- a/nuttx/arch/arm/src/lpc43xx/lpc43_serial.h +++ b/nuttx/arch/arm/src/lpc43xx/lpc43_serial.h @@ -41,8 +41,7 @@ ****************************************************************************/ #include -#include "chip.h" -#include "chip/lpc43_uart.h" +#include "lpc43_uart.h" /**************************************************************************** * Pre-processor Definitions diff --git a/nuttx/arch/arm/src/lpc43xx/lpc43_start.c b/nuttx/arch/arm/src/lpc43xx/lpc43_start.c index 0b917a8ea..88976e03d 100644 --- a/nuttx/arch/arm/src/lpc43xx/lpc43_start.c +++ b/nuttx/arch/arm/src/lpc43xx/lpc43_start.c @@ -73,7 +73,7 @@ #include "lpc43_rgu.h" #include "lpc43_cgu.h" #include "lpc43_emc.h" -#include "lpc43_lowputc.h" +#include "lpc43_uart.h" /**************************************************************************** * Preprocessor Definitions diff --git a/nuttx/arch/arm/src/lpc43xx/lpc43_uart.c b/nuttx/arch/arm/src/lpc43xx/lpc43_uart.c new file mode 100644 index 000000000..6643b6750 --- /dev/null +++ b/nuttx/arch/arm/src/lpc43xx/lpc43_uart.c @@ -0,0 +1,531 @@ +/************************************************************************** + * arch/arm/src/lpc43xx/lpc43_uart.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************/ + +/************************************************************************** + * Included Files + **************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_internal.h" +#include "up_arch.h" + +#include "chip.h" +#include "lpc43_config.h" +#include "lpc43_pinconfig.h" +#include "lpc43_rgu.h" +#include "lpc43_cgu.h" + +#include "lpc43_uart.h" + +/************************************************************************** + * Private Definitions + **************************************************************************/ + +/* Select UART parameters for the selected console */ + +#if defined(CONFIG_USART0_SERIAL_CONSOLE) +# define CONSOLE_BASE LPC43_USART0_BASE +# define CONSOLE_BASEFREQ BOARD_USART0_BASEFREQ +# define CONSOLE_BAUD CONFIG_USART0_BAUD +# define CONSOLE_BITS CONFIG_USART0_BITS +# define CONSOLE_PARITY CONFIG_USART0_PARITY +# define CONSOLE_2STOP CONFIG_USART0_2STOP +#elif defined(CONFIG_UART1_SERIAL_CONSOLE) +# define CONSOLE_BASE LPC43_UART1_BASE +# define CONSOLE_BASEFREQ BOARD_USART0_BASEFREQ +# define CONSOLE_BAUD CONFIG_UART1_BAUD +# define CONSOLE_BITS CONFIG_UART1_BITS +# define CONSOLE_PARITY CONFIG_UART1_PARITY +# define CONSOLE_2STOP CONFIG_UART1_2STOP +#elif defined(CONFIG_USART2_SERIAL_CONSOLE) +# define CONSOLE_BASE LPC43_USART2_BASE +# define CONSOLE_BASEFREQ BOARD_USART0_BASEFREQ +# define CONSOLE_BAUD CONFIG_USART2_BAUD +# define CONSOLE_BITS CONFIG_USART2_BITS +# define CONSOLE_PARITY CONFIG_USART2_PARITY +# define CONSOLE_2STOP CONFIG_USART2_2STOP +#elif defined(CONFIG_USART3_SERIAL_CONSOLE) +# define CONSOLE_BASE LPC43_USART3_BASE +# define CONSOLE_BASEFREQ BOARD_USART0_BASEFREQ +# define CONSOLE_BAUD CONFIG_USART3_BAUD +# define CONSOLE_BITS CONFIG_USART3_BITS +# define CONSOLE_PARITY CONFIG_USART3_PARITY +# define CONSOLE_2STOP CONFIG_USART3_2STOP +#elif defined(HAVE_CONSOLE) +# error "No CONFIG_UARTn_SERIAL_CONSOLE Setting" +#endif + +/* Get word length setting for the console */ + +#if CONSOLE_BITS == 5 +# define CONSOLE_LCR_WLS UART_LCR_WLS_5BIT +#elif CONSOLE_BITS == 6 +# define CONSOLE_LCR_WLS UART_LCR_WLS_6BIT +#elif CONSOLE_BITS == 7 +# define CONSOLE_LCR_WLS UART_LCR_WLS_7BIT +#elif CONSOLE_BITS == 8 +# define CONSOLE_LCR_WLS UART_LCR_WLS_8BIT +#elif defined(HAVE_CONSOLE) +# error "Invalid CONFIG_UARTn_BITS setting for console " +#endif + +/* Get parity setting for the console */ + +#if CONSOLE_PARITY == 0 +# define CONSOLE_LCR_PAR 0 +#elif CONSOLE_PARITY == 1 +# define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_ODD) +#elif CONSOLE_PARITY == 2 +# define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_EVEN) +#elif CONSOLE_PARITY == 3 +# define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_STICK1) +#elif CONSOLE_PARITY == 4 +# define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_STICK0) +#elif defined(HAVE_CONSOLE) +# error "Invalid CONFIG_UARTn_PARITY setting for CONSOLE" +#endif + +/* Get stop-bit setting for the console and USART0/2/3, UART1 */ + +#if CONSOLE_2STOP != 0 +# define CONSOLE_LCR_STOP UART_LCR_STOP +#else +# define CONSOLE_LCR_STOP 0 +#endif + +/* LCR and FCR values for the console */ + +#define CONSOLE_LCR_VALUE (CONSOLE_LCR_WLS | CONSOLE_LCR_PAR | CONSOLE_LCR_STOP) +#define CONSOLE_FCR_VALUE (UART_FCR_RXTRIGGER_8 | UART_FCR_TXRST |\ + UART_FCR_RXRST | UART_FCR_FIFOEN) + +/* We cannot allow the DLM/DLL divisor to become to small or will will lose too + * much accuracy. This following is a "fudge factor" that represents the minimum + * value of the divisor that we will permit. + */ + +#define UART_MINDL 32 + +/* Select a CCLK divider to produce the UART BASEFREQ. The strategy is to select the + * smallest divisor that results in an solution within range of the 16-bit + * DLM and DLL divisor: + * + * BAUD = BASEFREQ / (16 * DL), or + * DL = BASEFREQ / BAUD / 16 + * + * Where: + * + * BASEFREQ = CCLK / divisor + * + * Ignoring the fractional divider for now. + * + * Check divisor == 1. This works if the upper limit is met + * + * DL < 0xffff, or + * BASEFREQ / BAUD / 16 < 0xffff, or + * CCLK / BAUD / 16 < 0xffff, or + * CCLK < BAUD * 0xffff * 16 + * BAUD > CCLK / 0xffff / 16 + * + * And the lower limit is met (we can't allow DL to get very close to one). + * + * DL >= MinDL + * CCLK / BAUD / 16 >= MinDL, or + * BAUD <= CCLK / 16 / MinDL + */ + +#if CONSOLE_BAUD < (LPC43_CCLK / 16 / UART_MINDL) +# define CONSOLE_CCLKDIV SYSCON_PCLKSEL_CCLK +# define CONSOLE_NUMERATOR (LPC43_CCLK) + +/* Check divisor == 2. This works if: + * + * 2 * CCLK / BAUD / 16 < 0xffff, or + * BAUD > CCLK / 0xffff / 8 + * + * And + * + * 2 * CCLK / BAUD / 16 >= MinDL, or + * BAUD <= CCLK / 8 / MinDL + */ + +#elif CONSOLE_BAUD < (LPC43_CCLK / 8 / UART_MINDL) +# define CONSOLE_CCLKDIV SYSCON_PCLKSEL_CCLK2 +# define CONSOLE_NUMERATOR (LPC43_CCLK / 2) + +/* Check divisor == 4. This works if: + * + * 4 * CCLK / BAUD / 16 < 0xffff, or + * BAUD > CCLK / 0xffff / 4 + * + * And + * + * 4 * CCLK / BAUD / 16 >= MinDL, or + * BAUD <= CCLK / 4 / MinDL + */ + +#elif CONSOLE_BAUD < (LPC43_CCLK / 4 / UART_MINDL) +# define CONSOLE_CCLKDIV SYSCON_PCLKSEL_CCLK4 +# define CONSOLE_NUMERATOR (LPC43_CCLK / 4) + +/* Check divisor == 8. This works if: + * + * 8 * CCLK / BAUD / 16 < 0xffff, or + * BAUD > CCLK / 0xffff / 2 + * + * And + * + * 8 * CCLK / BAUD / 16 >= MinDL, or + * BAUD <= CCLK / 2 / MinDL + */ + +#else /* if CONSOLE_BAUD < (LPC43_CCLK / 2 / UART_MINDL) */ +# define CONSOLE_CCLKDIV SYSCON_PCLKSEL_CCLK8 +# define CONSOLE_NUMERATOR (LPC43_CCLK / 8) +#endif + +/* Then this is the value to use for the DLM and DLL registers */ + +#define CONSOLE_DL (CONSOLE_NUMERATOR / (CONSOLE_BAUD << 4)) + +/************************************************************************** + * Private Types + **************************************************************************/ + +/************************************************************************** + * Private Function Prototypes + **************************************************************************/ + +/************************************************************************** + * Global Variables + **************************************************************************/ + +/************************************************************************** + * Private Variables + **************************************************************************/ + +/************************************************************************** + * Private Functions + **************************************************************************/ + +/************************************************************************** + * Public Functions + **************************************************************************/ + +/************************************************************************** + * Name: up_lowputc + * + * Description: + * Output one byte on the serial console + * + **************************************************************************/ + +void up_lowputc(char ch) +{ +#if defined HAVE_UART && defined HAVE_CONSOLE + /* Wait for the transmitter to be available */ + + while ((getreg32(CONSOLE_BASE+LPC43_UART_LSR_OFFSET) & UART_LSR_THRE) == 0); + + /* Send the character */ + + putreg32((uint32_t)ch, CONSOLE_BASE+LPC43_UART_THR_OFFSET); +#endif +} + +/************************************************************************** + * Name: lpc43_lowsetup + * + * Description: + * This performs basic initialization of the UART used for the serial + * console. Its purpose is to get the console output availabe as soon + * as possible. + * + * The USART0/2/3 and UART1 peripherals are configured using the following registers: + * 1. Power: In the PCONP register, set bits PCUSART0/1/2/3. + * On reset, USART0 and UART 1 are enabled (PCUSART0 = 1 and PCUART1 = 1) + * and USART2/3 are disabled (PCUART1 = 0 and PCUSART3 = 0). + * 2. Peripheral clock: In the PCLKSEL0 register, select PCLK_USART0 and + * PCLK_UART1; in the PCLKSEL1 register, select PCLK_USART2 and PCLK_USART3. + * 3. Baud rate: In the LCR register, set bit DLAB = 1. This enables access + * to registers DLL and DLM for setting the baud rate. Also, if needed, + * set the fractional baud rate in the fractional divider + * 4. UART FIFO: Use bit FIFO enable (bit 0) in FCR register to + * enable FIFO. + * 5. Pins: Select UART pins through the PINSEL registers and pin modes + * through the PINMODE registers. UART receive pins should not have + * pull-down resistors enabled. + * 6. Interrupts: To enable UART interrupts set bit DLAB = 0 in the LCRF + * register. This enables access to IER. Interrupts are enabled + * in the NVIC using the appropriate Interrupt Set Enable register. + * 7. DMA: UART transmit and receive functions can operate with the + * GPDMA controller. + * + **************************************************************************/ + +void lpc43_lowsetup(void) +{ +#ifdef HAVE_UART + /* Enable clocking and for all console UART and disable power for + * other UARTs + */ + +#if defined(CONFIG_USART0_SERIAL_CONSOLE) + lpc43_usart0_setup(); +#elif defined(CONFIG_UART1_SERIAL_CONSOLE) + lpc43_uart1_setup(); +#elif defined(CONFIG_USART2_SERIAL_CONSOLE) + lpc43_usart2_setup(); +#elif defined(CONFIG_USART3_SERIAL_CONSOLE) + lpc43_usart3_setup(); +#endif + + /* Configure the console (only) */ + +#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG) + + /* Clear fifos */ + + putreg32(UART_FCR_RXRST|UART_FCR_TXRST, CONSOLE_BASE+LPC43_UART_FCR_OFFSET); + + /* Set trigger */ + + putreg32(UART_FCR_FIFOEN|UART_FCR_RXTRIGGER_8, CONSOLE_BASE+LPC43_UART_FCR_OFFSET); + + /* Set up the LCR and set DLAB=1 */ + + putreg32(CONSOLE_LCR_VALUE|UART_LCR_DLAB, CONSOLE_BASE+LPC43_UART_LCR_OFFSET); + + /* Set the BAUD divisor */ + + putreg32(CONSOLE_DL >> 8, CONSOLE_BASE+LPC43_UART_DLM_OFFSET); + putreg32(CONSOLE_DL & 0xff, CONSOLE_BASE+LPC43_UART_DLL_OFFSET); + + /* Clear DLAB */ + + putreg32(CONSOLE_LCR_VALUE, CONSOLE_BASE+LPC43_UART_LCR_OFFSET); + + /* Configure the FIFOs */ + + putreg32(UART_FCR_RXTRIGGER_8|UART_FCR_TXRST|UART_FCR_RXRST|UART_FCR_FIFOEN, + CONSOLE_BASE+LPC43_UART_FCR_OFFSET); +#endif +#endif /* HAVE_UART */ +} + +/**************************************************************************** + * Name: lpc43_u[s]art0/1/2/3_reset + * + * Description: + * Reset a UART. These functions are used by the serial driver when a + * UART is closed. + * + ****************************************************************************/ + +#ifdef CONFIG_LPC43_USART0 +void lpc43_usart0_reset(void) +{ + putreg32(RGU_CTRL1_USART0_RST, LPC43_RGU_CTRL1); +} +#endif + +#ifdef CONFIG_LPC43_UART1 +EXTERN void lpc43_uart1_reset(void) +{ + putreg32(RGU_CTRL1_UART1_RST, LPC43_RGU_CTRL1); +} +#endif + +#ifdef CONFIG_LPC43_USART2 +void lpc43_usart2_reset(void) +{ + putreg32(RGU_CTRL1_USART2_RST, LPC43_RGU_CTRL1); +} +#endif + +#ifdef CONFIG_LPC43_USART3 +void lpc43_usart3_reset(void) +{ + putreg32(RGU_CTRL1_USART3_RST, LPC43_RGU_CTRL1); +} +#endif + +/**************************************************************************** + * Name: lpc43_usart0_setup, lpc43_uart1_setup, lpc43_usart2_setup, and + * lpc43_usart3_setup + * + * Description: + * Configure the U[S]ART. This involves: + * + * 1. Connecting the input clock to the U[S]ART as specified in the + * board.h file, + * 2. Configuring the U[S]ART pins + * + * USART0/2/3 and UART1 clocking and power control: + * + * ----------------------------------- -------------- -------------- + * BASE CLOCK BRANCH CLOCK + * ----------------------------------- -------------- -------------- + * USART0 clock to register interface BASE_M4_CLK CLK_M4_USART0 + * USART0 peripheral clock (PCLK) BASE_UART0_CLK CLK_APB0_UART0 + * UART1 clock to register interface BASE_M4_CLK CLK_M4_UART1 + * UART1 peripheral clock (PCLK) BASE_UART1_CLK CLK_APB0_UART1 + * USART2 clock to register interface BASE_M4_CLK CLK_M4_USART2 + * USART2 peripheral clock (PCLK) BASE_UART2_CLK CLK_APB2_UART2 + * USART3 clock to register interface BASE_M4_CLK CLK_M4_USART3 + * USART3 peripheral clock (PCLK) BASE_UART3_CLK CLK_APB2_UART3 + * ----------------------------------- -------------- -------------- + * + ****************************************************************************/ + +#ifdef CONFIG_LPC43_USART0 +void lpc43_usart0_setup(void) +{ + uint32_t regval; + irqstate_t flags; + + /* Connect USART0 into the clock source specified in board.h */ + + flags = irqsave(); + + regval = getreg32(LPC43_BASE_USART0_CLK); + regval &= ~BASE_USART0_CLK_CLKSEL_MASK; + regval |= (BOARD_USART0_CLKSRC | BASE_USART0_CLK_AUTOBLOCK); + putreg32(regval, LPC43_BASE_USART0_CLK); + + /* Configure I/O pins */ + + lpc43_pin_config(PINCONF_U0_TXD); + lpc43_pin_config(PINCONF_U0_RXD); + + irqrestore(flags); +}; +#endif + +#ifdef CONFIG_LPC43_UART1 +void lpc43_uart1_setup(void) +{ + uint32_t regval; + irqstate_t flags; + + /* Connect UART1 into the clock source specified in board.h */ + + flags = irqsave(); + + regval = getreg32(LPC43_BASE_UART1_CLK); + regval &= ~BASE_UART1_CLK_CLKSEL_MASK; + regval |= (BOARD_UART1_CLKSRC | BASE_UART1_CLK_AUTOBLOCK); + putreg32(regval, LPC43_BASE_UART1_CLK); + + /* Configure I/O pins (resolution of mulitple pins alternatvies + * must be provided in the board.h file). + */ + + lpc43_pin_config(PINCONF_U1_TXD); + lpc43_pin_config(PINCONF_U1_RXD); +#ifdef CONFIG_UART1_FLOWCONTROL + lpc43_pin_config(PINCONF_U1_CTS); + lpc43_pin_config(PINCONF_U1_DCD); + lpc43_pin_config(PINCONF_U1_DSR); + lpc43_pin_config(PINCONF_U1_DTR); + lpc43_pin_config(PINCONF_U1_RTS); +#ifdef CONFIG_UART1_RINGINDICATOR + lpc43_pin_config(PINCONF_U1_RI); +#endif +#endif + + irqrestore(flags); +}; +#endif + +#ifdef CONFIG_LPC43_USART2 +void lpc43_usart2_setup(void) +{ + uint32_t regval; + irqstate_t flags; + + /* Connect USART2 the clock source specified in board.h */ + + flags = irqsave(); + + regval = getreg32(LPC43_BASE_USART2_CLK); + regval &= ~BASE_USART2_CLK_CLKSEL_MASK; + regval |= (BOARD_USART2_CLKSRC | BASE_USART2_CLK_AUTOBLOCK); + putreg32(regval, LPC43_BASE_USART2_CLK); + + /* Configure I/O pins (resolution of mulitple pins alternatvies + * must be provided in the board.h file). + */ + + lpc43_pin_config(PINCONF_U2_TXD); + lpc43_pin_config(PINCONF_U2_RXD); + + irqrestore(flags); +}; +#endif + +#ifdef CONFIG_LPC43_USART3 +void lpc43_usart3_setup(void) +{ + uint32_t regval; + irqstate_t flags; + + /* Connect USART3 into the clock source specified in board.h */ + + flags = irqsave(); + + regval = getreg32(LPC43_BASE_USART3_CLK); + regval &= ~BASE_USART3_CLK_CLKSEL_MASK; + regval |= (BOARD_USART3_CLKSRC | BASE_USART3_CLK_AUTOBLOCK); + putreg32(regval, LPC43_BASE_USART3_CLK); + + /* Configure I/O pins (resolution of mulitple pins alternatvies + * must be provided in the board.h file). + */ + + lpc43_pin_config(PINCONF_U3_TXD); + lpc43_pin_config(PINCONF_U3_RXD); + + irqrestore(flags); +}; +#endif + + diff --git a/nuttx/arch/arm/src/lpc43xx/lpc43_uart.h b/nuttx/arch/arm/src/lpc43xx/lpc43_uart.h new file mode 100644 index 000000000..1eeafc20b --- /dev/null +++ b/nuttx/arch/arm/src/lpc43xx/lpc43_uart.h @@ -0,0 +1,142 @@ +/**************************************************************************** + * arch/arm/src/lpc43xx/lpc43_uart.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_LPC43XX_LPC43_LOWSETUP_H +#define __ARCH_ARM_SRC_LPC43XX_LPC43_LOWSETUP_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include "chip.h" +#include "chip/lpc43_uart.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc43_lowsetup + * + * Description: + * Called at the very beginning of _start. Performs low level + * initialization of the serial console. + * + ****************************************************************************/ + +EXTERN void lpc43_lowsetup(void); + +/**************************************************************************** + * Name: lpc43_usart0_reset, lpc43_uart1_reset, lpc43_usart2_reset, and + * lpc43_usart3_reset + * + * Description: + * Reset a U[S]ART. These functions are used by the serial driver when a + * U[S]ART is closed. + * + ****************************************************************************/ + +#ifdef CONFIG_LPC43_USART0 +EXTERN void lpc43_usart0_reset(void); +#endif +#ifdef CONFIG_LPC43_UART1 +EXTERN void lpc43_uart1_reset(void); +#endif +#ifdef CONFIG_LPC43_USART2 +EXTERN void lpc43_usart2_reset(void); +#endif +#ifdef CONFIG_LPC43_USART3 +EXTERN void lpc43_usart3_reset(void); +#endif + +/**************************************************************************** + * Name: lpc43_usart0_setup, lpc43_uart1_setup, lpc43_usart2_setup, and + * lpc43_usart3_setup + * + * Description: + * Configure the U[S]ART. This involves: + * + * 1. Connecting the input clock to the U[S]ART as specified in the + * board.h file, + * 2. Configuring the U[S]ART pins + * + ****************************************************************************/ + +#ifdef CONFIG_LPC43_USART0 +EXTERN void lpc43_usart0_setup(void); +#endif + +#ifdef CONFIG_LPC43_UART1 +EXTERN void lpc43_uart1_setup(void); +#endif + +#ifdef CONFIG_LPC43_USART2 +EXTERN void lpc43_usart2_setup(void); +#endif + +#ifdef CONFIG_LPC43_USART3 +EXTERN void lpc43_usart3_setup(void); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_ARM_SRC_LPC43XX_LPC43_LOWSETUP_H */ diff --git a/nuttx/configs/lpc4330-xplorer/include/board.h b/nuttx/configs/lpc4330-xplorer/include/board.h index 1c2f42b2c..485cd13e0 100644 --- a/nuttx/configs/lpc4330-xplorer/include/board.h +++ b/nuttx/configs/lpc4330-xplorer/include/board.h @@ -97,6 +97,21 @@ #define LPC43_CCLK BOARD_FCLKOUT_FREQUENCY +/* UART clocking ***********************************************************/ +/* Configure all U[S]ARTs to use the XTAL input frequency */ + +#define BOARD_USART0_CLKSRC BASE_USART0_CLKSEL_XTAL +#define BOARD_USART0_BASEFREQ BOARD_XTAL_FREQUENCY + +#define BOARD_UART1_CLKSRC BASE_UART1_CLKSEL_XTAL +#define BOARD_UART1_BASEFREQ BOARD_XTAL_FREQUENCY + +#define BOARD_USART2_CLKSRC BASE_USART2_CLKSEL_XTAL +#define BOARD_USART3_BASEFREQ BOARD_XTAL_FREQUENCY + +#define BOARD_USART3_CLKSRC BASE_USART3_CLKSEL_XTAL +#define BOARD_USART3_BASEFREQ BOARD_XTAL_FREQUENCY + /* LED definitions *********************************************************/ /* The LPC4330-Xplorer has 2 user-controllable LEDs labeled D2 an D3 in the * schematic and on but referred to has LED1 and LED2 here, respectively. -- cgit v1.2.3