From b49b2136f16a49b753e7824cb68f2294599179ac Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 5 Apr 2015 07:22:46 -0600 Subject: Update comments and README --- nuttx/arch/arm/src/samv7/sam_start.h | 5 ++-- nuttx/arch/arm/src/samv7/samv71_periphclks.h | 4 +-- nuttx/configs/samv71-xult/README.txt | 30 ++++++++++++++++++++-- nuttx/configs/samv71-xult/src/sam_boot.c | 38 +++++++++++++++------------- nuttx/configs/samv71-xult/src/sam_sdram.c | 8 +++--- 5 files changed, 58 insertions(+), 27 deletions(-) (limited to 'nuttx') diff --git a/nuttx/arch/arm/src/samv7/sam_start.h b/nuttx/arch/arm/src/samv7/sam_start.h index b25d2ce9d..ac0a9739d 100644 --- a/nuttx/arch/arm/src/samv7/sam_start.h +++ b/nuttx/arch/arm/src/samv7/sam_start.h @@ -109,8 +109,9 @@ void sam_lowsetup(void); * * Description: * All SAMV7 architectures must provide the following entry point. This entry - * point is called early in the initialization -- after all memory has been - * configured and mapped but before any devices have been initialized. + * point is called early in the initialization -- after clocking and memory have + * been configured but before caches have been enabled and before any devices have + * been initialized. * ************************************************************************************/ diff --git a/nuttx/arch/arm/src/samv7/samv71_periphclks.h b/nuttx/arch/arm/src/samv7/samv71_periphclks.h index 60ed117fe..4cf525e36 100644 --- a/nuttx/arch/arm/src/samv7/samv71_periphclks.h +++ b/nuttx/arch/arm/src/samv7/samv71_periphclks.h @@ -118,7 +118,7 @@ #define sam_isi_enableclk() sam_enableperiph1(SAM_PID_ISI) #define sam_pwm1_enableclk() sam_enableperiph1(SAM_PID_PWM1) #define sam_fpu_enableclk() -#define sam_sdramc_enableclk() sam_enableperiph1(SAM_PID_SDRAMC) +#define sam_sdramc_enableclk() sam_enableperiph1(SAM_PID_SDRAMC) /* REVISIT: Does this exist? */ #define sam_wdt1_enableclk() #define sam_ccw_enableclk() @@ -186,7 +186,7 @@ #define sam_isi_disableclk() sam_disableperiph1(SAM_PID_ISI) #define sam_pwm1_disableclk() sam_disableperiph1(SAM_PID_PWM1) #define sam_fpu_disableclk() -#define sam_sdramc_disableclk() sam_disableperiph1(SAM_PID_SDRAMC) +#define sam_sdramc_disableclk() sam_disableperiph1(SAM_PID_SDRAMC) /* REVISIT: Does this exist? */ #define sam_wdt1_disableclk() #define sam_ccw_disableclk() diff --git a/nuttx/configs/samv71-xult/README.txt b/nuttx/configs/samv71-xult/README.txt index 8886aefc7..5fcb078e8 100644 --- a/nuttx/configs/samv71-xult/README.txt +++ b/nuttx/configs/samv71-xult/README.txt @@ -111,6 +111,18 @@ The BASIC nsh configuration is fully function (as desribed below under sample code and study of the data sheet, but I have not found the key to solving this. + 6. Partial support for the maXTouch Xplained Pro LCD is in place. The + ILI9488-based LCD is working well with a SMC DMA-based interface. Very + nice performance. + + However, the maXTouch touchscreen driver is not working. I tried re- + using the maXTouch driver that was used with the SAMA5D4-EK TM7000 + LCD, but the maXTouch Xplained Pro has a different maXTouch part. + The driver claims that all operations are success, but there are no + interrupts signalling touch event. I assume that the different + maXTouch part is not being configured correctly but there is no + avaiable technical documentation or sample code to debug with. + Serial Console ============== @@ -1134,9 +1146,23 @@ Configuration sub-directories CP2100CP programmable PLL, and 0x57 and 0x5f are the addresses of the AT2 EEPROM. I am not sure what the other address, 0x37, is). + 8. Support for the touchscreen test is enabled (see apps/examples/touchscreen), + however, the maXTouch is not yet working (see STATUS below). + STATUS: - 2015-03-30: Currently contains on a touchscreen test. The touchscreen - does not yet work. + 2015-04-05: Partial support for the maXTouch Xplained Pro LCD is in + place. The ILI9488-based LCD is working well with a SMC DMA-based + interface. Very nice performance. + + However, the maXTouch touchscreen driver is not working. I tried + re-using the maXTouch driver that was used with the SAMA5D4-EK + TM7000 LCD, but the maXTouch Xplained Pro has a different maXTouch + part. The driver claims that all operations are success, but + there are no interrupts signalling touch event. I assume that the + different maXTouch part is not being configured correctly but there + is no available technical documentation or sample code to debug + with. + netnsh: diff --git a/nuttx/configs/samv71-xult/src/sam_boot.c b/nuttx/configs/samv71-xult/src/sam_boot.c index 0a19fb6c0..2cecca9ff 100644 --- a/nuttx/configs/samv71-xult/src/sam_boot.c +++ b/nuttx/configs/samv71-xult/src/sam_boot.c @@ -1,4 +1,4 @@ -/************************************************************************************ +/**************************************************************************** * configs/samv71-xult/src/sam_boot.c * * Copyright (C) 2015 Gregory Nutt. All rights reserved. @@ -31,11 +31,11 @@ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * - ************************************************************************************/ + ****************************************************************************/ -/************************************************************************************ +/**************************************************************************** * Included Files - ************************************************************************************/ + ****************************************************************************/ #include @@ -45,35 +45,37 @@ #include #include "up_arch.h" +#include "sam_start.h" #include "samv71-xult.h" -/************************************************************************************ +/**************************************************************************** * Pre-processor Definitions - ************************************************************************************/ + ****************************************************************************/ -/************************************************************************************ +/**************************************************************************** * Private Functions - ************************************************************************************/ + ****************************************************************************/ -/************************************************************************************ +/**************************************************************************** * Public Functions - ************************************************************************************/ + ****************************************************************************/ -/************************************************************************************ +/**************************************************************************** * Name: sam_boardinitialize * * Description: - * All SAM3U architectures must provide the following entry point. This entry point - * is called early in the initialization -- after all memory has been configured - * and mapped but before any devices have been initialized. + * All SAMV7 architectures must provide the following entry point. This + * entry point is called early in the initialization -- after clocking and + * memory have been configured but before caches have been enabled and + * before any devices have been initialized. * - ************************************************************************************/ + ****************************************************************************/ void sam_boardinitialize(void) { #ifdef CONFIG_SAMV7_SDRAMC - /* Configure SDRAM if it has been enabled in the NuttX configuration. Here we - * assume, of course, that we are not running out SDRAM. + /* Configure SDRAM if it has been enabled in the NuttX configuration. + * Here we assume, of course, that we are not running out SDRAM. */ sam_sdram_config(); @@ -113,7 +115,7 @@ void sam_boardinitialize(void) * If CONFIG_BOARD_INITIALIZE is selected, then an additional * initialization call will be performed in the boot-up sequence to a * function called board_initialize(). board_initialize() will be - * called immediately after up_intiialize() is called and just before the + * called immediately after up_intitialize() is called and just before the * initial application is started. This additional initialization phase * may be used, for example, to initialize board-specific device drivers. * diff --git a/nuttx/configs/samv71-xult/src/sam_sdram.c b/nuttx/configs/samv71-xult/src/sam_sdram.c index 2c9799d07..7cbb4b4f5 100644 --- a/nuttx/configs/samv71-xult/src/sam_sdram.c +++ b/nuttx/configs/samv71-xult/src/sam_sdram.c @@ -90,9 +90,11 @@ * None * * Assumptions: - * The DDR memory regions is configured as strongly ordered memory. When - * we complete initialization of SDRAM and it is ready for use, we will - * make DRAM into normal, cached memory. + * This test runs early in initialization before I- and D-caches are + * enabled. + * + * NOTE: Since the delay loop is calibrate with caches in enabled, the + * calls to up_udelay() are wrong ty orders of magnitude. * ****************************************************************************/ -- cgit v1.2.3