From e5fcd6cdd87650d6b7720a7303044e946af353cc Mon Sep 17 00:00:00 2001 From: patacongo Date: Sun, 16 Mar 2008 23:36:25 +0000 Subject: Added EZ80 files git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@738 42af7a65-404d-4744-a932-0658087f49c3 --- nuttx/arch/z80/src/ez80/Make.defs | 6 +- nuttx/arch/z80/src/ez80/ez80_irq.c | 135 ++++++++++++++++ nuttx/arch/z80/src/ez80/ez80_restorecontext.asm | 109 +++++++++++++ nuttx/arch/z80/src/ez80/ez80_saveusercontext.asm | 157 ++++++++++++++++++ nuttx/arch/z80/src/ez80/ez80_schedulesigaction.c | 192 +++++++++++++++++++++++ nuttx/arch/z80/src/ez80/ez80_sigdeliver.c | 141 +++++++++++++++++ nuttx/arch/z80/src/ez80/ez80_vectors.asm | 7 +- 7 files changed, 743 insertions(+), 4 deletions(-) create mode 100644 nuttx/arch/z80/src/ez80/ez80_irq.c create mode 100644 nuttx/arch/z80/src/ez80/ez80_restorecontext.asm create mode 100644 nuttx/arch/z80/src/ez80/ez80_saveusercontext.asm create mode 100644 nuttx/arch/z80/src/ez80/ez80_schedulesigaction.c create mode 100644 nuttx/arch/z80/src/ez80/ez80_sigdeliver.c (limited to 'nuttx') diff --git a/nuttx/arch/z80/src/ez80/Make.defs b/nuttx/arch/z80/src/ez80/Make.defs index fc9e9e844..b1deb49b4 100644 --- a/nuttx/arch/z80/src/ez80/Make.defs +++ b/nuttx/arch/z80/src/ez80/Make.defs @@ -48,6 +48,6 @@ ifeq ($(_EZ80F91),y) CHIP_ASRCS += ez80f91_init.asm endif CHIP_SSRCS = -CHIP_CSRCS = ez80_initialstate.c ez80_irq.c ez80_saveirqcontext.c \ - ez80_schedulesigaction.c ez80_sigdeliver.c ez80_timerisr.c \ - ez80_lowuart.c ez80_serial.c ez80_registerdump.c +CHIP_CSRCS = ez80_initialstate.c ez80_irq.c ez80_schedulesigaction.c \ + ez80_sigdeliver.c ez80_timerisr.c ez80_lowuart.c ez80_serial.c \ + ez80_registerdump.c diff --git a/nuttx/arch/z80/src/ez80/ez80_irq.c b/nuttx/arch/z80/src/ez80/ez80_irq.c new file mode 100644 index 000000000..29cb39f50 --- /dev/null +++ b/nuttx/arch/z80/src/ez80/ez80_irq.c @@ -0,0 +1,135 @@ +/**************************************************************************** + * arch/z80/src/ez80/ez80_irq.c + * + * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include "chip/switch.h" +#include "up_internal.h" + +/**************************************************************************** + * Private Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_irqinitialize + ****************************************************************************/ + +void up_irqinitialize(void) +{ +} + +/**************************************************************************** + * Name: irqsave + * + * Description: + * Disable all interrupts; return previous interrupt state + * + ****************************************************************************/ + +irqstate_t irqsave(void) +{ +} + +/**************************************************************************** + * Name: irqrestore + * + * Description: + * Restore previous interrupt state + * + ****************************************************************************/ + +void irqrestore(irqstate_t flags) +{ +} + +/**************************************************************************** + * Name: up_disable_irq + * + * Description: + * Disable the IRQ specified by 'irq' + * + ****************************************************************************/ + +void up_disable_irq(int irq) +{ +} + +/**************************************************************************** + * Name: up_enable_irq + * + * Description: + * Enable the IRQ specified by 'irq' + * + ****************************************************************************/ + +void up_enable_irq(int irq) +{ +} + +/**************************************************************************** + * Name: up_maskack_irq + * + * Description: + * Mask the IRQ and acknowledge it + * + ****************************************************************************/ + +void up_maskack_irq(int irq) +{ +} diff --git a/nuttx/arch/z80/src/ez80/ez80_restorecontext.asm b/nuttx/arch/z80/src/ez80/ez80_restorecontext.asm new file mode 100644 index 000000000..35a3f45a1 --- /dev/null +++ b/nuttx/arch/z80/src/ez80/ez80_restorecontext.asm @@ -0,0 +1,109 @@ +;************************************************************************** +; arch/z80/src/ez80/z80_restorcontext.asm +; +; Copyright (C) 2008 Gregory Nutt. All rights reserved. +; Author: Gregory Nutt +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in +; the documentation and/or other materials provided with the +; distribution. +; 3. Neither the name NuttX nor the names of its contributors may be +; used to endorse or promote products derived from this software +; without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; POSSIBILITY OF SUCH DAMAGE. +; +;************************************************************************** + +;************************************************************************** +; Global Symbols Imported +;************************************************************************** + +;************************************************************************** +; Global Symbols Expported +;************************************************************************** + + xdef _ez80_restorecontext + +;************************************************************************** +; Code +;************************************************************************** + + segment CODE + +;************************************************************************** +; ez80_restorecontext +;************************************************************************** + +_ez80_restorecontext: + ; On entry, stack contains return address (not used), then address + ; of the register save structure + + ; Discard the return address, we won't be returning + + pop hl + + ; Get the address of the beginning of the state save area. Each + ; pop will increment to the next element of the structure + + pop hl ; BC = Address of save structure + ld sp, hl ; SP points to top of storage area + + ; Disable interrupts while we muck with the alternative registers. The + ; Correct interrupt state will be restore below + + di + + ; Restore registers. HL points to the beginning of the reg structure to restore + + ex af, af' ; Select alternate AF + pop af ; Offset 0: AF' = I with interrupt state in carry + ex af, af' ; Restore original AF + pop bc ; Offset 1: BC + pop de ; Offset 2: DE + pop ix ; Offset 3: IX + pop iy ; Offset 4: IY + exx ; Use alternate BC/DE/HL + pop hl ; Offset 5: HL' = Stack pointer after return + exx ; Restore original BC/DE/HL + pop hl ; Offset 6: HL + pop af ; Offset 7: AF + + ; Restore the stack pointer + + exx ; Use alternate BC/DE/HL + pop de ; DE' = return address + ld sp, hl ; Set SP = saved stack pointer value before return + push de ; Save return address for ret instruction + exx ; Restore original BC/DE/HL + + ; Restore interrupt state + + ex af, af' ; Recover interrupt state + jr po, noinrestore ; No parity, IFF2=0, means disabled + ex af, af' ; Restore AF (before enabling interrupts) + ei ; yes.. Enable interrupts + ret ; and return +noinrestore: + ex af, af' ; Restore AF + ret ; Return with interrupts disabled + end + diff --git a/nuttx/arch/z80/src/ez80/ez80_saveusercontext.asm b/nuttx/arch/z80/src/ez80/ez80_saveusercontext.asm new file mode 100644 index 000000000..0930d7567 --- /dev/null +++ b/nuttx/arch/z80/src/ez80/ez80_saveusercontext.asm @@ -0,0 +1,157 @@ +;************************************************************************* +; arch/z80/src/ez80/ez80_saveusercontext.asm +; +; Copyright (C) 2008 Gregory Nutt. All rights reserved. +; Author: Gregory Nutt +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in +; the documentation and/or other materials provided with the +; distribution. +; 3. Neither the name NuttX nor the names of its contributors may be +; used to endorse or promote products derived from this software +; without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; POSSIBILITY OF SUCH DAMAGE. +; +;************************************************************************* + +;************************************************************************** +; Global Symbols Imported +;************************************************************************** + +;************************************************************************** +; Global Symbols Expported +;************************************************************************** + + xdef _ez80_saveusercontext + +;************************************************************************* +; Constants +;************************************************************************* + + ; Register save area layout + + .if CONFIG_EZ80_Z80MODE + XCPT_I EQU 2*0 ; Offset 0: Saved I w/interrupt state in carry + XCPT_BC EQU 2*1 ; Offset 1: Saved BC register + XCPT_DE EQU 2*2 ; Offset 2: Saved DE register + XCPT_IX EQU 2*3 ; Offset 3: Saved IX register + XCPT_IY EQU 2*4 ; Offset 4: Saved IY register + XCPT_SP EQU 2*5 ; Offset 5: Offset to SP at time of interrupt + XCPT_HL EQU 2*6 ; Offset 6: Saved HL register + XCPT_AF EQU 2*7 ; Offset 7: Saved AF register + XCPT_PC EQU 2*8 ; Offset 8: Offset to PC at time of interrupt + .else + XCPT_I EQU 3*0 ; Offset 0: Saved I w/interrupt state in carry + XCPT_BC EQU 3*1 ; Offset 1: Saved BC register + XCPT_DE EQU 3*2 ; Offset 2: Saved DE register + XCPT_IX EQU 3*3 ; Offset 3: Saved IX register + XCPT_IY EQU 3*4 ; Offset 4: Saved IY register + XCPT_SP EQU 3*5 ; Offset 5: Offset to SP at time of interrupt + XCPT_HL EQU 3*6 ; Offset 6: Saved HL register + XCPT_AF EQU 3*7 ; Offset 7: Saved AF register + XCPT_PC EQU 3*8 ; Offset 8: Offset to PC at time of interrupt .endif + + ; Stack frame + + FRAME_IY EQU 0 ; Location of IY on the stack + FRAME_IX EQU 2 ; Location of IX on the stack + FRAME_RET EQU 4 ; Location of return address on the stack + FRAME_REGS EQU 6 ; Location of reg save area on stack + + SP_OFFSET EQU 6 + +;************************************************************************** +; Code +;************************************************************************** + + segment CODE + +;************************************************************************* +; Name: z80_saveusercontext +;************************************************************************* + +_ez80_saveusercontext: + ; Set up a stack frame + + push ix ; Save IX and IY + push iy + ld ix, #0 + add ix, sp ; IX = stack frame + + ; Fetch the address of the save area + + ld de, FRAME_REGS(ix) ; DE = save area address + ld iy, #0 + add iy, de ; IY = save area address + + ; Then save the registers + + ; Save the current interrupt state at offset 0 + + ld a, i ; Get interrupt state + push af + pop hl + ld XCPT_I(iy), hl ; Index 0: I w/interrupt state in parity/overflow + + ; Save BC at offset 1 + + ld XCPT_BC(iy), bc ; Index 1: BC + + ; DE is not preserved (Index 2) + + ; Save IX at offset 3 + + ld hl, FRAME_IX(ix) ; HL = Saved alue of IX + ld XCPT_IX(iy), hl ; Index 3: IX + + ; Save IY at index 4 + + ld hl, FRAME_IY(ix) ; HL = Saved value of IY + ld XCPT_IY(iy), hl ; Index 4: IY + + ; Save that stack pointer as it would be upon return in offset 5 + + ld hl, #SP_OFFSET ; Value of stack pointer on return + add hl, sp + ld XCPT_SP(iy), hl ; Index 5 SP + + ; HL is saved as the value 1 at offset 6 + + ld hl, #1 + ld XCPT_HL(iy), hl ; Index 2: HL on return (=1) + + ; AF is not preserved (offset 7) + + ; Save the return address at index 8 + + ld hl, FRAME_RET(ix) ; HL = Saved return address + ld XCPT_PC(iy), hl ; Index 8: PC + + ; Return the value 0 + + ld hl, #0 + + pop iy + pop ix + ret + end + diff --git a/nuttx/arch/z80/src/ez80/ez80_schedulesigaction.c b/nuttx/arch/z80/src/ez80/ez80_schedulesigaction.c new file mode 100644 index 000000000..3e8b29ea5 --- /dev/null +++ b/nuttx/arch/z80/src/ez80/ez80_schedulesigaction.c @@ -0,0 +1,192 @@ +/**************************************************************************** + * arch/z80/src/ez80/ez80_schedulesigaction.c + * + * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip/switch.h" +#include "os_internal.h" +#include "up_internal.h" + +#ifndef CONFIG_DISABLE_SIGNALS + +/**************************************************************************** + * Private Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: ez80_sigsetup + ****************************************************************************/ + +static void ez80_sigsetup(FAR _TCB *tcb, sig_deliver_t sigdeliver, FAR chipreg_t *regs) +{ + /* Save the return address and interrupt state. These will be restored by + * the signal trampoline after the signals have been delivered. + */ + + tcb->xcp.sigdeliver = sigdeliver; + tcb->xcp.saved_pc = regs[XCPT_PC]; + tcb->xcp.saved_i = regs[XCPT_I]; + + /* Then set up to vector to the trampoline with interrupts disabled */ + + regs[XCPT_PC] = (chipreg_t)up_sigdeliver; + regs[XCPT_I] = 0; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_schedule_sigaction + * + * Description: + * This function is called by the OS when one or more + * signal handling actions have been queued for execution. + * The architecture specific code must configure things so + * that the 'igdeliver' callback is executed on the thread + * specified by 'tcb' as soon as possible. + * + * This function may be called from interrupt handling logic. + * + * This operation should not cause the task to be unblocked + * nor should it cause any immediate execution of sigdeliver. + * Typically, a few cases need to be considered: + * + * (1) This function may be called from an interrupt handler + * During interrupt processing, all xcptcontext structures + * should be valid for all tasks. That structure should + * be modified to invoke sigdeliver() either on return + * from (this) interrupt or on some subsequent context + * switch to the recipient task. + * (2) If not in an interrupt handler and the tcb is NOT + * the currently executing task, then again just modify + * the saved xcptcontext structure for the recipient + * task so it will invoke sigdeliver when that task is + * later resumed. + * (3) If not in an interrupt handler and the tcb IS the + * currently executing task -- just call the signal + * handler now. + * + ****************************************************************************/ + +void up_schedule_sigaction(FAR _TCB *tcb, sig_deliver_t sigdeliver) +{ + dbg("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16)sigdeliver); + + /* Refuse to handle nested signal actions */ + + if (tcb->xcp.sigdeliver == NULL) + { + irqstate_t flags; + + /* Make sure that interrupts are disabled */ + + flags = irqsave(); + + /* First, handle some special cases when the signal is being delivered + * to the currently executing task. + */ + + if (tcb == (FAR _TCB*)g_readytorun.head) + { + /* CASE 1: We are not in an interrupt handler and a task is + * signalling itself for some reason. + */ + + if (!IN_INTERRUPT()) + { + /* In this case just deliver the signal now. */ + + sigdeliver(tcb); + } + + /* CASE 2: We are in an interrupt handler AND the interrupted task + * is the same as the one that must receive the signal, then we + * will have to modify the return state as well as the state in + * the TCB. + */ + + else + { + /* Set up to vector to the trampoline with interrupts disabled. */ + + ez80_sigsetup(tcb, sigdeliver, IRQ_STATE()); + + /* And make sure that the saved context in the TCB + * is the same as the interrupt return context. + */ + + SAVE_IRQCONTEXT(tcb); + } + } + + /* Otherwise, we are (1) signaling a task is not running from an interrupt + * handler or (2) we are not in an interrupt handler and the running task + * is signalling some non-running task. + */ + + else + { + /* Set up to vector to the trampoline with interrupts disabled. */ + + ez80_sigsetup(tcb, sigdeliver, tcb->xcp.regs); + } + + irqrestore(flags); + } +} + +#endif /* CONFIG_DISABLE_SIGNALS */ + diff --git a/nuttx/arch/z80/src/ez80/ez80_sigdeliver.c b/nuttx/arch/z80/src/ez80/ez80_sigdeliver.c new file mode 100644 index 000000000..8a8d1ab2a --- /dev/null +++ b/nuttx/arch/z80/src/ez80/ez80_sigdeliver.c @@ -0,0 +1,141 @@ +/**************************************************************************** + * arch/z80/src/ez80/ez80_sigdeliver.c + * + * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip/switch.h" +#include "os_internal.h" +#include "up_internal.h" + +#ifndef CONFIG_DISABLE_SIGNALS + +/**************************************************************************** + * Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_sigdeliver + * + * Description: + * This is the a signal handling trampoline. When a + * signal action was posted. The task context was mucked + * with and forced to branch to this location with interrupts + * disabled. + * + ****************************************************************************/ + +void up_sigdeliver(void) +{ +#ifndef CONFIG_DISABLE_SIGNALS + FAR _TCB *rtcb = (_TCB*)g_readytorun.head; + chipret_t regs[XCPTCONTEXT_REGS]; + sig_deliver_t sigdeliver; + + /* Save the errno. This must be preserved throughout the signal handling + * so that the the user code final gets the correct errno value (probably + * EINTR). + */ + + int saved_errno = rtcb->pterrno; + + up_ledon(LED_SIGNAL); + + dbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n", + rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head); + ASSERT(rtcb->xcp.sigdeliver != NULL); + + /* Save the real return state on the stack. */ + + z80_copystate(regs, rtcb->xcp.regs); + regs[XCPT_PC] = rtcb->xcp.saved_pc; + regs[XCPT_I] = rtcb->xcp.saved_i; + + /* Get a local copy of the sigdeliver function pointer. We do this so + * that we can nullify the sigdeliver function point in the TCB and accept + * more signal deliveries while processing the current pending signals. + */ + + sigdeliver = rtcb->xcp.sigdeliver; + rtcb->xcp.sigdeliver = NULL; + + /* Then restore the task interrupt state. */ + + irqrestore(regs[XCPT_I]); + + /* Deliver the signals */ + + sigdeliver(rtcb); + + /* Output any debug messaged BEFORE restoring errno (because they may alter + * errno), then restore the original errno that is needed by the user logic + * (it is probably EINTR). + */ + + dbg("Resuming\n"); + rtcb->pterrno = saved_errno; + + /* Then restore the correct state for this thread of + * execution. + */ + + up_ledoff(LED_SIGNAL); + z80_restoreusercontext(regs); +#endif +} + +#endif /* CONFIG_DISABLE_SIGNALS */ diff --git a/nuttx/arch/z80/src/ez80/ez80_vectors.asm b/nuttx/arch/z80/src/ez80/ez80_vectors.asm index b6140abb1..6fc20b6ff 100644 --- a/nuttx/arch/z80/src/ez80/ez80_vectors.asm +++ b/nuttx/arch/z80/src/ez80/ez80_vectors.asm @@ -40,10 +40,15 @@ NVECTORS EQU 64 ; max possible interrupt vectors ;************************************************************************** -; Global symbols used +; Global Symbols Imported ;************************************************************************** xref _ez80_startup + +;************************************************************************** +; Global Symbols Exported +;************************************************************************** + xdef _ez80_reset xdef _ez80_initvectors xdef _ez80_handlers -- cgit v1.2.3