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author | Gregory Nutt <gnutt@nuttx.org> | 2014-08-05 07:07:52 -0600 |
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committer | Gregory Nutt <gnutt@nuttx.org> | 2014-08-05 07:07:52 -0600 |
commit | 38ec4b7ea9354b495b72c6e2e346c106ed768dd2 (patch) | |
tree | 174b9e6fbf45754896c32530b76b1b98e7bcc2e7 /nuttx/ChangeLog | |
parent | 5dc6863f4fcd100767284b06b5e4c8fc405a1c58 (diff) | |
download | nuttx-38ec4b7ea9354b495b72c6e2e346c106ed768dd2.tar.gz nuttx-38ec4b7ea9354b495b72c6e2e346c106ed768dd2.tar.bz2 nuttx-38ec4b7ea9354b495b72c6e2e346c106ed768dd2.zip |
Update ChangeLog
Diffstat (limited to 'nuttx/ChangeLog')
-rwxr-xr-x | nuttx/ChangeLog | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog index bfeecba0a..beaef9da4 100755 --- a/nuttx/ChangeLog +++ b/nuttx/ChangeLog @@ -6455,6 +6455,7 @@ has never done anything (2014-1-15). * All implementations of up_disable_irq() for all Cortex-M3 and M4 architectures: To enable an interrupt on the Cortex-M3/4 CPU, you + need to set a bit in the ISER registet on the Cortex-M3/4 CPU, you need to set a bit in the ISER register. To disable the interrupt, you need to set a bit in the ICER register. Existing logic was trying to disable interrupts by clearing the bit in the ISER register. That will @@ -7981,3 +7982,7 @@ in its initial state after playing each WAV file. Base samles per second on frame length, not bits-per-sample. Use a different frame length for 8-bit and 16-bit data (2014-8-4). + * arch/arm/src/sama5/sam_hsmci.c: TX DMA is again disabled for the + SAMA5D3 family. Although it works with the SAMA5D4 (which has a + different DMA subsystem), it does not work with the SAMA5D3 (2014-8-5, + see 2014-7-30). |