Update SH-1 status

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1225 42af7a65-404d-4744-a932-0658087f49c3

1 files changed, 10 insertions, 3 deletions

diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog
index 25fbdd30e..0d00c3f80 100644
--- a/nuttx/ChangeLog
+++ b/nuttx/ChangeLog
@@ -529,10 +529,17 @@
 	* Added port for the STMicro STR71x processor and configuration for the Olimex STR-P711
 	  board (STR71x testing is stalled because I have been unable to get OpenOCD to
 	  communicate with my JTAG wiggler on Linux).
-	* Fix race condition workaround delay in LPC214X SPI logic.  It the cause of the very
-	  bad MMC/SD performance.
+	* Fix race condition workaround delay in LPC214X SPI logic.  This was also the cause of the
+	  very bad MMC/SD performance.
 	* Began port of the Hitachi SH-1 using the SH-1/US7032EVB1 board
 	* Re-built all configurations that use SDCC and Zilog toolchains to make sure they still
 	  build (they didn't, but they do now).
 	* Fixed several erroneous "list empty" checks in the CAN driver.
-	* Hitachi SH-1 passes (reduced) examples/ostest (examples/nsh still fails)
+	* Hitachi SH-1 passes (reduced) examples/ostest; the examples/nsh test still fails.
+	  There are remaining instabilities that make the port un-usable.  The nature of these is
+	  not understood; the behavior is that certain SH-1 instructions stop working as advertised.
+	  This could be a silicon problem, some pipeline issue that is not handled properly by the
+	  gcc 3.4.5 toolchain (which has very limit SH-1 support to begin with), or perhaps with the
+	  CMON debugger.  At any rate, I have exhausted all of the energy that I am willing to put
+	  into this cool old processor for the time being.
+