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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2013-01-22 14:37:17 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2013-01-22 14:37:17 +0000
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parentfefa8ee3353d5ac7ef0e925ba8dcbbb89f2c96ae (diff)
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More logic to use BASEPRI to control interrupts -- still doesn't work
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5547 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/TODO')
-rw-r--r--nuttx/TODO23
1 files changed, 1 insertions, 22 deletions
diff --git a/nuttx/TODO b/nuttx/TODO
index 91b4aebaa..94c3dba0d 100644
--- a/nuttx/TODO
+++ b/nuttx/TODO
@@ -21,7 +21,7 @@ nuttx/
(1) Documentation (Documentation/)
(7) Build system / Toolchains
(5) Linux/Cywgin simulation (arch/sim)
- (6) ARM (arch/arm/)
+ (5) ARM (arch/arm/)
(1) ARM/C5471 (arch/arm/src/c5471/)
(3) ARM/DM320 (arch/arm/src/dm320/)
(2) ARM/i.MX (arch/arm/src/imx/)
@@ -1176,27 +1176,6 @@ o ARM (arch/arm/)
Status: Open
Priority: Low
- Title: SVCALLS AND HARDFAULTS
- Description: The Cortex-M3 user context switch logic uses SVCall instructions.
- This user context switching time could be improved by eliminating
- the SVCalls and developing assembly language implementations
- of the context save and restore logic.
- Also, because interrupts are always disabled when the SVCall is
- executed, the SVC goes to the hard fault handler where it must
- be handled as a special case. I recall seeing some controls
- somewhere that will allow to suppress one hard fault. I don't
- recall the control, but something like this should be used before
- executing the SVCall so that it vectors directly to the SVC
- handler.
- Another, more standard option would be to use interrupt priority
- levels to control interrupts. In that case, (1) The SVC would
- be the highest priority interrupt (0), (2) irqsave() would set
- the interrupt mask level to just above that, and (2) irqrestore
- would restore the interrupt level. This would not be diffult,
- but does affect a lot of files!
- Status: Open
- Priority: Low
-
Title: ARM INTERRUPTS AND USER MODE
Description: The ARM interrupt handling (arch/arm/src/arm/up_vectors.S) returns
using 'ldmia sp, {r0-r15}^' My understanding is that this works