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author | Gregory Nutt <gnutt@nuttx.org> | 2014-08-10 13:11:31 -0600 |
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committer | Gregory Nutt <gnutt@nuttx.org> | 2014-08-10 13:11:31 -0600 |
commit | f73988dd9b1e4c6ae096871b1f98024827b2f82b (patch) | |
tree | dece4595d00fe6bbba94f165ea7253c9ad638a52 | |
parent | 8d3575ca890cd84fba197e21d96e9e60fd965b8e (diff) | |
download | nuttx-f73988dd9b1e4c6ae096871b1f98024827b2f82b.tar.gz nuttx-f73988dd9b1e4c6ae096871b1f98024827b2f82b.tar.bz2 nuttx-f73988dd9b1e4c6ae096871b1f98024827b2f82b.zip |
Cosmetic changed, updated README files, improved comments
-rw-r--r-- | apps/nshlib/nsh_proccmds.c | 1 | ||||
-rw-r--r-- | nuttx/arch/arm/src/sama5/sam_tickless.c | 21 | ||||
-rw-r--r-- | nuttx/configs/sama5d3-xplained/README.txt | 23 | ||||
-rw-r--r-- | nuttx/configs/sama5d3x-ek/README.txt | 23 | ||||
-rw-r--r-- | nuttx/configs/sama5d4-ek/README.txt | 23 |
5 files changed, 91 insertions, 0 deletions
diff --git a/apps/nshlib/nsh_proccmds.c b/apps/nshlib/nsh_proccmds.c index 399609688..0d57777d3 100644 --- a/apps/nshlib/nsh_proccmds.c +++ b/apps/nshlib/nsh_proccmds.c @@ -440,6 +440,7 @@ int cmd_sleep(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) nsh_output(vtbl, g_fmtarginvalid, argv[0]); return ERROR; } + sleep(secs); return OK; } diff --git a/nuttx/arch/arm/src/sama5/sam_tickless.c b/nuttx/arch/arm/src/sama5/sam_tickless.c index 5999e88fd..68b6a30b5 100644 --- a/nuttx/arch/arm/src/sama5/sam_tickless.c +++ b/nuttx/arch/arm/src/sama5/sam_tickless.c @@ -54,6 +54,27 @@ * logic when the interval timer expires. * ****************************************************************************/ +/**************************************************************************** + * SAMA5 Timer Usage + * + * This current implementation uses two timers: A one-shot timer to provide + * the timed events and a free running timer to provide the current time. + * Since timers are a limited resource, that could be an issue on some + * systems. + * + * We could do the job with a single timer if we were to keep the single + * timer in a free-running at all times. The SAMA5 timer/counters have + * 32-bit counters with the capability to generate a compare interrupt when + * the timer matches a compare value but also to continue counting without + * stopping (giving another, different interrupt when the timer rolls over + * from 0xffffffff to zero). So we could potentially just set the compare + * at the number of ticks you want PLUS the current value of timer. Then + * you could have both with a single timer: An interval timer and a free- + * running counter with the same timer! + * + * Patches are welcome! + * + ****************************************************************************/ /**************************************************************************** * Included Files diff --git a/nuttx/configs/sama5d3-xplained/README.txt b/nuttx/configs/sama5d3-xplained/README.txt index 4b51cbc4d..3faf04e0f 100644 --- a/nuttx/configs/sama5d3-xplained/README.txt +++ b/nuttx/configs/sama5d3-xplained/README.txt @@ -2332,6 +2332,8 @@ TRNG and /dev/random Tickless OS =========== + Background + ---------- By default, a NuttX configuration uses a periodic timer interrupt that drives all system timing. The timer is provided by architecture-specifi code that calls into NuttX at a rate controlled by CONFIG_USEC_PER_TICK. @@ -2368,6 +2370,8 @@ Tickless OS OS event will occur, program the interval time and wait for it to fire. When the interval time fires, then the scheduled activity is performed. + Configuration + ------------- The following configuration options will enable support for the Tickless OS for the SAMA5D platforms using TC0 channels 0-3 (other timers or timer channels could be used making the obvious substitutions): @@ -2385,6 +2389,25 @@ Tickless OS CONFIG_SAMA5_TICKLESS_FREERUN=1 : Selects TC0 channel 1 for the free- : running timer + SAMA5 Timer Usage + ----------------- + This current implementation uses two timers: A one-shot timer to + provide the timed events and a free running timer to provide the current + time. Since timers are a limited resource, that could be an issue on + some systems. + + We could do the job with a single timer if we were to keep the single + timer in a free-running at all times. The SAMA5 timer/counters have + 32-bit counters with the capability to generate a compare interrupt when + the timer matches a compare value but also to continue counting without + stopping (giving another, different interrupt when the timer rolls over + from 0xffffffff to zero). So we could potentially just set the compare + at the number of ticks you want PLUS the current value of timer. Then + you could have both with a single timer: An interval timer and a free- + running counter with the same timer! + + Patches are welcome! + I2S Audio Support ================= diff --git a/nuttx/configs/sama5d3x-ek/README.txt b/nuttx/configs/sama5d3x-ek/README.txt index 265bc7d36..9cc88abdf 100644 --- a/nuttx/configs/sama5d3x-ek/README.txt +++ b/nuttx/configs/sama5d3x-ek/README.txt @@ -2648,6 +2648,8 @@ Touchscreen Testing Tickless OS =========== + Background + ---------- By default, a NuttX configuration uses a periodic timer interrupt that drives all system timing. The timer is provided by architecture-specifi code that calls into NuttX at a rate controlled by CONFIG_USEC_PER_TICK. @@ -2684,6 +2686,8 @@ Tickless OS OS event will occur, program the interval time and wait for it to fire. When the interval time fires, then the scheduled activity is performed. + Configuration + ------------- The following configuration options will enable support for the Tickless OS for the SAMA5D platforms using TC0 channels 0-3 (other timers or timer channels could be used making the obvious substitutions): @@ -2701,6 +2705,25 @@ Tickless OS CONFIG_SAMA5_TICKLESS_FREERUN=1 : Selects TC0 channel 1 for the free- : running timer + SAMA5 Timer Usage + ----------------- + This current implementation uses two timers: A one-shot timer to + provide the timed events and a free running timer to provide the current + time. Since timers are a limited resource, that could be an issue on + some systems. + + We could do the job with a single timer if we were to keep the single + timer in a free-running at all times. The SAMA5 timer/counters have + 32-bit counters with the capability to generate a compare interrupt when + the timer matches a compare value but also to continue counting without + stopping (giving another, different interrupt when the timer rolls over + from 0xffffffff to zero). So we could potentially just set the compare + at the number of ticks you want PLUS the current value of timer. Then + you could have both with a single timer: An interval timer and a free- + running counter with the same timer! + + Patches are welcome! + OV2640 Camera Interface ======================= diff --git a/nuttx/configs/sama5d4-ek/README.txt b/nuttx/configs/sama5d4-ek/README.txt index 7d0cb70ba..a2c81e53c 100644 --- a/nuttx/configs/sama5d4-ek/README.txt +++ b/nuttx/configs/sama5d4-ek/README.txt @@ -3112,6 +3112,8 @@ TM7000 LCD/Touchscreen Tickless OS =========== + Background + ---------- By default, a NuttX configuration uses a periodic timer interrupt that drives all system timing. The timer is provided by architecture-specifi code that calls into NuttX at a rate controlled by CONFIG_USEC_PER_TICK. @@ -3148,6 +3150,8 @@ Tickless OS OS event will occur, program the interval time and wait for it to fire. When the interval time fires, then the scheduled activity is performed. + Configuration + ------------- The following configuration options will enable support for the Tickless OS for the SAMA5D platforms using TC0 channels 0-3 (other timers or timer channels could be used making the obvious substitutions): @@ -3165,6 +3169,25 @@ Tickless OS CONFIG_SAMA5_TICKLESS_FREERUN=1 : Selects TC0 channel 1 for the free- : running timer + SAMA5 Timer Usage + ----------------- + This current implementation uses two timers: A one-shot timer to + provide the timed events and a free running timer to provide the current + time. Since timers are a limited resource, that could be an issue on + some systems. + + We could do the job with a single timer if we were to keep the single + timer in a free-running at all times. The SAMA5 timer/counters have + 32-bit counters with the capability to generate a compare interrupt when + the timer matches a compare value but also to continue counting without + stopping (giving another, different interrupt when the timer rolls over + from 0xffffffff to zero). So we could potentially just set the compare + at the number of ticks you want PLUS the current value of timer. Then + you could have both with a single timer: An interval timer and a free- + running counter with the same timer! + + Patches are welcome! + SAMA4D4-EK Configuration Options ================================= |