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authorGregory Nutt <gnutt@nuttx.org>2014-12-18 11:52:06 -0600
committerGregory Nutt <gnutt@nuttx.org>2014-12-18 11:52:06 -0600
commit1dd3e95b6eb4c674f5eeb4b73f09ca9a97760d73 (patch)
tree2d275f002a830998116adbca70c0a043fe337ad4
parent5fbc5a47d4e15adeabe0881d5f972267c3ddb31b (diff)
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Tiva: Add GPIO interrupt support for the TMS4C129X
-rw-r--r--nuttx/arch/arm/include/tiva/irq.h88
-rw-r--r--nuttx/arch/arm/src/tiva/tiva_gpio.c2
-rw-r--r--nuttx/arch/arm/src/tiva/tiva_gpio.h2
-rw-r--r--nuttx/arch/arm/src/tiva/tiva_gpioirq.c183
4 files changed, 261 insertions, 14 deletions
diff --git a/nuttx/arch/arm/include/tiva/irq.h b/nuttx/arch/arm/include/tiva/irq.h
index 62cf1eb67..a6add0e74 100644
--- a/nuttx/arch/arm/include/tiva/irq.h
+++ b/nuttx/arch/arm/include/tiva/irq.h
@@ -47,6 +47,44 @@
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
+/* The TM4C123x and TM4C129x support interrupts only on port P and Q */
+
+#if defined(CONFIG_ARCH_CHIP_TM4C)
+# undef CONFIG_TIVA_DISABLE_GPIOA_IRQS
+# undef CONFIG_TIVA_DISABLE_GPIOB_IRQS
+# undef CONFIG_TIVA_DISABLE_GPIOC_IRQS
+# undef CONFIG_TIVA_DISABLE_GPIOD_IRQS
+# undef CONFIG_TIVA_DISABLE_GPIOE_IRQS
+# undef CONFIG_TIVA_DISABLE_GPIOF_IRQS
+# undef CONFIG_TIVA_DISABLE_GPIOG_IRQS
+# undef CONFIG_TIVA_DISABLE_GPIOH_IRQS
+# undef CONFIG_TIVA_DISABLE_GPIOJ_IRQS
+# undef CONFIG_TIVA_DISABLE_GPIOK_IRQS
+# undef CONFIG_TIVA_DISABLE_GPIOL_IRQS
+# undef CONFIG_TIVA_DISABLE_GPIOM_IRQS
+# undef CONFIG_TIVA_DISABLE_GPION_IRQS
+# undef CONFIG_TIVA_DISABLE_GPIOR_IRQS
+# undef CONFIG_TIVA_DISABLE_GPIOS_IRQS
+# undef CONFIG_TIVA_DISABLE_GPIOT_IRQS
+
+# define CONFIG_TIVA_DISABLE_GPIOA_IRQS 1
+# define CONFIG_TIVA_DISABLE_GPIOB_IRQS 1
+# define CONFIG_TIVA_DISABLE_GPIOC_IRQS 1
+# define CONFIG_TIVA_DISABLE_GPIOD_IRQS 1
+# define CONFIG_TIVA_DISABLE_GPIOE_IRQS 1
+# define CONFIG_TIVA_DISABLE_GPIOF_IRQS 1
+# define CONFIG_TIVA_DISABLE_GPIOG_IRQS 1
+# define CONFIG_TIVA_DISABLE_GPIOH_IRQS 1
+# define CONFIG_TIVA_DISABLE_GPIOJ_IRQS 1
+# define CONFIG_TIVA_DISABLE_GPIOK_IRQS 1
+# define CONFIG_TIVA_DISABLE_GPIOL_IRQS 1
+# define CONFIG_TIVA_DISABLE_GPIOM_IRQS 1
+# define CONFIG_TIVA_DISABLE_GPION_IRQS 1
+# define CONFIG_TIVA_DISABLE_GPIOR_IRQS 1
+# define CONFIG_TIVA_DISABLE_GPIOS_IRQS 1
+# define CONFIG_TIVA_DISABLE_GPIOT_IRQS 1
+#endif
+
/* Mark GPIO interrupts as disabled for non-existent GPIO ports. */
#if TIVA_NPORTS < 1 && !defined(CONFIG_TIVA_DISABLE_GPIOA_IRQS)
@@ -79,6 +117,12 @@
# define CONFIG_TIVA_DISABLE_GPIOP_IRQS
#elif TIVA_NPORTS < 15 && !defined(CONFIG_TIVA_DISABLE_GPIOQ_IRQS)
# define CONFIG_TIVA_DISABLE_GPIOQ_IRQS
+#elif TIVA_NPORTS < 16 && !defined(CONFIG_TIVA_DISABLE_GPIOQ_IRQS)
+# define CONFIG_TIVA_DISABLE_GPIOQ_IRQS
+#elif TIVA_NPORTS < 17 && !defined(CONFIG_TIVA_DISABLE_GPIOQ_IRQS)
+# define CONFIG_TIVA_DISABLE_GPIOQ_IRQS
+#elif TIVA_NPORTS < 18 && !defined(CONFIG_TIVA_DISABLE_GPIOQ_IRQS)
+# define CONFIG_TIVA_DISABLE_GPIOQ_IRQS
#endif
/* Processor Exceptions (vectors 0-15) */
@@ -325,7 +369,49 @@
# define _NGPIOQIRQS _NGPIOPIRQS
#endif
-#define NR_GPIO_IRQS (_NGPIOQIRQS - NR_IRQS)
+#if !defined(CONFIG_TIVA_DISABLE_GPIOR_IRQS)
+# define TIVA_IRQ_GPIOR_0 (_NGPIOQIRQS + 0)
+# define TIVA_IRQ_GPIOR_1 (_NGPIOQIRQS + 1)
+# define TIVA_IRQ_GPIOR_2 (_NGPIOQIRQS + 2)
+# define TIVA_IRQ_GPIOR_3 (_NGPIOQIRQS + 3)
+# define TIVA_IRQ_GPIOR_4 (_NGPIOQIRQS + 4)
+# define TIVA_IRQ_GPIOR_5 (_NGPIOQIRQS + 5)
+# define TIVA_IRQ_GPIOR_6 (_NGPIOQIRQS + 6)
+# define TIVA_IRQ_GPIOR_7 (_NGPIOQIRQS + 7)
+# define _NGPIORIRQS (_NGPIOQIRQS + 8)
+#else
+# define _NGPIORIRQS _NGPIOQIRQS
+#endif
+
+#if !defined(CONFIG_TIVA_DISABLE_GPIOS_IRQS)
+# define TIVA_IRQ_GPIOS_0 (_NGPIORIRQS + 0)
+# define TIVA_IRQ_GPIOS_1 (_NGPIORIRQS + 1)
+# define TIVA_IRQ_GPIOS_2 (_NGPIORIRQS + 2)
+# define TIVA_IRQ_GPIOS_3 (_NGPIORIRQS + 3)
+# define TIVA_IRQ_GPIOS_4 (_NGPIORIRQS + 4)
+# define TIVA_IRQ_GPIOS_5 (_NGPIORIRQS + 5)
+# define TIVA_IRQ_GPIOS_6 (_NGPIORIRQS + 6)
+# define TIVA_IRQ_GPIOS_7 (_NGPIORIRQS + 7)
+# define _NGPIOSIRQS (_NGPIORIRQS + 8)
+#else
+# define _NGPIOSIRQS _NGPIORIRQS
+#endif
+
+#if !defined(CONFIG_TIVA_DISABLE_GPIOT_IRQS)
+# define TIVA_IRQ_GPIOT_0 (_NGPIOSIRQS + 0)
+# define TIVA_IRQ_GPIOT_1 (_NGPIOSIRQS + 1)
+# define TIVA_IRQ_GPIOT_2 (_NGPIOSIRQS + 2)
+# define TIVA_IRQ_GPIOT_3 (_NGPIOSIRQS + 3)
+# define TIVA_IRQ_GPIOT_4 (_NGPIOSIRQS + 4)
+# define TIVA_IRQ_GPIOT_5 (_NGPIOSIRQS + 5)
+# define TIVA_IRQ_GPIOT_6 (_NGPIOSIRQS + 6)
+# define TIVA_IRQ_GPIOT_7 (_NGPIOSIRQS + 7)
+# define _NGPIOTIRQS (_NGPIOSIRQS + 8)
+#else
+# define _NGPIOTIRQS _NGPIOSIRQS
+#endif
+
+#define NR_GPIO_IRQS (_NGPIOTIRQS - NR_IRQS)
/************************************************************************************
* Public Types
diff --git a/nuttx/arch/arm/src/tiva/tiva_gpio.c b/nuttx/arch/arm/src/tiva/tiva_gpio.c
index 5c8f61d71..faf141905 100644
--- a/nuttx/arch/arm/src/tiva/tiva_gpio.c
+++ b/nuttx/arch/arm/src/tiva/tiva_gpio.c
@@ -927,7 +927,7 @@ void tiva_gpiowrite(uint32_t pinset, bool value)
*
****************************************************************************/
-bool tiva_gpioread(uint32_t pinset, bool value)
+bool tiva_gpioread(uint32_t pinset)
{
unsigned int port;
unsigned int pinno;
diff --git a/nuttx/arch/arm/src/tiva/tiva_gpio.h b/nuttx/arch/arm/src/tiva/tiva_gpio.h
index 8e82e1010..5e194aac2 100644
--- a/nuttx/arch/arm/src/tiva/tiva_gpio.h
+++ b/nuttx/arch/arm/src/tiva/tiva_gpio.h
@@ -249,7 +249,7 @@ void tiva_gpiowrite(uint32_t pinset, bool value);
*
************************************************************************************/
-bool tiva_gpioread(uint32_t pinset, bool value);
+bool tiva_gpioread(uint32_t pinset);
/************************************************************************************
* Function: tiva_dumpgpio
diff --git a/nuttx/arch/arm/src/tiva/tiva_gpioirq.c b/nuttx/arch/arm/src/tiva/tiva_gpioirq.c
index 9e99d5e43..bb50df4ab 100644
--- a/nuttx/arch/arm/src/tiva/tiva_gpioirq.c
+++ b/nuttx/arch/arm/src/tiva/tiva_gpioirq.c
@@ -68,36 +68,98 @@ static FAR xcpt_t g_gpioirqvector[NR_GPIO_IRQS];
* must carefully match the IRQ numbers assigned in arch/arm/include/lm3s/irq.h
*/
+#define COMMA
static const uintptr_t g_gpiobase[] =
{
#ifndef CONFIG_TIVA_DISABLE_GPIOA_IRQS
- TIVA_GPIOA_BASE
-#else
- 0
+ COMMA TIVA_GPIOA_BASE
+#undef COMMA
+#define COMMA ,
#endif
#ifndef CONFIG_TIVA_DISABLE_GPIOB_IRQS
- , TIVA_GPIOB_BASE
+ COMMA TIVA_GPIOB_BASE
+#undef COMMA
+#define COMMA ,
#endif
#ifndef CONFIG_TIVA_DISABLE_GPIOC_IRQS
- , TIVA_GPIOC_BASE
+ COMMA TIVA_GPIOC_BASE
+#undef COMMA
+#define COMMA ,
#endif
#ifndef CONFIG_TIVA_DISABLE_GPIOD_IRQS
- , TIVA_GPIOD_BASE
+ COMMA TIVA_GPIOD_BASE
+#undef COMMA
+#define COMMA ,
#endif
#ifndef CONFIG_TIVA_DISABLE_GPIOE_IRQS
- , TIVA_GPIOE_BASE
+ COMMA TIVA_GPIOE_BASE
+#undef COMMA
+#define COMMA ,
#endif
#ifndef CONFIG_TIVA_DISABLE_GPIOF_IRQS
- , TIVA_GPIOF_BASE
+ COMMA TIVA_GPIOF_BASE
+#undef COMMA
+#define COMMA ,
#endif
#ifndef CONFIG_TIVA_DISABLE_GPIOG_IRQS
- , TIVA_GPIOG_BASE
+ COMMA TIVA_GPIOG_BASE
+#undef COMMA
+#define COMMA ,
#endif
#ifndef CONFIG_TIVA_DISABLE_GPIOH_IRQS
- , TIVA_GPIOH_BASE
+ COMMA TIVA_GPIOH_BASE
+#undef COMMA
+#define COMMA ,
#endif
#ifndef CONFIG_TIVA_DISABLE_GPIOJ_IRQS
- , TIVA_GPIOJ_BASE
+ COMMA TIVA_GPIOJ_BASE
+#undef COMMA
+#define COMMA ,
+#endif
+#ifndef CONFIG_TIVA_DISABLE_GPIOK_IRQS
+ COMMA TIVA_GPIOK_BASE
+#undef COMMA
+#define COMMA ,
+#endif
+#ifndef CONFIG_TIVA_DISABLE_GPIOL_IRQS
+ COMMA TIVA_GPIOL_BASE
+#undef COMMA
+#define COMMA ,
+#endif
+#ifndef CONFIG_TIVA_DISABLE_GPIOM_IRQS
+ COMMA TIVA_GPIOM_BASE
+#undef COMMA
+#define COMMA ,
+#endif
+#ifndef CONFIG_TIVA_DISABLE_GPION_IRQS
+ COMMA TIVA_GPION_BASE
+#undef COMMA
+#define COMMA ,
+#endif
+#ifndef CONFIG_TIVA_DISABLE_GPIOP_IRQS
+ COMMA TIVA_GPIOP_BASE
+#undef COMMA
+#define COMMA ,
+#endif
+#ifndef CONFIG_TIVA_DISABLE_GPIOQ_IRQS
+ COMMA TIVA_GPIOQ_BASE
+#undef COMMA
+#define COMMA ,
+#endif
+#ifndef CONFIG_TIVA_DISABLE_GPIOR_IRQS
+ COMMA TIVA_GPIOR_BASE
+#undef COMMA
+#define COMMA ,
+#endif
+#ifndef CONFIG_TIVA_DISABLE_GPIOS_IRQS
+ COMMA TIVA_GPIOS_BASE
+#undef COMMA
+#define COMMA ,
+#endif
+#ifndef CONFIG_TIVA_DISABLE_GPIOT_IRQS
+ COMMA TIVA_GPIOT_BASE
+#undef COMMA
+#define COMMA ,
#endif
};
@@ -241,6 +303,69 @@ static int tiva_gpiojhandler(int irq, FAR void *context)
}
#endif
+#ifndef CONFIG_TIVA_DISABLE_GPIOK_IRQS
+static int tiva_gpiokhandler(int irq, FAR void *context)
+{
+ return tiva_gpiohandler(TIVA_GPIOK_BASE, TIVA_IRQ_GPIOK_0, context);
+}
+#endif
+
+#ifndef CONFIG_TIVA_DISABLE_GPIOL_IRQS
+static int tiva_gpiolhandler(int irq, FAR void *context)
+{
+ return tiva_gpiohandler(TIVA_GPIOL_BASE, TIVA_IRQ_GPIOL_0, context);
+}
+#endif
+
+#ifndef CONFIG_TIVA_DISABLE_GPIOM_IRQS
+static int tiva_gpiomhandler(int irq, FAR void *context)
+{
+ return tiva_gpiohandler(TIVA_GPIOM_BASE, TIVA_IRQ_GPIOM_0, context);
+}
+#endif
+
+#ifndef CONFIG_TIVA_DISABLE_GPION_IRQS
+static int tiva_gpionhandler(int irq, FAR void *context)
+{
+ return tiva_gpiohandler(TIVA_GPION_BASE, TIVA_IRQ_GPION_0, context);
+}
+#endif
+
+#ifndef CONFIG_TIVA_DISABLE_GPIOP_IRQS
+static int tiva_gpiophandler(int irq, FAR void *context)
+{
+ return tiva_gpiohandler(TIVA_GPIOP_BASE, TIVA_IRQ_GPIOP_0, context);
+}
+#endif
+
+#ifndef CONFIG_TIVA_DISABLE_GPIOQ_IRQS
+static int tiva_gpioqhandler(int irq, FAR void *context)
+{
+ return tiva_gpiohandler(TIVA_GPIOQ_BASE, TIVA_IRQ_GPIOQ_0, context);
+}
+#endif
+
+#ifndef CONFIG_TIVA_DISABLE_GPIOR_IRQS
+static int tiva_gpiorhandler(int irq, FAR void *context)
+{
+ return tiva_gpiohandler(TIVA_GPIOR_BASE, TIVA_IRQ_GPIOR_0, context);
+}
+#endif
+
+#ifndef CONFIG_TIVA_DISABLE_GPIOS_IRQS
+static int tiva_gpioshandler(int irq, FAR void *context)
+{
+ return tiva_gpiohandler(TIVA_GPIOS_BASE, TIVA_IRQ_GPIOS_0, context);
+}
+#endif
+
+#ifndef CONFIG_TIVA_DISABLE_GPIOT_IRQS
+static int tiva_gpiothandler(int irq, FAR void *context)
+{
+ return tiva_gpiohandler(TIVA_GPIOT_BASE, TIVA_IRQ_GPIOT_0, context);
+}
+#endif
+
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -304,6 +429,42 @@ int gpio_irqinitialize(void)
irq_attach(TIVA_IRQ_GPIOJ, tiva_gpiojhandler);
up_enable_irq(TIVA_IRQ_GPIOJ);
#endif
+#ifndef CONFIG_TIVA_DISABLE_GPIOK_IRQS
+ irq_attach(TIVA_IRQ_GPIOK, tiva_gpiokhandler);
+ up_enable_irq(TIVA_IRQ_GPIOK);
+#endif
+#ifndef CONFIG_TIVA_DISABLE_GPIOL_IRQS
+ irq_attach(TIVA_IRQ_GPIOL, tiva_gpiolhandler);
+ up_enable_irq(TIVA_IRQ_GPIOL);
+#endif
+#ifndef CONFIG_TIVA_DISABLE_GPIOM_IRQS
+ irq_attach(TIVA_IRQ_GPIOM, tiva_gpiomhandler);
+ up_enable_irq(TIVA_IRQ_GPIOM);
+#endif
+#ifndef CONFIG_TIVA_DISABLE_GPION_IRQS
+ irq_attach(TIVA_IRQ_GPION, tiva_gpionhandler);
+ up_enable_irq(TIVA_IRQ_GPION);
+#endif
+#ifndef CONFIG_TIVA_DISABLE_GPIOP_IRQS
+ irq_attach(TIVA_IRQ_GPIOP, tiva_gpiophandler);
+ up_enable_irq(TIVA_IRQ_GPIOP);
+#endif
+#ifndef CONFIG_TIVA_DISABLE_GPIOQ_IRQS
+ irq_attach(TIVA_IRQ_GPIOQ, tiva_gpioqhandler);
+ up_enable_irq(TIVA_IRQ_GPIOQ);
+#endif
+#ifndef CONFIG_TIVA_DISABLE_GPIOR_IRQS
+ irq_attach(TIVA_IRQ_GPIOR, tiva_gpiorhandler);
+ up_enable_irq(TIVA_IRQ_GPIOR);
+#endif
+#ifndef CONFIG_TIVA_DISABLE_GPIOS_IRQS
+ irq_attach(TIVA_IRQ_GPIOS, tiva_gpioshandler);
+ up_enable_irq(TIVA_IRQ_GPIOS);
+#endif
+#ifndef CONFIG_TIVA_DISABLE_GPIOT_IRQS
+ irq_attach(TIVA_IRQ_GPIOT, tiva_gpiothandler);
+ up_enable_irq(TIVA_IRQ_GPIOT);
+#endif
return OK;
}