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authorGregory Nutt <gnutt@nuttx.org>2014-06-18 08:24:53 -0600
committerGregory Nutt <gnutt@nuttx.org>2014-06-18 08:24:53 -0600
commit22e8bd4f98bafbdcec1a345ea7bedce24781d400 (patch)
tree86ad68e6b5b70fb746a5ddb2354b6b5ca7e760bf
parent471a94cdee236f64c02695ff6cb821e3538a2dc6 (diff)
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Cosmetic cleanup
-rw-r--r--nuttx/arch/arm/src/sama5/sam_xdmac.c16
-rw-r--r--nuttx/libc/Kconfig6
2 files changed, 6 insertions, 16 deletions
diff --git a/nuttx/arch/arm/src/sama5/sam_xdmac.c b/nuttx/arch/arm/src/sama5/sam_xdmac.c
index 1bc0242c6..692617221 100644
--- a/nuttx/arch/arm/src/sama5/sam_xdmac.c
+++ b/nuttx/arch/arm/src/sama5/sam_xdmac.c
@@ -104,11 +104,6 @@
# define CONFIG_SAMA5_NLLDESC SAM_NDMACHAN
#endif
-/* Register values **********************************************************/
-
-#define XDMAC_CH_CC_BOTHDSCR \
- (XDMAC_CH_CC_SRCDSCR | XDMAC_CH_CC_DSTDSCR)
-
/****************************************************************************
* Private Types
****************************************************************************/
@@ -135,7 +130,7 @@ struct sam_xdmach_s
uint32_t cc; /* Pre-calculated CC register for transfer */
dma_callback_t callback; /* Callback invoked when the DMA completes */
void *arg; /* Argument passed to callback function */
- uint32_t rxaddr; /* RX memory address */
+ uint32_t rxaddr; /* RX memory address to be invalidated */
size_t rxsize; /* Size of RX memory region */
struct chnext_view1_s *llhead; /* DMA link list head */
struct chnext_view1_s *lltail; /* DMA link list head */
@@ -931,7 +926,8 @@ static size_t sam_maxtransfer(struct sam_xdmach_s *xdmach)
*
****************************************************************************/
-static uint32_t sam_ntxtransfers(struct sam_xdmach_s *xdmach, uint32_t dmasize)
+static uint32_t sam_ntxtransfers(struct sam_xdmach_s *xdmach,
+ uint32_t dmasize)
{
unsigned int srcwidth;
@@ -1653,12 +1649,6 @@ static inline int sam_multiple(struct sam_xdmach_s *xdmach)
DEBUGASSERT(llhead != NULL && llhead->csa != 0);
- /* Check the first and last Channel Control (CC) Register values */
-
- DEBUGASSERT((llhead->cc & XDMAC_CH_CC_BOTHDSCR) == 0);
- DEBUGASSERT((xdmach->lltail->cc & XDMAC_CH_CC_BOTHDSCR) ==
- XDMAC_CH_CC_BOTHDSCR);
-
/* 1. Read the XDMAC Global Channel Status Register (XDMAC_GS) to choose a
* free channel.
*
diff --git a/nuttx/libc/Kconfig b/nuttx/libc/Kconfig
index 738080ac7..0c6075432 100644
--- a/nuttx/libc/Kconfig
+++ b/nuttx/libc/Kconfig
@@ -197,7 +197,7 @@ config ARCH_ROMGETC
default n
---help---
In Harvard architectures, data accesses and instruction accesses
- occur on different busses, perhaps concurrently. All data accesses
+ occur on different buses, perhaps concurrently. All data accesses
are performed on the data bus unless special machine instructions
are used to read data from the instruction address space. Also, in
the typical MCU, the available SRAM data memory is much smaller that
@@ -210,8 +210,8 @@ config ARCH_ROMGETC
the function up_romgetc(). up_romgetc() will simply read one byte
of data from the instruction space.
- If ARCH_ROMGETC, certain C stdio functions are effected: (1) All
- format strings in printf, fprintf, sprintf, etc. are assumed to lie
+ If ARCH_ROMGETC is selected, certain C stdio functions are effected: (1)
+ All format strings in printf, fprintf, sprintf, etc. are assumed to lie
in FLASH (string arguments for %s are still assumed to reside in SRAM).
And (2), the string argument to puts and fputs is assumed to reside
in FLASH. Clearly, these assumptions may have to modified for the