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authorGregory Nutt <gnutt@nuttx.org>2013-08-26 11:05:23 -0600
committerGregory Nutt <gnutt@nuttx.org>2013-08-26 11:05:23 -0600
commit7f18b02e9ce6872998169cd849def297a76435b2 (patch)
tree81475f09fb0c6fcb84ff6a0ffb345c56c9547785
parentd94a7d54fbfbd086c19f274b4657d9994d2b6db5 (diff)
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SAMA5 EHCI: Taking direction from wrong bit in SETUP request; need to flush data buffer before starting SETUP request
-rwxr-xr-xnuttx/arch/arm/src/sama5/sam_ehci.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/nuttx/arch/arm/src/sama5/sam_ehci.c b/nuttx/arch/arm/src/sama5/sam_ehci.c
index 02f99fee2..0076563d7 100755
--- a/nuttx/arch/arm/src/sama5/sam_ehci.c
+++ b/nuttx/arch/arm/src/sama5/sam_ehci.c
@@ -1523,6 +1523,18 @@ static int sam_qtd_addbpl(struct sam_qtd_s *qtd, const void *buffer, size_t bufl
uint32_t next;
int ndx;
+ /* Flush the contents of the data buffer to RAM so that the correct contents
+ * will be accessed for an OUT DMA.
+ */
+
+ cp15_coherent_dcache((uintptr_t)buffer, (uintptr_t)buffer + buflen);
+
+ /* Loop, adding the aligned physical addresses of the buffer to the buffer page
+ * list. Only the first entry need not be aligned (because only the first
+ * entry has the offset field). The subsequent entries must begin on 4KB
+ * address boundaries.
+ */
+
physaddr = (uint32_t)sam_physramaddr((uintptr_t)buffer);
for (ndx = 0; ndx < 5; ndx++)
@@ -1825,7 +1837,7 @@ static ssize_t sam_async_transfer(struct sam_rhport_s *rhport,
datapid = QTD_TOKEN_PID_OUT;
if (req)
{
- if ((req->req & USB_REQ_DIR_MASK) == USB_REQ_DIR_IN)
+ if ((req->type & USB_REQ_DIR_MASK) == USB_REQ_DIR_IN)
{
datapid = QTD_TOKEN_PID_IN;
}