summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorGregory Nutt <gnutt@nuttx.org>2014-12-12 07:43:32 -0600
committerGregory Nutt <gnutt@nuttx.org>2014-12-12 07:43:32 -0600
commite60720d98103edc1cd72e5d8ae960511facbf5c8 (patch)
tree77c2ba7e432595f2daed4c53f5e1ab3772ccba0c
parent41899728e94682f5bb7573d3368b82f22584d0fd (diff)
downloadnuttx-e60720d98103edc1cd72e5d8ae960511facbf5c8.tar.gz
nuttx-e60720d98103edc1cd72e5d8ae960511facbf5c8.tar.bz2
nuttx-e60720d98103edc1cd72e5d8ae960511facbf5c8.zip
STM32 OTGHS Device: Fix for OTGHS core working in FS mode. From Ken Pettit
-rw-r--r--nuttx/arch/arm/src/stm32/stm32_otghsdev.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_otghsdev.c b/nuttx/arch/arm/src/stm32/stm32_otghsdev.c
index beb6431a4..c7e7fdadc 100644
--- a/nuttx/arch/arm/src/stm32/stm32_otghsdev.c
+++ b/nuttx/arch/arm/src/stm32/stm32_otghsdev.c
@@ -5132,6 +5132,14 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv)
stm32_putreg(OTGHS_GAHBCFG_TXFELVL, STM32_OTGHS_GAHBCFG);
+ /* Set the PHYSEL bit in the GUSBCFG register to select the OTG HS serial
+ * transceiver: "This bit is always 1 with write-only access"
+ */
+
+ regval = stm32_getreg(STM32_OTGHS_GUSBCFG);
+ regval |= OTGHS_GUSBCFG_PHYSEL;
+ stm32_putreg(regval, STM32_OTGHS_GUSBCFG);
+
/* Common USB OTG core initialization */
/* Reset after a PHY select and set Host mode. First, wait for AHB master
* IDLE state.