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| author | David Sidrane <david_s5@nscdg.com> | 2015-02-17 11:30:29 -1000 |
|---|---|---|
| committer | David Sidrane <david_s5@nscdg.com> | 2015-02-17 11:30:29 -1000 |
| commit | 33e56f1a3aac0ef5474c57b565bd9f9e8813b2fb (patch) | |
| tree | c3770ee5db58150a2fd3e18427f94d4322b9149e | |
| parent | 8d51b780f611ad73268a41a8d8007f39a344758a (diff) | |
| download | nuttx-33e56f1a3aac0ef5474c57b565bd9f9e8813b2fb.tar.gz nuttx-33e56f1a3aac0ef5474c57b565bd9f9e8813b2fb.tar.bz2 nuttx-33e56f1a3aac0ef5474c57b565bd9f9e8813b2fb.zip | |
Back port spi settings fix: SPE must be disabled before changing setting
| -rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_spi.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_spi.c b/nuttx/arch/arm/src/stm32/stm32_spi.c index b47938470..3b0eaaaa0 100644 --- a/nuttx/arch/arm/src/stm32/stm32_spi.c +++ b/nuttx/arch/arm/src/stm32/stm32_spi.c @@ -1035,7 +1035,9 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency) actual = priv->spiclock >> 8; } + spi_modifycr1(priv, 0, SPI_CR1_SPE); spi_modifycr1(priv, setbits, SPI_CR1_BR_MASK); + spi_modifycr1(priv, SPI_CR1_SPE, 0); /* Save the frequency selection so that subsequent reconfigurations will be * faster. @@ -1110,9 +1112,11 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode) return; } - spi_modifycr1(priv, setbits, clrbits); + spi_modifycr1(priv, 0, SPI_CR1_SPE); + spi_modifycr1(priv, setbits, clrbits); + spi_modifycr1(priv, SPI_CR1_SPE, 0); - /* Save the mode so that subsequent re-configurations will be faster */ + /* Save the mode so that subsequent re-configurations will be faster */ #ifndef CONFIG_SPI_OWNBUS priv->mode = mode; @@ -1155,12 +1159,12 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits) { case 8: setbits = 0; - clrbits = SPI_CR1_DFF; + clrbits = SPI_CR1_DFF|SPI_CR1_LSBFIRST; break; case 16: setbits = SPI_CR1_DFF; - clrbits = 0; + clrbits = SPI_CR1_LSBFIRST; break; default: |