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| author | Gregory Nutt <gnutt@nuttx.org> | 2015-02-23 17:27:28 -0600 |
|---|---|---|
| committer | Gregory Nutt <gnutt@nuttx.org> | 2015-02-23 17:27:28 -0600 |
| commit | 1693e3393ff4d4c049ff8c7e94143a26119ade1c (patch) | |
| tree | b71b627f037a2c8cc8f165f50d09c2556313b17c | |
| parent | 7a127f845182d93d55cf03f8a19dd46435c4569f (diff) | |
| download | nuttx-1693e3393ff4d4c049ff8c7e94143a26119ade1c.tar.gz nuttx-1693e3393ff4d4c049ff8c7e94143a26119ade1c.tar.bz2 nuttx-1693e3393ff4d4c049ff8c7e94143a26119ade1c.zip | |
PIC32MZ: Fix some PLL setup logic
| -rw-r--r-- | nuttx/arch/mips/src/pic32mz/pic32mz-config.h | 16 | ||||
| -rw-r--r-- | nuttx/configs/pic32mz-starterkit/include/board.h | 2 |
2 files changed, 9 insertions, 9 deletions
diff --git a/nuttx/arch/mips/src/pic32mz/pic32mz-config.h b/nuttx/arch/mips/src/pic32mz/pic32mz-config.h index c00062a96..bbbc38381 100644 --- a/nuttx/arch/mips/src/pic32mz/pic32mz-config.h +++ b/nuttx/arch/mips/src/pic32mz/pic32mz-config.h @@ -207,21 +207,21 @@ /* System PLL Divided Input Clock Frequency Range bits */ -#if BOARD_PLL_INPUT < 5000000 -# error BOARD_PLL_INPUT too low +#if (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 5000000 +# error BOARD_PLL_INPUT / BOARD_PLL_IDIV too low # define CONFIG_PIC32MZ_FPLLRNG DEVCFG2_FPLLRNG_BYPASS /* < 5 MHz */ -#elif BOARD_PLL_INPUT < 9000000 +#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 9000000 # define CONFIG_PIC32MZ_FPLLRNG DEVCFG2_FPLLRNG_5_10MHZ /* 5-10 MHz */ -#elif BOARD_PLL_INPUT < 14500000 +#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 14500000 # define CONFIG_PIC32MZ_FPLLRNG DEVCFG2_FPLLRNG_8_16MHZ /* 8-16 MHz */ -#elif BOARD_PLL_INPUT < 23500000 +#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 23500000 # define CONFIG_PIC32MZ_FPLLRNG DEVCFG2_FPLLRNG_13_26MHZ /* 13-26 MHz */ -#elif BOARD_PLL_INPUT < 39000000 +#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 39000000 # define CONFIG_PIC32MZ_FPLLRNG DEVCFG2_FPLLRNG_21_42MHZ /* 21-42 MHz */ -#elif BOARD_PLL_INPUT < 64000000 +#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 64000000 # define CONFIG_PIC32MZ_FPLLRNG DEVCFG2_FPLLRNG_34_64MHZ /* 36-64 MHz */ #else -# error BOARD_PLL_INPUT too high +# error BOARD_PLL_INPUT / BOARD_PLL_IDIV too high # define CONFIG_PIC32MZ_FPLLRNG DEVCFG2_FPLLRNG_34_64MHZ /* 36-64 MHz */ #endif diff --git a/nuttx/configs/pic32mz-starterkit/include/board.h b/nuttx/configs/pic32mz-starterkit/include/board.h index 078309549..6b060f9c3 100644 --- a/nuttx/configs/pic32mz-starterkit/include/board.h +++ b/nuttx/configs/pic32mz-starterkit/include/board.h @@ -59,7 +59,7 @@ /* Oscillator modes */ -#define BOARD_FNOSC_POSC 1 /* Use primary oscillator */ +#define BOARD_FNOSC_SPLL 1 /* Use system PLL */ #define BOARD_POSC_HSMODE 1 /* High-speed crystal (HS) mode */ /* PLL configuration and resulting CPU clock. |