Add SPI, I2C, RTC, and watchdog

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1684 42af7a65-404d-4744-a932-0658087f49c3

5 files changed, 331 insertions, 0 deletions

diff --git a/nuttx/arch/arm/src/imx/chip.h b/nuttx/arch/arm/src/imx/chip.h
index 10d00fc63..192100f6c 100644
--- a/nuttx/arch/arm/src/imx/chip.h
+++ b/nuttx/arch/arm/src/imx/chip.h
@@ -41,7 +41,15 @@
  ************************************************************************************/
 
 #include "imx_memorymap.h"
+#include "imx_wdog.h"
+#include "imx_timer.h"
+#include "imx_rtc.h"
 #include "imx_uart.h"
+#include "imx_dma.h"
+#include "imx_usbd.h"
+#include "imx_i2c.h"
+#include "imx_cspi.h"
+#include "imx_aitc.h"
 
 /************************************************************************************
  * Definitions
diff --git a/nuttx/arch/arm/src/imx/imx_cspi.h b/nuttx/arch/arm/src/imx/imx_cspi.h
new file mode 100755
index 000000000..3feb6d7b0
--- /dev/null
+++ b/nuttx/arch/arm/src/imx/imx_cspi.h
@@ -0,0 +1,88 @@
+/************************************************************************************

+ * arch/arm/src/imx/imx_cspi.h

+ *

+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.

+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>

+ *

+ * Redistribution and use in source and binary forms, with or without

+ * modification, are permitted provided that the following conditions

+ * are met:

+ *

+ * 1. Redistributions of source code must retain the above copyright

+ *    notice, this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above copyright

+ *    notice, this list of conditions and the following disclaimer in

+ *    the documentation and/or other materials provided with the

+ *    distribution.

+ * 3. Neither the name NuttX nor the names of its contributors may be

+ *    used to endorse or promote products derived from this software

+ *    without specific prior written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS

+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT

+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS

+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE

+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,

+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,

+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS

+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED

+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT

+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN

+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE

+ * POSSIBILITY OF SUCH DAMAGE.

+ *

+ ************************************************************************************/

+

+#ifndef __ARCH_ARM_IMX_CSPI_H

+#define __ARCH_ARM_IMX_CSPI_H

+

+/************************************************************************************

+ * Included Files

+ ************************************************************************************/

+ 

+/************************************************************************************

+ * Definitions

+ ************************************************************************************/

+

+/* CSPI Register Offsets ************************************************************/

+

+#define CSPI_SPIRXD_OFFSET         0x0000

+#define CSPI_SPITXD_OFFSET         0x0004

+#define CSPI_SPICONT1_OFFSET       0x0008

+#define CSPI_INTCS_OFFSET          0x000c

+#define CSPI_SPITEST_OFFSET        0x0010

+#define CSPI_SPISPCR_OFFSET        0x0014

+#define CSPI_SPIDMA_OFFSET         0x0018

+#define CSPI_SPIRESET_OFFSET       0x001c

+

+/* CSPI Register Addresses **********************************************************/

+

+/* CSPI1 */

+

+#define IMX_CSPI1_SPIRXD           (IMX_CSPI1_VBASE + CSPI_SPIRXD_OFFSET)

+#define IMX_CSPI1_SPITXD           (IMX_CSPI1_VBASE + CSPI_SPITXD_OFFSET)

+#define IMX_CSPI1_SPICONT1         (IMX_CSPI1_VBASE + CSPI_SPICONT1_OFFSET)

+#define IMX_CSPI1_INTCS            (IMX_CSPI1_VBASE + CSPI_INTCS_OFFSET)

+#define IMX_CSPI1_SPITEST          (IMX_CSPI1_VBASE + CSPI_SPITEST_OFFSET)

+#define IMX_CSPI1_SPISPCR          (IMX_CSPI1_VBASE + CSPI_SPISPCR_OFFSET)

+#define IMX_CSPI1_SPIDMA           (IMX_CSPI1_VBASE + CSPI_SPIDMA_OFFSET)

+#define IMX_CSPI1_SPIRESET         (IMX_CSPI1_VBASE + CSPI_SPIRESET_OFFSET)

+

+/* CSPI1 */

+

+#define IMX_CSPI2_SPIRXD           (IMX_CSPI2_VBASE + CSPI_SPIRXD_OFFSET)

+#define IMX_CSPI2_SPITXD           (IMX_CSPI2_VBASE + CSPI_SPITXD_OFFSET)

+#define IMX_CSPI2_SPICONT1         (IMX_CSPI2_VBASE + CSPI_SPICONT1_OFFSET)

+#define IMX_CSPI2_INTCS            (IMX_CSPI2_VBASE + CSPI_INTCS_OFFSET)

+#define IMX_CSPI2_SPITEST          (IMX_CSPI2_VBASE + CSPI_SPITEST_OFFSET)

+#define IMX_CSPI2_SPISPCR          (IMX_CSPI2_VBASE + CSPI_SPISPCR_OFFSET)

+#define IMX_CSPI2_SPIDMA           (IMX_CSPI2_VBASE + CSPI_SPIDMA_OFFSET)

+#define IMX_CSPI2_SPIRESET         (IMX_CSPI2_VBASE + CSPI_SPIRESET_OFFSET)

+

+/* CSPI Register Bit Definitions ****************************************************/

+

+/************************************************************************************

+ * Inline Functions

+ ************************************************************************************/

+

+#endif  /* __ARCH_ARM_IMX_CSPI_H */

diff --git a/nuttx/arch/arm/src/imx/imx_i2c.h b/nuttx/arch/arm/src/imx/imx_i2c.h
new file mode 100755
index 000000000..b2896b7ee
--- /dev/null
+++ b/nuttx/arch/arm/src/imx/imx_i2c.h
@@ -0,0 +1,69 @@
+/************************************************************************************

+ * arch/arm/src/imx/imx_i2c.h

+ *

+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.

+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>

+ *

+ * Redistribution and use in source and binary forms, with or without

+ * modification, are permitted provided that the following conditions

+ * are met:

+ *

+ * 1. Redistributions of source code must retain the above copyright

+ *    notice, this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above copyright

+ *    notice, this list of conditions and the following disclaimer in

+ *    the documentation and/or other materials provided with the

+ *    distribution.

+ * 3. Neither the name NuttX nor the names of its contributors may be

+ *    used to endorse or promote products derived from this software

+ *    without specific prior written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS

+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT

+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS

+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE

+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,

+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,

+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS

+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED

+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT

+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN

+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE

+ * POSSIBILITY OF SUCH DAMAGE.

+ *

+ ************************************************************************************/

+

+#ifndef __ARCH_ARM_IMX_I2C_H

+#define __ARCH_ARM_IMX_I2C_H

+

+/************************************************************************************

+ * Included Files

+ ************************************************************************************/

+ 

+/************************************************************************************

+ * Definitions

+ ************************************************************************************/

+

+/* I2C Register Offsets *************************************************************/

+

+#define I2C_IADR_OFFSET             0x0000

+#define I2C_IFDR_OFFSET             0x0004

+#define I2C_I2CR_OFFSET             0x0008

+#define I2C_I2SR_OFFSET             0x000c

+#define I2C_I2DR_OFFSET             0x0010

+

+/* I2C Register Addresses ***********************************************************/

+

+#define IMX_I2C_IADR                (IMX_I2C_VBASE + I2C_IADR_OFFSET) 

+#define IMX_I2C_IFDR                (IMX_I2C_VBASE + I2C_IFDR_OFFSET)

+#define IMX_I2C_I2CR                (IMX_I2C_VBASE + I2C_I2CR_OFFSET)

+#define IMX_I2C_I2SR                (IMX_I2C_VBASE + I2C_I2SR_OFFSET) 

+#define IMX_I2C_I2DR                (IMX_I2C_VBASE + I2C_I2DR_OFFSET) 

+

+/* I2C Register Bit Definitions *****************************************************/

+

+/************************************************************************************

+ * Inline Functions

+ ************************************************************************************/

+

+#endif  /* __ARCH_ARM_IMX_I2C_H */

diff --git a/nuttx/arch/arm/src/imx/imx_rtc.h b/nuttx/arch/arm/src/imx/imx_rtc.h
new file mode 100755
index 000000000..68f684fec
--- /dev/null
+++ b/nuttx/arch/arm/src/imx/imx_rtc.h
@@ -0,0 +1,85 @@
+/************************************************************************************

+ * arch/arm/src/imx/imx_rtc.h

+ *

+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.

+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>

+ *

+ * Redistribution and use in source and binary forms, with or without

+ * modification, are permitted provided that the following conditions

+ * are met:

+ *

+ * 1. Redistributions of source code must retain the above copyright

+ *    notice, this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above copyright

+ *    notice, this list of conditions and the following disclaimer in

+ *    the documentation and/or other materials provided with the

+ *    distribution.

+ * 3. Neither the name NuttX nor the names of its contributors may be

+ *    used to endorse or promote products derived from this software

+ *    without specific prior written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS

+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT

+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS

+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE

+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,

+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,

+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS

+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED

+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT

+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN

+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE

+ * POSSIBILITY OF SUCH DAMAGE.

+ *

+ ************************************************************************************/

+

+#ifndef __ARCH_ARM_IMX_RTC_H

+#define __ARCH_ARM_IMX_RTC_H

+

+/************************************************************************************

+ * Included Files

+ ************************************************************************************/

+ 

+/************************************************************************************

+ * Definitions

+ ************************************************************************************/

+

+/* RTC Register Offsets *************************************************************/

+

+#define RTC_HOURMIN_OFFSET           0x0000

+#define RTC_SECOND_OFFSET            0x0004

+#define RTC_ALRM_HM_OFFSET           0x0008

+#define RTC_ALRM_SEC_OFFSET          0x000c

+#define RTC_RTCCTL_OFFSET            0x0010

+#define RTC_RTCISR_OFFSET            0x0014

+#define RTC_RTCIENR_OFFSET           0x0018

+#define RTC_STPWCH_OFFSET            0x001c

+#define RTC_DAYR_OFFSET              0x0020

+#define RTC_DAYALARM_OFFSET          0x0024

+#define RTC_TEST1_OFFSET             0x0028

+#define RTC_TEST2_OFFSET             0x002c

+#define RTC_TEST3_OFFSET             0x0030

+

+/* RTC Register Addresses ***********************************************************/

+

+#define IMX_RTC_HOURMIN             (IMX_RTC_VBASE + RTC_HOURMIN_OFFSET)

+#define IMX_RTC_SECOND              (IMX_RTC_VBASE + RTC_SECOND_OFFSET)

+#define IMX_RTC_ALRM_HM             (IMX_RTC_VBASE + RTC_ALRM_HM_OFFSET)

+#define IMX_RTC_ALRM_SEC            (IMX_RTC_VBASE + RTC_ALRM_SEC_OFFSET)

+#define IMX_RTC_RTCCTL              (IMX_RTC_VBASE + RTC_RTCCTL_OFFSET)

+#define IMX_RTC_RTCISR              (IMX_RTC_VBASE + RTC_RTCISR_OFFSET)

+#define IMX_RTC_RTCIENR             (IMX_RTC_VBASE + RTC_RTCIENR_OFFSET)

+#define IMX_RTC_STPWCH              (IMX_RTC_VBASE + RTC_STPWCH_OFFSET)

+#define IMX_RTC_DAYR                (IMX_RTC_VBASE + RTC_DAYR_OFFSET)

+#define IMX_RTC_DAYALARM            (IMX_RTC_VBASE + RTC_DAYALARM_OFFSET)

+#define IMX_RTC_TEST1               (IMX_RTC_VBASE + RTC_TEST1_OFFSET)

+#define IMX_RTC_TEST2               (IMX_RTC_VBASE + RTC_TEST2_OFFSET)

+#define IMX_RTC_TEST3               (IMX_RTC_VBASE + RTC_TEST3_OFFSET)

+

+/* RTC Register Bit Definitions *****************************************************/

+

+/************************************************************************************

+ * Inline Functions

+ ************************************************************************************/

+

+#endif  /* __ARCH_ARM_IMX_RTC_H */

diff --git a/nuttx/arch/arm/src/imx/imx_wdog.h b/nuttx/arch/arm/src/imx/imx_wdog.h
new file mode 100755
index 000000000..137e67754
--- /dev/null
+++ b/nuttx/arch/arm/src/imx/imx_wdog.h
@@ -0,0 +1,81 @@
+/************************************************************************************

+ * arch/arm/src/imx/imx_wdog.h

+ *

+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.

+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>

+ *

+ * Redistribution and use in source and binary forms, with or without

+ * modification, are permitted provided that the following conditions

+ * are met:

+ *

+ * 1. Redistributions of source code must retain the above copyright

+ *    notice, this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above copyright

+ *    notice, this list of conditions and the following disclaimer in

+ *    the documentation and/or other materials provided with the

+ *    distribution.

+ * 3. Neither the name NuttX nor the names of its contributors may be

+ *    used to endorse or promote products derived from this software

+ *    without specific prior written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS

+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT

+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS

+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE

+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,

+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,

+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS

+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED

+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT

+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN

+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE

+ * POSSIBILITY OF SUCH DAMAGE.

+ *

+ ************************************************************************************/

+

+#ifndef __ARCH_ARM_IMX_WDOG_H

+#define __ARCH_ARM_IMX_WDOG_H

+

+/************************************************************************************

+ * Included Files

+ ************************************************************************************/

+ 

+/************************************************************************************

+ * Definitions

+ ************************************************************************************/

+

+/* WDOG Register Offsets ************************************************************/

+

+#define WDOG_WCR_OFFSET     0x0000 /* Watchdog Control Register */

+#define WDOG_WSR_OFFSET     0x0004 /* Watchdog Service Register */

+#define WDOG_WSTR_OFFSET    0x0008 /* Watchdog Status Register */

+

+/* WDOG Register Addresses **********************************************************/

+

+#define IMX_WDOG_WCR        (IMX_WDOG_VBASE + WDOG_WCR_OFFSET)

+#define IMX_WDOG_WSR        (IMX_WDOG_VBASE + WDOG_WSR_OFFSET)

+#define IMX_WDOG_WSTRT      (IMX_WDOG_VBASE + WDOG_WSTR_OFFSET)

+

+/* WDOG Register Bit Definitions ****************************************************/

+

+/* Watchdog Control Register */

+

+#define WDOG_WCR_WDE        (1 << 0)  /* Bit 0: Watchdog Enable */

+#define WDOG_WCR_WDEC       (1 << 1)  /* Bit 1: Watchdog Enable Control */

+#define WDOG_WCR_SWR        (1 << 2)  /* Bit 2: Software Reset Enable */

+#define WDOG_WCR_TMD        (1 << 3)  /* Bit 3: Test Mode Enable */

+#define WDOG_WCR_WIE        (1 << 4)  /* Bit 4: Watchdog Interrupt Enable */

+#define WDOG_WCR_WT_SHIFT   8 /* Bit 8-14: Watchdog Timeout */

+#define WDOG_WCR_WT_MASK    (0x7f << WDOG_WCR_WT_SHIFT)

+#define WDOG_WCR_WHALT      (1 << 15) /* Bit 15: Watchdog Halt */

+

+/* Watchdog Service Register */

+

+#define WDOG_WSR_SHIFT      0 /* Bit 0-15: Watchdog Service Register */

+#define WDOG_WT_MASK        (0xffff << WDOG_WSR_SHIFT)

+

+/************************************************************************************

+ * Inline Functions

+ ************************************************************************************/

+

+#endif  /* __ARCH_ARM_IMX_WDOG_H */