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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-03-31 22:29:08 +0000 |
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| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-03-31 22:29:08 +0000 |
| commit | 4c40fdb4874a860a924701adab56b360cb7afe87 (patch) | |
| tree | ecdf9d350df4d6b83f736e81be4416a21479eea3 | |
| parent | 5260848cfed189535399989aaf82cf3171704b35 (diff) | |
| download | nuttx-4c40fdb4874a860a924701adab56b360cb7afe87.tar.gz nuttx-4c40fdb4874a860a924701adab56b360cb7afe87.tar.bz2 nuttx-4c40fdb4874a860a924701adab56b360cb7afe87.zip | |
Added I2C register bit definitions
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1673 42af7a65-404d-4744-a932-0658087f49c3
| -rw-r--r-- | nuttx/arch/z80/src/z8/chip.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/nuttx/arch/z80/src/z8/chip.h b/nuttx/arch/z80/src/z8/chip.h index a79bf054a..912dd65e1 100644 --- a/nuttx/arch/z80/src/z8/chip.h +++ b/nuttx/arch/z80/src/z8/chip.h @@ -164,6 +164,31 @@ #define Z8_UARTMDSEL_HWREV HX(e0) /* Bits 5-7=7: LIN-UART Hardware Revision */ /* Bits 0-4: Mode dependent status */ +/* I2C Status Register Bit Definitions **********************************************/ + +#if defined(_Z8FMC16) || defined(_Z8F1680) +#else +# define I2C_STAT_NCKI (1 << 0) /* Bit 0: 1=NACK Interrupt */ +# define I2C_STAT_DSS (1 << 1) /* Bit 1: 1=Data Shift State */ +# define I2C_STAT_TAS (1 << 2) /* Bit 2: 1=Transmit Address State */ +# define I2C_STAT_RD (1 << 3) /* Bit 3: 1=Read */ +# define I2C_STAT_10B (1 << 4) /* Bit 4: 1=10-Bit Address */ +# define I2C_STAT_ACK (1 << 5) /* Bit 5: 1=Acknowledge */ +# define I2C_STAT_RDRF (1 << 6) /* Bit 6: 1=Receive Data Register Full */ +# define I2C_STAT_TDRE (1 << 7) /* Bit 7: 1=Transmit Data Register Empty */ +#endif + +/* I2C Control Register Bit Definitions *********************************************/ + +#define I2C_CTL_FILTEN (1 << 0) /* Bit 0: 1=I2C Signal Filter Enable */ +#define I2C_CTL_FLUSH (1 << 1) /* Bit 1: 1=Flush Data */ +#define I2C_CTL_NAK (1 << 2) /* Bit 2: 1=Send NAK */ +#define I2C_CTL_TXI (1 << 3) /* Bit 3: 1=Enable TDRE interrupts */ +#define I2C_CTL_BIRQ (1 << 4) /* Bit 4: 1=Baud Rate Generator Interrupt Request */ +#define I2C_CTL_STOP (1 << 5) /* Bit 5: 1=Send Stop Condition */ +#define I2C_CTL_START (1 << 6) /* Bit 6: 1=Send Start Condition */ +#define I2C_CTL_IEN (1 << 7) /* Bit 7: 1=I2C Enable */ + /* Register access macros *********************************************************** * * The register access mechanism provided in ez8.h differs from the useful in other |