Address should not be shifted in SET_ADDRESS

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3225 42af7a65-404d-4744-a932-0658087f49c3

3 files changed, 34 insertions, 6 deletions

diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_usbhost.c b/nuttx/arch/arm/src/lpc17xx/lpc17_usbhost.c
index e4d905a07..e25b2474a 100755
--- a/nuttx/arch/arm/src/lpc17xx/lpc17_usbhost.c
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_usbhost.c
@@ -656,12 +656,26 @@ static int lpc17_ctrltd(struct lpc17_usbhost_s *priv, uint32_t dirpid,
   priv->tdstatus = 0;
   lpc17_enqueuetd(EDCTRL, dirpid, toggle, buffer, buflen);
 
+  /* Set the head of the control list to the EP0 EDCTRL (this would have to
+   * change if we want more than on control EP queued at a time).
+   */
+
   lpc17_putreg(LPC17_EDCTRL_ADDR, LPC17_USBHOST_CTRLHEADED);
 
+  /* Set ControlListFilled.  This bit is used to indicate whether there are
+   * TDs on the Control list.
+   */
+
   regval = lpc17_getreg(LPC17_USBHOST_CMDST);
   regval |= OHCI_CMDST_CLF;
   lpc17_putreg(regval, LPC17_USBHOST_CMDST);
-      
+
+  /* ControlListEnable.  This bit is set to enable the processing of the
+   * Control list.  Note: once enabled, it remains enabled and we may even
+   * complete list processing before we get the bit set.  We really
+   * should never modify the control list while CLE is set.
+   */
+
   regval = lpc17_getreg(LPC17_USBHOST_CTRL);
   regval |= OHCI_CTRL_CLE;
   lpc17_putreg(regval, LPC17_USBHOST_CTRL);
@@ -714,7 +728,7 @@ static int lpc17_usbinterrupt(int irq, FAR void *context)
       if ((intstatus & OHCI_INT_RHSC) != 0)
         {
           uint32_t rhportst1 = lpc17_getreg(LPC17_USBHOST_RHPORTST1);
-          ullvdbg("Root Hub Status Change, RHPORTST: %08x\n", rhportst1);
+          ullvdbg("Root Hub Status Change, RHPORTST1: %08x\n", rhportst1);
 
           if ((rhportst1 & OHCI_RHPORTST_CSC) != 0)
             {
@@ -782,7 +796,7 @@ static int lpc17_usbinterrupt(int irq, FAR void *context)
                     }
                 }
 
-              /* Clear the CSC interrupt */
+              /* Clear the status change interrupt */
 
               lpc17_putreg(OHCI_RHPORTST_CSC, LPC17_USBHOST_RHPORTST1);
             }
@@ -1245,12 +1259,26 @@ static int lpc17_transfer(FAR struct usbhost_driver_s *drvr,
   priv->tdstatus = 0;
   lpc17_enqueuetd(ed, dirpid, GTD_STATUS_T_TOGGLE, buffer, buflen);
 
+  /* Set the head of the bulk list to the EP descriptor (this would have to
+   * change if we want more than on bulk EP queued at a time).
+   */
+
   lpc17_putreg((uint32_t)ed, LPC17_USBHOST_BULKHEADED);
 
+  /* BulkListFilled. This bit is used to indicate whether there are any
+   * TDs on the Bulk list.
+   */
+ 
   regval = lpc17_getreg(LPC17_USBHOST_CMDST);
   regval |= OHCI_CMDST_BLF;
   lpc17_putreg(regval, LPC17_USBHOST_CMDST);
-      
+
+  /* BulkListEnable. This bit is set to enable the processing of the Bulk
+   * list.  Note: once enabled, it remains enabled and we may even
+   * complete list processing before we get the bit set.  We really
+   * should never modify the bulk list while BLE is set.
+   */
+
   regval = lpc17_getreg(LPC17_USBHOST_CTRL);
   regval |= OHCI_CTRL_BLE;
   lpc17_putreg(regval, LPC17_USBHOST_CTRL);
diff --git a/nuttx/drivers/usbhost/usbhost_enumerate.c b/nuttx/drivers/usbhost/usbhost_enumerate.c
index 60019416a..16a5802f0 100755
--- a/nuttx/drivers/usbhost/usbhost_enumerate.c
+++ b/nuttx/drivers/usbhost/usbhost_enumerate.c
@@ -391,7 +391,7 @@ int usbhost_enumerate(FAR struct usbhost_driver_s *drvr,
 
   ctrlreq->type = USB_REQ_DIR_OUT|USB_REQ_RECIPIENT_DEVICE;
   ctrlreq->req  = USB_REQ_SETADDRESS;
-  usbhost_putle16(ctrlreq->value, (1 << 8));
+  usbhost_putle16(ctrlreq->value, 1);
   usbhost_putle16(ctrlreq->index, 0);
   usbhost_putle16(ctrlreq->len, 0);
 
diff --git a/nuttx/include/nuttx/usb/ohci.h b/nuttx/include/nuttx/usb/ohci.h
index f24e97811..f8ddcdffc 100755
--- a/nuttx/include/nuttx/usb/ohci.h
+++ b/nuttx/include/nuttx/usb/ohci.h
@@ -240,7 +240,7 @@
 /* HcRhPortStatus: Root hub port status (7.4.4) */
 
 #define OHCI_RHPORTST_CCS          (1 << 0)   /* Bit 0:  Current connect status */
-#define OHCI_RHPORTST_PES          (1 << 1)   /* Bit 1:  Port enable status*/
+#define OHCI_RHPORTST_PES          (1 << 1)   /* Bit 1:  Port enable status */
 #define OHCI_RHPORTST_PSS          (1 << 2)   /* Bit 2:  Port suspend status */
 #define OHCI_RHPORTST_POCI         (1 << 3)   /* Bit 3:  Port over current indicator */
 #define OHCI_RHPORTST_PRS          (1 << 4)   /* Bit 4:  Port reset status */