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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-06-20 17:07:13 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-06-20 17:07:13 +0000 |
| commit | ecddebad71bd2eb04d208be607cfe3419209c2a6 (patch) | |
| tree | ff80e6849ef355ca0cb596e9c83a604965b327e8 | |
| parent | 29f7afe0c507a561d1b4305e331e21598055142b (diff) | |
| download | nuttx-ecddebad71bd2eb04d208be607cfe3419209c2a6.tar.gz nuttx-ecddebad71bd2eb04d208be607cfe3419209c2a6.tar.bz2 nuttx-ecddebad71bd2eb04d208be607cfe3419209c2a6.zip | |
Correct conditional compilation
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2756 42af7a65-404d-4744-a932-0658087f49c3
| -rwxr-xr-x | nuttx/arch/arm/src/lpc17xx/lpc17_clockconfig.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_clockconfig.c b/nuttx/arch/arm/src/lpc17xx/lpc17_clockconfig.c index 83a3e7a67..ad542534a 100755 --- a/nuttx/arch/arm/src/lpc17xx/lpc17_clockconfig.c +++ b/nuttx/arch/arm/src/lpc17xx/lpc17_clockconfig.c @@ -104,7 +104,7 @@ void lpc17_clockconfig(void) /* PLL0 is used to generate the CPU clock divider input (PLLCLK). */ -#if CONFIG_LPC17_PLL0 +#ifdef CONFIG_LPC17_PLL0 /* Select the PLL0 source clock, multiplier, and pre-divider values. NOTE that * a special "feed" sequence must be written to the PLL0FEED register in order * for changes to the PLL0CFG register to take effect. |