Correct IRQ handling, calibrate delay loops

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2759 42af7a65-404d-4744-a932-0658087f49c3

4 files changed, 27 insertions, 27 deletions

diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_irq.c b/nuttx/arch/arm/src/lpc17xx/lpc17_irq.c
index 2c23d6949..886bb7480 100755
--- a/nuttx/arch/arm/src/lpc17xx/lpc17_irq.c
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_irq.c
@@ -212,19 +212,19 @@ static int lpc17_irqinfo(int irq, uint32_t *regaddr, uint32_t *bit)
 
   if (irq >= LPC17_IRQ_EXTINT)
     {
-      if (irq < LPC17_IRQ_NIRQS)
+      if (irq < (LPC17_IRQ_EXTINT+32))
         {
            *regaddr = NVIC_IRQ0_31_ENABLE;
            *bit     = 1 << (irq - LPC17_IRQ_EXTINT);
         }
-      if (irq < LPC17_IRQ_NIRQS)
+      else if (irq < LPC17_IRQ_NIRQS)
         {
            *regaddr = NVIC_IRQ32_63_ENABLE;
            *bit     = 1 << (irq - LPC17_IRQ_EXTINT - 32);
         }
       else
         {
-          return ERROR; /* Invalid interrupt */
+          return ERROR; /* Invalid irq */
         }
     }
 
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_serial.c b/nuttx/arch/arm/src/lpc17xx/lpc17_serial.c
index 89d15c714..9621590af 100755
--- a/nuttx/arch/arm/src/lpc17xx/lpc17_serial.c
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_serial.c
@@ -84,7 +84,7 @@ struct up_dev_s
 {
   uint32_t uartbase;  /* Base address of UART registers */
   uint32_t baud;      /* Configured baud */
-  uint8_t  ier;       /* Saved IER value */
+  uint32_t ier;       /* Saved IER value */
   uint8_t  irq;       /* IRQ associated with this UART */
   uint8_t  parity;    /* 0=none, 1=odd, 2=even */
   uint8_t  bits;      /* Number of bits (7 or 8) */
@@ -438,25 +438,25 @@ static uart_dev_t g_uart3port =
  * Name: up_serialin
  ****************************************************************************/
 
-static inline uint8_t up_serialin(struct up_dev_s *priv, int offset)
+static inline uint32_t up_serialin(struct up_dev_s *priv, int offset)
 {
-  return getreg8(priv->uartbase + offset);
+  return getreg32(priv->uartbase + offset);
 }
 
 /****************************************************************************
  * Name: up_serialout
  ****************************************************************************/
 
-static inline void up_serialout(struct up_dev_s *priv, int offset, uint8_t value)
+static inline void up_serialout(struct up_dev_s *priv, int offset, uint32_t value)
 {
-  putreg8(value, priv->uartbase + offset);
+  putreg32(value, priv->uartbase + offset);
 }
 
 /****************************************************************************
  * Name: up_disableuartint
  ****************************************************************************/
 
-static inline void up_disableuartint(struct up_dev_s *priv, uint8_t *ier)
+static inline void up_disableuartint(struct up_dev_s *priv, uint32_t *ier)
 {
   if (ier)
     {
@@ -471,7 +471,7 @@ static inline void up_disableuartint(struct up_dev_s *priv, uint8_t *ier)
  * Name: up_restoreuartint
  ****************************************************************************/
 
-static inline void up_restoreuartint(struct up_dev_s *priv, uint8_t ier)
+static inline void up_restoreuartint(struct up_dev_s *priv, uint32_t ier)
 {
   priv->ier |= ier & UART_IER_ALLIE;
   up_serialout(priv, LPC17_UART_IER_OFFSET, priv->ier);
@@ -483,7 +483,7 @@ static inline void up_restoreuartint(struct up_dev_s *priv, uint8_t ier)
 
 static inline void up_enablebreaks(struct up_dev_s *priv, bool enable)
 {
-  uint8_t lcr = up_serialin(priv, LPC17_UART_LCR_OFFSET);
+  uint32_t lcr = up_serialin(priv, LPC17_UART_LCR_OFFSET);
   if (enable)
     {
       lcr |= UART_LCR_BRK;
@@ -514,7 +514,7 @@ static inline void up_enablebreaks(struct up_dev_s *priv, bool enable)
  *
  ************************************************************************************/
 
-static inline uint8_t lpc17_uartcclkdiv(uint32_t baud)
+static inline uint32_t lpc17_uartcclkdiv(uint32_t baud)
 {
   /* Ignoring the fractional divider, the BAUD is given by:
    *
@@ -613,7 +613,7 @@ static inline uint8_t lpc17_uartcclkdiv(uint32_t baud)
  ************************************************************************************/
 
 #ifdef CONFIG_LPC17_UART0
-static inline void lpc17_uart0config(uint8_t clkdiv)
+static inline void lpc17_uart0config(uint32_t clkdiv)
 {
   uint32_t   regval;
   irqstate_t flags;
@@ -629,7 +629,7 @@ static inline void lpc17_uart0config(uint8_t clkdiv)
 
   regval = getreg32(LPC17_SYSCON_PCLKSEL0);
   regval &= ~SYSCON_PCLKSEL0_UART0_MASK;
-  regval |= ((uint32_t)clkdiv << SYSCON_PCLKSEL0_UART0_SHIFT);
+  regval |= (clkdiv << SYSCON_PCLKSEL0_UART0_SHIFT);
   putreg32(regval, LPC17_SYSCON_PCLKSEL0);
 
   /* Step 3: Configure I/O pins */
@@ -641,7 +641,7 @@ static inline void lpc17_uart0config(uint8_t clkdiv)
 #endif
 
 #ifdef CONFIG_LPC17_UART1
-static inline void lpc17_uart1config(uint8_t clkdiv)
+static inline void lpc17_uart1config(uint32_t clkdiv)
 {
   uint32_t   regval;
   irqstate_t flags;
@@ -657,7 +657,7 @@ static inline void lpc17_uart1config(uint8_t clkdiv)
 
   regval = getreg32(LPC17_SYSCON_PCLKSEL0);
   regval &= ~SYSCON_PCLKSEL0_UART1_MASK;
-  regval |= ((uint32_t)clkdiv << SYSCON_PCLKSEL0_UART1_SHIFT);
+  regval |= (clkdiv << SYSCON_PCLKSEL0_UART1_SHIFT);
   putreg32(regval, LPC17_SYSCON_PCLKSEL0);
 
   /* Step 3: Configure I/O pins */
@@ -677,7 +677,7 @@ static inline void lpc17_uart1config(uint8_t clkdiv)
 #endif
 
 #ifdef CONFIG_LPC17_UART2
-static inline void lpc17_uart2config(uint8_t clkdiv)
+static inline void lpc17_uart2config(uint32_t clkdiv)
 {
   uint32_t   regval;
   irqstate_t flags;
@@ -693,7 +693,7 @@ static inline void lpc17_uart2config(uint8_t clkdiv)
 
   regval = getreg32(LPC17_SYSCON_PCLKSEL1);
   regval &= ~SYSCON_PCLKSEL0_UART2_MASK;
-  regval |= ((uint32_t)clkdiv << SYSCON_PCLKSEL1_UART2_SHIFT);
+  regval |= (clkdiv << SYSCON_PCLKSEL1_UART2_SHIFT);
   putreg32(regval, LPC17_SYSCON_PCLKSEL1);
 
   /* Step 3: Configure I/O pins */
@@ -705,7 +705,7 @@ static inline void lpc17_uart2config(uint8_t clkdiv)
 #endif
 
 #ifdef CONFIG_LPC17_UART3
-static inline void lpc17_uart3config(uint8_t clkdiv)
+static inline void lpc17_uart3config(uint32_t clkdiv)
 {
   uint32_t   regval;
   irqstate_t flags;
@@ -721,7 +721,7 @@ static inline void lpc17_uart3config(uint8_t clkdiv)
 
   regval = getreg32(LPC17_SYSCON_PCLKSEL1);
   regval &= ~SYSCON_PCLKSEL0_UART3_MASK;
-  regval |= ((uint32_t)clkdiv << SYSCON_PCLKSEL1_UART3_SHIFT);
+  regval |= (clkdiv << SYSCON_PCLKSEL1_UART3_SHIFT);
   putreg32(regval, LPC17_SYSCON_PCLKSEL1);
 
   /* Step 3: Configure I/O pins */
@@ -791,7 +791,7 @@ static int up_setup(struct uart_dev_s *dev)
 #ifndef CONFIG_SUPPRESS_LPC17_UART_CONFIG
   struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
   uint16_t dl;
-  uint8_t lcr;
+  uint32_t lcr;
 
   /* Clear fifos */
 
@@ -946,7 +946,7 @@ static int up_interrupt(int irq, void *context)
 {
   struct uart_dev_s *dev = NULL;
   struct up_dev_s   *priv;
-  uint8_t            status;
+  uint32_t           status;
   int                passes;
 
 #ifdef CONFIG_LPC17_UART0
@@ -1133,7 +1133,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
 static int up_receive(struct uart_dev_s *dev, uint32_t *status)
 {
   struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
-  uint8_t rbr;
+  uint32_t rbr;
 
   *status = up_serialin(priv, LPC17_UART_LSR_OFFSET);
   rbr     = up_serialin(priv, LPC17_UART_RBR_OFFSET);
@@ -1189,7 +1189,7 @@ static bool up_rxavailable(struct uart_dev_s *dev)
 static void up_send(struct uart_dev_s *dev, int ch)
 {
   struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
-  up_serialout(priv, LPC17_UART_THR_OFFSET, (uint8_t)ch);
+  up_serialout(priv, LPC17_UART_THR_OFFSET, (uint32_t)ch);
 }
 
 /****************************************************************************
@@ -1341,7 +1341,7 @@ void up_serialinit(void)
 int up_putc(int ch)
 {
   struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
-  uint8_t ier;
+  uint32_t ier;
 
   up_disableuartint(priv, &ier);
 
diff --git a/nuttx/configs/nucleus2g/nsh/defconfig b/nuttx/configs/nucleus2g/nsh/defconfig
index baf7b77f1..d53b70a3e 100755
--- a/nuttx/configs/nucleus2g/nsh/defconfig
+++ b/nuttx/configs/nucleus2g/nsh/defconfig
@@ -76,7 +76,7 @@ CONFIG_ARCH_CHIP=lpc17xx
 CONFIG_ARCH_CHIP_LPC1768=y
 CONFIG_ARCH_BOARD=nucleus2g
 CONFIG_ARCH_BOARD_NUCLEUS2G=y
-CONFIG_BOARD_LOOPSPERMSEC=5483
+CONFIG_BOARD_LOOPSPERMSEC=7982
 CONFIG_DRAM_SIZE=(32*1024)
 CONFIG_DRAM_START=0x10000000
 CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
diff --git a/nuttx/configs/nucleus2g/ostest/defconfig b/nuttx/configs/nucleus2g/ostest/defconfig
index 59dc6392c..2d69e5a87 100755
--- a/nuttx/configs/nucleus2g/ostest/defconfig
+++ b/nuttx/configs/nucleus2g/ostest/defconfig
@@ -76,7 +76,7 @@ CONFIG_ARCH_CHIP=lpc17xx
 CONFIG_ARCH_CHIP_LPC1768=y
 CONFIG_ARCH_BOARD=nucleus2g
 CONFIG_ARCH_BOARD_NUCLEUS2G=y
-CONFIG_BOARD_LOOPSPERMSEC=5483
+CONFIG_BOARD_LOOPSPERMSEC=7982
 CONFIG_DRAM_SIZE=(32*1024)
 CONFIG_DRAM_START=0x10000000
 CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)