diff options
author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-07-09 12:53:12 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-07-09 12:53:12 +0000 |
commit | 9098b66d35067e38533c23f429386816f42943de (patch) | |
tree | 465ecfb945562f3996cca598d5aa6c86b1aaf71e | |
parent | 48994413b1ca9833ec6061ba257dda813ea121dd (diff) | |
download | nuttx-9098b66d35067e38533c23f429386816f42943de.tar.gz nuttx-9098b66d35067e38533c23f429386816f42943de.tar.bz2 nuttx-9098b66d35067e38533c23f429386816f42943de.zip |
ARM stack check logic; ARM no-console build fixes; Nucleus-2G updates
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3760 42af7a65-404d-4744-a932-0658087f49c3
-rw-r--r-- | nuttx/TODO | 9 | ||||
-rw-r--r-- | nuttx/arch/arm/src/common/up_checkstack.c | 147 | ||||
-rw-r--r-- | nuttx/arch/arm/src/common/up_createstack.c | 20 | ||||
-rw-r--r-- | nuttx/arch/arm/src/common/up_internal.h | 24 | ||||
-rwxr-xr-x | nuttx/arch/arm/src/lpc17xx/Make.defs | 2 | ||||
-rwxr-xr-x | nuttx/arch/arm/src/lpc17xx/lpc17_lowputc.c | 9 | ||||
-rwxr-xr-x | nuttx/arch/arm/src/lpc17xx/lpc17_serial.c | 276 | ||||
-rwxr-xr-x | nuttx/configs/nucleus2g/include/board.h | 25 | ||||
-rwxr-xr-x | nuttx/configs/nucleus2g/src/Makefile | 2 | ||||
-rwxr-xr-x | nuttx/configs/nucleus2g/src/nucleus2g_internal.h | 305 | ||||
-rwxr-xr-x | nuttx/configs/nucleus2g/src/up_boot.c | 224 | ||||
-rwxr-xr-x | nuttx/configs/nucleus2g/tools/olimex.cfg | 1 | ||||
-rwxr-xr-x | nuttx/configs/nucleus2g/tools/oocd.sh | 9 | ||||
-rwxr-xr-x | nuttx/configs/nucleus2g/tools/scarab.cfg | 63 |
14 files changed, 733 insertions, 383 deletions
diff --git a/nuttx/TODO b/nuttx/TODO index 443372345..24a9226de 100644 --- a/nuttx/TODO +++ b/nuttx/TODO @@ -1292,4 +1292,13 @@ o Other Applications & Tests (apps/examples/) Status: Open Priority: Med + Description: The font caching logic in examples/nx is incomplete. Fonts are + added to the cache, but never removed. When the cache is full + it stops rendering. This is not a problem for the examples/nx + code because it uses so few fonts, but if the logic were + leveraged for more general purposes, it would be a problem. + Status: Open + Priority: Low. This is not really a problem becauses examples/nx works + fine with its bogus font caching. + diff --git a/nuttx/arch/arm/src/common/up_checkstack.c b/nuttx/arch/arm/src/common/up_checkstack.c new file mode 100644 index 000000000..27ac20234 --- /dev/null +++ b/nuttx/arch/arm/src/common/up_checkstack.c @@ -0,0 +1,147 @@ +/**************************************************************************** + * arch/arm/src/common/up_checkstack.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <sys/types.h> +#include <stdint.h> +#include <sched.h> +#include <debug.h> + +#include <nuttx/arch.h> + +#include "os_internal.h" + +#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_STACK) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Global Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_check_stack + * + * Description: + * Determine (approximately) how much stack has been used be searching the + * stack memory for a high water mark. That is, the deepest level of the + * stack that clobbered some recognizable marker in the stack memory. + * + * Input Parameters: + * None + * + * Returned value: + * The estimated amount of stack space used. + * + ****************************************************************************/ + +size_t up_check_tcbstack(FAR _TCB *tcb) +{ + FAR uint32_t *ptr; + size_t mark; + + /* The ARM uses a push-down stack: the stack grows toward lower addresses + * in memory. We need to start at the lowest address in the stack memory + * allocation and search to higher addresses. The first word we encounter + * that does not have the magic value is the high water mark. + */ + + for (ptr = (FAR uint32_t *)tcb->stack_alloc_ptr, mark = tcb->adj_stack_size/4; + *ptr == 0xDEADBEEF && mark > 0; + ptr++, mark--); + + /* If the stack is completely used, then this might mean that the stack + * overflowed from above (meaning that the stack is too small), or may + * have been overwritten from below meaning that some other stack or data + * structure overflowed. + * + * If you see returned values saying that the entire stack is being used + * then enable the following logic to see it there are unused areas in the + * middle of the stack. + */ + +#if 0 + if (mark + 16 > tcb->adj_stack_size) + { + int i, j; + + ptr = (FAR uint32_t *)tcb->stack_alloc_ptr; + for (i = 0; i < tcb->adj_stack_size; i += 4*64) + { + for (j = 0; j < 64; j++) + { + int ch; + if (*ptr++ == 0xDEADBEEF) + { + ch = '.'; + } + else + { + ch = 'X'; + } + up_putc(ch); + } + up_putc('\n'); + } + } +#endif + + /* Return our guess about how much stack space was used */ + + return mark*4; +} + +size_t up_check_stack(void) +{ + return up_check_tcbstack((FAR _TCB*)g_readytorun.head); +} + +size_t up_check_stack_remain(void) +{ + return ((FAR _TCB*)g_readytorun.head)->adj_stack_size - up_check_tcbstack((FAR _TCB*)g_readytorun.head); +} + +#endif /* CONFIG_DEBUG && CONFIG_DEBUG_STACK */ diff --git a/nuttx/arch/arm/src/common/up_createstack.c b/nuttx/arch/arm/src/common/up_createstack.c index 6b8094b5b..71d9302b1 100644 --- a/nuttx/arch/arm/src/common/up_createstack.c +++ b/nuttx/arch/arm/src/common/up_createstack.c @@ -55,6 +55,16 @@ * Private Types ****************************************************************************/ +/* On most larger then 8 bit archs this will need to be word aligned so + * so maybe some checks should be put in place? + */ + +static void *memset32(void *s, uint32_t c, size_t n) +{ + uint32_t *p = (uint32_t *)s; + while (n-- > 0) *p++ = c; + return s; +} /**************************************************************************** * Private Function Prototypes ****************************************************************************/ @@ -129,9 +139,19 @@ int up_create_stack(_TCB *tcb, size_t stack_size) tcb->adj_stack_ptr = (uint32_t*)top_of_stack; tcb->adj_stack_size = size_of_stack; + /* If stack debug is enabled, then fill the stack with a + * recognizable value that we can use later to test for high + * water marks. + */ + +#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_STACK) + memset32(tcb->stack_alloc_ptr, 0xDEADBEEF, tcb->adj_stack_size/4); +#endif + up_ledon(LED_STACKCREATED); return OK; } return ERROR; } + diff --git a/nuttx/arch/arm/src/common/up_internal.h b/nuttx/arch/arm/src/common/up_internal.h index 803a6563d..0d9f1560f 100644 --- a/nuttx/arch/arm/src/common/up_internal.h +++ b/nuttx/arch/arm/src/common/up_internal.h @@ -41,6 +41,7 @@ ****************************************************************************/ #ifndef __ASSEMBLY__ +# include <sys/types.h> # include <stdint.h> #endif @@ -280,6 +281,29 @@ extern void up_usbuninitialize(void); # define up_usbuninitialize() #endif +/**************************************************************************** + * Name: up_check_stack + * + * Description: + * Determine (approximately) how much stack has been used be searching the + * stack memory for a high water mark. That is, the deepest level of the + * stack that clobbered some recognizable marker in the stack memory. + * + * Input Parameters: + * None + * + * Returned value: + * The estimated amount of stack space used. + * + ****************************************************************************/ + + +#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_STACK) +extern size_t up_check_stack(void); +extern size_t up_check_tcbstack(FAR _TCB); +extern size_t up_check_tcbstack_remain(FAR _TCB); +#endif + #endif /* __ASSEMBLY__ */ #endif /* __UP_INTERNAL_H */ diff --git a/nuttx/arch/arm/src/lpc17xx/Make.defs b/nuttx/arch/arm/src/lpc17xx/Make.defs index 2ec1d5d8d..32bc8b47f 100755 --- a/nuttx/arch/arm/src/lpc17xx/Make.defs +++ b/nuttx/arch/arm/src/lpc17xx/Make.defs @@ -46,7 +46,7 @@ CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \ up_modifyreg16.c up_modifyreg32.c up_releasepending.c \ up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c \ up_sigdeliver.c up_unblocktask.c up_usestack.c up_doirq.c \ - up_hardfault.c up_svcall.c + up_hardfault.c up_svcall.c up_checkstack.c ifeq ($(CONFIG_NET),y) ifneq ($(CONFIG_LPC17_ETHERNET),y) diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_lowputc.c b/nuttx/arch/arm/src/lpc17xx/lpc17_lowputc.c index c2c52cbdc..0bd265635 100755 --- a/nuttx/arch/arm/src/lpc17xx/lpc17_lowputc.c +++ b/nuttx/arch/arm/src/lpc17xx/lpc17_lowputc.c @@ -82,7 +82,7 @@ # define CONSOLE_BITS CONFIG_UART3_BITS # define CONSOLE_PARITY CONFIG_UART3_PARITY # define CONSOLE_2STOP CONFIG_UART3_2STOP -#else +#elif defined(HAVE_CONSOLE) # error "No CONFIG_UARTn_SERIAL_CONSOLE Setting" #endif @@ -96,7 +96,7 @@ # define CONSOLE_LCR_WLS UART_LCR_WLS_7BIT #elif CONSOLE_BITS == 8 # define CONSOLE_LCR_WLS UART_LCR_WLS_8BIT -#else +#elif defined(HAVE_CONSOLE) # error "Invalid CONFIG_UARTn_BITS setting for console " #endif @@ -112,7 +112,7 @@ # define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_STICK1) #elif CONSOLE_PARITY == 4 # define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_STICK0) -#else +#elif defined(HAVE_CONSOLE) # error "Invalid CONFIG_UARTn_PARITY setting for CONSOLE" #endif @@ -246,7 +246,7 @@ void up_lowputc(char ch) { -#ifdef HAVE_UART +#if defined HAVE_UART && defined HAVE_CONSOLE /* Wait for the transmitter to be available */ while ((getreg32(CONSOLE_BASE+LPC17_UART_LSR_OFFSET) & UART_LSR_THRE) == 0); @@ -351,7 +351,6 @@ void lpc17_lowsetup(void) #elif defined(CONFIG_UART2_SERIAL_CONSOLE) lpc17_configgpio(GPIO_UART2_TXD); lpc17_configgpio(GPIO_UART2_RXD); - irqrestore(flags); #elif defined(CONFIG_UART3_SERIAL_CONSOLE) lpc17_configgpio(GPIO_UART3_TXD); lpc17_configgpio(GPIO_UART3_RXD); diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_serial.c b/nuttx/arch/arm/src/lpc17xx/lpc17_serial.c index 46413459a..3b6c5a44c 100755 --- a/nuttx/arch/arm/src/lpc17xx/lpc17_serial.c +++ b/nuttx/arch/arm/src/lpc17xx/lpc17_serial.c @@ -271,164 +271,204 @@ static uart_dev_t g_uart3port = /* Which UART with be tty0/console and which tty1? tty2? tty3? */ -#if defined(CONFIG_UART0_SERIAL_CONSOLE) -# define CONSOLE_DEV g_uart0port /* UART0=console */ -# define TTYS0_DEV g_uart0port /* UART0=ttyS0 */ -# ifdef CONFIG_LPC17_UART1 -# define TTYS1_DEV g_uart1port /* UART0=ttyS0;UART1=ttyS1 */ -# ifdef CONFIG_LPC17_UART2 -# define TTYS2_DEV g_uart2port /* UART0=ttyS0;UART1=ttyS1;UART2=ttyS2 */ -# ifdef CONFIG_LPC17_UART3 -# define TTYS3_DEV g_uart3port /* UART0=ttyS0;UART1=ttyS1;UART2=ttyS2;UART3=ttyS3 */ +#ifdef HAVE_CONSOLE +# if defined(CONFIG_UART0_SERIAL_CONSOLE) +# define CONSOLE_DEV g_uart0port /* UART0=console */ +# define TTYS0_DEV g_uart0port /* UART0=ttyS0 */ +# ifdef CONFIG_LPC17_UART1 +# define TTYS1_DEV g_uart1port /* UART0=ttyS0;UART1=ttyS1 */ +# ifdef CONFIG_LPC17_UART2 +# define TTYS2_DEV g_uart2port /* UART0=ttyS0;UART1=ttyS1;UART2=ttyS2 */ +# ifdef CONFIG_LPC17_UART3 +# define TTYS3_DEV g_uart3port /* UART0=ttyS0;UART1=ttyS1;UART2=ttyS2;UART3=ttyS3 */ +# else +# undef TTYS3_DEV /* UART0=ttyS0;UART1=ttyS1;UART2=ttyS;No ttyS3 */ +# endif # else -# undef TTYS3_DEV /* UART0=ttyS0;UART1=ttyS1;UART2=ttyS;No ttyS3 */ +# ifdef CONFIG_LPC17_UART3 +# define TTYS2_DEV g_uart3port /* UART0=ttyS0;UART1=ttyS1;UART3=ttys2;No ttyS3 */ +# else +# undef TTYS2_DEV /* UART0=ttyS0;UART1=ttyS1;No ttyS2;No ttyS3 */ +# endif +# undef TTYS3_DEV /* No ttyS3 */ # endif # else -# ifdef CONFIG_LPC17_UART3 -# define TTYS2_DEV g_uart3port /* UART0=ttyS0;UART1=ttyS1;UART3=ttys2;No ttyS3 */ +# ifdef CONFIG_LPC17_UART2 +# define TTYS1_DEV g_uart2port /* UART0=ttyS0;UART2=ttyS1;No ttyS3 */ +# ifdef CONFIG_LPC17_UART3 +# define TTYS2_DEV g_uart3port /* UART0=ttyS0;UART2=ttyS1;UART3=ttyS2;No ttyS3 */ +# else +# undef TTYS2_DEV /* UART0=ttyS0;UART2=ttyS1;No ttyS2;No ttyS3 */ +# endif +# undef TTYS3_DEV /* No ttyS3 */ # else -# undef TTYS2_DEV /* UART0=ttyS0;UART1=ttyS1;No ttyS2;No ttyS3 */ +# ifdef CONFIG_LPC17_UART3 +# define TTYS1_DEV g_uart3port /* UART0=ttyS0;UART3=ttyS1;No ttyS2;No ttyS3 */ +# else +# undef TTYS1_DEV /* UART0=ttyS0;No ttyS1;No ttyS2;No ttyS3 */ +# endif +# undef TTYS2_DEV /* No ttyS2 */ +# undef TTYS3_DEV /* No ttyS3 */ # endif -# undef TTYS3_DEV /* No ttyS3 */ # endif -# else -# ifdef CONFIG_LPC17_UART2 -# define TTYS1_DEV g_uart2port /* UART0=ttyS0;UART2=ttyS1;No ttyS3 */ -# ifdef CONFIG_LPC17_UART3 -# define TTYS2_DEV g_uart3port /* UART0=ttyS0;UART2=ttyS1;UART3=ttyS2;No ttyS3 */ +# elif defined(CONFIG_UART1_SERIAL_CONSOLE) +# define CONSOLE_DEV g_uart1port /* UART1=console */ +# define TTYS0_DEV g_uart1port /* UART1=ttyS0 */ +# ifdef CONFIG_LPC17_UART +# define TTYS1_DEV g_uart0port /* UART1=ttyS0;UART0=ttyS1 */ +# ifdef CONFIG_LPC17_UART2 +# define TTYS2_DEV g_uart2port /* UART1=ttyS0;UART0=ttyS1;UART2=ttyS2 */ +# ifdef CONFIG_LPC17_UART3 +# define TTYS3_DEV g_uart3port /* UART1=ttyS0;UART0=ttyS1;UART2=ttyS2;UART3=ttyS3 */ +# else +# undef TTYS3_DEV /* UART1=ttyS0;UART0=ttyS1;UART2=ttyS;No ttyS3 */ +# endif # else -# undef TTYS2_DEV /* UART0=ttyS0;UART2=ttyS1;No ttyS2;No ttyS3 */ +# ifdef CONFIG_LPC17_UART3 +# define TTYS2_DEV g_uart3port /* UART1=ttyS0;UART0=ttyS1;UART3=ttys2;No ttyS3 */ +# else +# undef TTYS2_DEV /* UART1=ttyS0;UART0=ttyS1;No ttyS2;No ttyS3 */ +# endif +# undef TTYS3_DEV /* No ttyS3 */ # endif -# undef TTYS3_DEV /* No ttyS3 */ # else -# ifdef CONFIG_LPC17_UART3 -# define TTYS1_DEV g_uart3port /* UART0=ttyS0;UART3=ttyS1;No ttyS2;No ttyS3 */ +# ifdef CONFIG_LPC17_UART2 +# define TTYS1_DEV g_uart2port /* UART1=ttyS0;UART2=ttyS1 */ +# ifdef CONFIG_LPC17_UART3 +# define TTYS2_DEV g_uart3port /* UART1=ttyS0;UART2=ttyS1;UART3=ttyS2;No ttyS3 */ +# else +# undef TTYS2_DEV /* UART1=ttyS0;UART2=ttyS1;No ttyS2;No ttyS3 */ +# endif +# undef TTYS3_DEV /* No ttyS3 */ # else -# undef TTYS1_DEV /* UART0=ttyS0;No ttyS1;No ttyS2;No ttyS3 */ +# ifdef CONFIG_LPC17_UART3 +# define TTYS1_DEV g_uart3port /* UART1=ttyS0;UART3=ttyS1;No ttyS2;No ttyS3 */ +# else +# undef TTYS1_DEV /* UART1=ttyS0;No ttyS1;No ttyS2;No ttyS3 */ +# endif +# undef TTYS2_DEV /* No ttyS2 */ +# undef TTYS3_DEV /* No ttyS3 */ # endif -# undef TTYS2_DEV /* No ttyS2 */ -# undef TTYS3_DEV /* No ttyS3 */ # endif -# endif -#elif defined(CONFIG_UART1_SERIAL_CONSOLE) -# define CONSOLE_DEV g_uart1port /* UART1=console */ -# define TTYS0_DEV g_uart1port /* UART1=ttyS0 */ -# ifdef CONFIG_LPC17_UART -# define TTYS1_DEV g_uart0port /* UART1=ttyS0;UART0=ttyS1 */ -# ifdef CONFIG_LPC17_UART2 -# define TTYS2_DEV g_uart2port /* UART1=ttyS0;UART0=ttyS1;UART2=ttyS2 */ -# ifdef CONFIG_LPC17_UART3 -# define TTYS3_DEV g_uart3port /* UART1=ttyS0;UART0=ttyS1;UART2=ttyS2;UART3=ttyS3 */ +# elif defined(CONFIG_UART2_SERIAL_CONSOLE) +# define CONSOLE_DEV g_uart2port /* UART2=console */ +# define TTYS0_DEV g_uart2port /* UART2=ttyS0 */ +# ifdef CONFIG_LPC17_UART +# define TTYS1_DEV g_uart0port /* UART2=ttyS0;UART0=ttyS1 */ +# ifdef CONFIG_LPC17_UART1 +# define TTYS2_DEV g_uart1port /* UART2=ttyS0;UART0=ttyS1;UART1=ttyS2 */ +# ifdef CONFIG_LPC17_UART3 +# define TTYS3_DEV g_uart3port /* UART2=ttyS0;UART0=ttyS1;UART1=ttyS2;UART3=ttyS3 */ +# else +# undef TTYS3_DEV /* UART2=ttyS0;UART0=ttyS1;UART1=ttyS;No ttyS3 */ +# endif # else -# undef TTYS3_DEV /* UART1=ttyS0;UART0=ttyS1;UART2=ttyS;No ttyS3 */ +# ifdef CONFIG_LPC17_UART3 +# define TTYS2_DEV g_uart3port /* UART2=ttyS0;UART0=ttyS1;UART3=ttys2;No ttyS3 */ +# else +# undef TTYS2_DEV /* UART2=ttyS0;UART0=ttyS1;No ttyS2;No ttyS3 */ +# endif +# undef TTYS3_DEV /* No ttyS3 */ # endif # else -# ifdef CONFIG_LPC17_UART3 -# define TTYS2_DEV g_uart3port /* UART1=ttyS0;UART0=ttyS1;UART3=ttys2;No ttyS3 */ +# ifdef CONFIG_LPC17_UART1 +# define TTYS1_DEV g_uart1port /* UART2=ttyS0;UART1=ttyS1 */ +# ifdef CONFIG_LPC17_UART3 +# define TTYS2_DEV g_uart3port /* UART2=ttyS0;UART1=ttyS1;UART3=ttyS2 */ +# else +# undef TTYS2_DEV /* UART2=ttyS0;UART1=ttyS1;No ttyS2;No ttyS3 */ +# endif +# undef TTYS3_DEV /* No ttyS3 */ # else -# undef TTYS2_DEV /* UART1=ttyS0;UART0=ttyS1;No ttyS2;No ttyS3 */ +# ifdef CONFIG_LPC17_UART3 +# define TTYS1_DEV g_uart3port /* UART2=ttyS0;UART3=ttyS1;No ttyS3 */ +# else +# undef TTYS1_DEV /* UART2=ttyS0;No ttyS1;No ttyS2;No ttyS3 */ +# endif +# undef TTYS2_DEV /* No ttyS2 */ +# undef TTYS3_DEV /* No ttyS3 */ # endif -# undef TTYS3_DEV /* No ttyS3 */ # endif -# else -# ifdef CONFIG_LPC17_UART2 -# define TTYS1_DEV g_uart2port /* UART1=ttyS0;UART2=ttyS1 */ -# ifdef CONFIG_LPC17_UART3 -# define TTYS2_DEV g_uart3port /* UART1=ttyS0;UART2=ttyS1;UART3=ttyS2;No ttyS3 */ +# elif defined(CONFIG_UART3_SERIAL_CONSOLE) +# define CONSOLE_DEV g_uart3port /* UART3=console */ +# define TTYS0_DEV g_uart3port /* UART3=ttyS0 */ +# ifdef CONFIG_LPC17_UART +# define TTYS1_DEV g_uart0port /* UART3=ttyS0;UART0=ttyS1 */ +# ifdef CONFIG_LPC17_UART1 +# define TTYS2_DEV g_uart1port /* UART3=ttyS0;UART0=ttyS1;UART1=ttyS2 */ +# ifdef CONFIG_LPC17_UART2 +# define TTYS3_DEV g_uart2port /* UART3=ttyS0;UART0=ttyS1;UART1=ttyS2;UART2=ttyS3 */ +# else +# undef TTYS3_DEV /* UART3=ttyS0;UART0=ttyS1;UART1=ttyS;No ttyS3 */ +# endif # else -# undef TTYS2_DEV /* UART1=ttyS0;UART2=ttyS1;No ttyS2;No ttyS3 */ +# ifdef CONFIG_LPC17_UART2 +# define TTYS2_DEV g_uart2port /* UART3=ttyS0;UART0=ttyS1;UART2=ttys2;No ttyS3 */ +# else +# undef TTYS2_DEV /* UART3=ttyS0;UART0=ttyS1;No ttyS2;No ttyS3 */ +# endif +# undef TTYS3_DEV /* No ttyS3 */ # endif -# undef TTYS3_DEV /* No ttyS3 */ # else -# ifdef CONFIG_LPC17_UART3 -# define TTYS1_DEV g_uart3port /* UART1=ttyS0;UART3=ttyS1;No ttyS2;No ttyS3 */ +# ifdef CONFIG_LPC17_UART1 +# define TTYS1_DEV g_uart1port /* UART3=ttyS0;UART1=ttyS1 */ +# ifdef CONFIG_LPC17_UART2 +# define TTYS2_DEV g_uart2port /* UART3=ttyS0;UART1=ttyS1;UART2=ttyS2;No ttyS3 */ +# else +# undef TTYS2_DEV /* UART3=ttyS0;UART1=ttyS1;No ttyS2;No ttyS3 */ +# endif +# undef TTYS3_DEV /* No ttyS3 */ # else -# undef TTYS1_DEV /* UART1=ttyS0;No ttyS1;No ttyS2;No ttyS3 */ +# ifdef CONFIG_LPC17_UART2 +# define TTYS1_DEV g_uart2port /* UART3=ttyS0;UART2=ttyS1;No ttyS3;No ttyS3 */ +# undef TTYS3_DEV /* UART3=ttyS0;UART2=ttyS1;No ttyS2;No ttyS3 */ +# else +# undef TTYS1_DEV /* UART3=ttyS0;No ttyS1;No ttyS2;No ttyS3 */ +# endif +# undef TTYS2_DEV /* No ttyS2 */ +# undef TTYS3_DEV /* No ttyS3 */ # endif -# undef TTYS2_DEV /* No ttyS2 */ -# undef TTYS3_DEV /* No ttyS3 */ # endif # endif -#elif defined(CONFIG_UART2_SERIAL_CONSOLE) -# define CONSOLE_DEV g_uart2port /* UART2=console */ -# define TTYS0_DEV g_uart2port /* UART2=ttyS0 */ -# ifdef CONFIG_LPC17_UART -# define TTYS1_DEV g_uart0port /* UART2=ttyS0;UART0=ttyS1 */ -# ifdef CONFIG_LPC17_UART1 -# define TTYS2_DEV g_uart1port /* UART2=ttyS0;UART0=ttyS1;UART1=ttyS2 */ +#else /* No console */ +# define TTYS0_DEV g_uart0port /* UART0=ttyS0 */ +# ifdef CONFIG_LPC17_UART1 +# define TTYS1_DEV g_uart1port /* UART0=ttyS0;UART1=ttyS1 */ +# ifdef CONFIG_LPC17_UART2 +# define TTYS2_DEV g_uart2port /* UART0=ttyS0;UART1=ttyS1;UART2=ttyS2 */ # ifdef CONFIG_LPC17_UART3 -# define TTYS3_DEV g_uart3port /* UART2=ttyS0;UART0=ttyS1;UART1=ttyS2;UART3=ttyS3 */ +# define TTYS3_DEV g_uart3port /* UART0=ttyS0;UART1=ttyS1;UART2=ttyS2;UART3=ttyS3 */ # else -# undef TTYS3_DEV /* UART2=ttyS0;UART0=ttyS1;UART1=ttyS;No ttyS3 */ +# undef TTYS3_DEV /* UART0=ttyS0;UART1=ttyS1;UART2=ttyS;No ttyS3 */ # endif # else # ifdef CONFIG_LPC17_UART3 -# define TTYS2_DEV g_uart3port /* UART2=ttyS0;UART0=ttyS1;UART3=ttys2;No ttyS3 */ +# define TTYS2_DEV g_uart3port /* UART0=ttyS0;UART1=ttyS1;UART3=ttys2;No ttyS3 */ # else -# undef TTYS2_DEV /* UART2=ttyS0;UART0=ttyS1;No ttyS2;No ttyS3 */ +# undef TTYS2_DEV /* UART0=ttyS0;UART1=ttyS1;No ttyS2;No ttyS3 */ # endif -# undef TTYS3_DEV /* No ttyS3 */ +# undef TTYS3_DEV /* No ttyS3 */ # endif # else -# ifdef CONFIG_LPC17_UART1 -# define TTYS1_DEV g_uart1port /* UART2=ttyS0;UART1=ttyS1 */ +# ifdef CONFIG_LPC17_UART2 +# define TTYS1_DEV g_uart2port /* UART0=ttyS0;UART2=ttyS1;No ttyS3 */ # ifdef CONFIG_LPC17_UART3 -# define TTYS2_DEV g_uart3port /* UART2=ttyS0;UART1=ttyS1;UART3=ttyS2 */ +# define TTYS2_DEV g_uart3port /* UART0=ttyS0;UART2=ttyS1;UART3=ttyS2;No ttyS3 */ # else -# undef TTYS2_DEV /* UART2=ttyS0;UART1=ttyS1;No ttyS2;No ttyS3 */ +# undef TTYS2_DEV /* UART0=ttyS0;UART2=ttyS1;No ttyS2;No ttyS3 */ # endif -# undef TTYS3_DEV /* No ttyS3 */ +# undef TTYS3_DEV /* No ttyS3 */ # else # ifdef CONFIG_LPC17_UART3 -# define TTYS1_DEV g_uart3port /* UART2=ttyS0;UART3=ttyS1;No ttyS3 */ -# else -# undef TTYS1_DEV /* UART2=ttyS0;No ttyS1;No ttyS2;No ttyS3 */ -# endif -# undef TTYS2_DEV /* No ttyS2 */ -# undef TTYS3_DEV /* No ttyS3 */ -# endif -# endif -#elif defined(CONFIG_UART3_SERIAL_CONSOLE) -# define CONSOLE_DEV g_uart3port /* UART3=console */ -# define TTYS0_DEV g_uart3port /* UART3=ttyS0 */ -# ifdef CONFIG_LPC17_UART -# define TTYS1_DEV g_uart0port /* UART3=ttyS0;UART0=ttyS1 */ -# ifdef CONFIG_LPC17_UART1 -# define TTYS2_DEV g_uart1port /* UART3=ttyS0;UART0=ttyS1;UART1=ttyS2 */ -# ifdef CONFIG_LPC17_UART2 -# define TTYS3_DEV g_uart2port /* UART3=ttyS0;UART0=ttyS1;UART1=ttyS2;UART2=ttyS3 */ -# else -# undef TTYS3_DEV /* UART3=ttyS0;UART0=ttyS1;UART1=ttyS;No ttyS3 */ -# endif -# else -# ifdef CONFIG_LPC17_UART2 -# define TTYS2_DEV g_uart2port /* UART3=ttyS0;UART0=ttyS1;UART2=ttys2;No ttyS3 */ +# define TTYS1_DEV g_uart3port /* UART0=ttyS0;UART3=ttyS1;No ttyS2;No ttyS3 */ # else -# undef TTYS2_DEV /* UART3=ttyS0;UART0=ttyS1;No ttyS2;No ttyS3 */ +# undef TTYS1_DEV /* UART0=ttyS0;No ttyS1;No ttyS2;No ttyS3 */ # endif -# undef TTYS3_DEV /* No ttyS3 */ -# endif -# else -# ifdef CONFIG_LPC17_UART1 -# define TTYS1_DEV g_uart1port /* UART3=ttyS0;UART1=ttyS1 */ -# ifdef CONFIG_LPC17_UART2 -# define TTYS2_DEV g_uart2port /* UART3=ttyS0;UART1=ttyS1;UART2=ttyS2;No ttyS3 */ -# else -# undef TTYS2_DEV /* UART3=ttyS0;UART1=ttyS1;No ttyS2;No ttyS3 */ -# endif -# undef TTYS3_DEV /* No ttyS3 */ -# else -# ifdef CONFIG_LPC17_UART2 -# define TTYS1_DEV g_uart2port /* UART3=ttyS0;UART2=ttyS1;No ttyS3;No ttyS3 */ -# undef TTYS3_DEV /* UART3=ttyS0;UART2=ttyS1;No ttyS2;No ttyS3 */ -# else -# undef TTYS1_DEV /* UART3=ttyS0;No ttyS1;No ttyS2;No ttyS3 */ -# endif -# undef TTYS2_DEV /* No ttyS2 */ -# undef TTYS3_DEV /* No ttyS3 */ +# undef TTYS2_DEV /* No ttyS2 */ +# undef TTYS3_DEV /* No ttyS3 */ # endif # endif -#endif +#endif /*HAVE_CONSOLE*/ /************************************************************************************ * Inline Functions @@ -1354,10 +1394,11 @@ void up_serialinit(void) int up_putc(int ch) { +#ifdef HAVE_CONSOLE struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv; uint32_t ier; - up_disableuartint(priv, &ier); +#endif /* Check for LF */ @@ -1369,7 +1410,10 @@ int up_putc(int ch) } up_lowputc(ch); +#ifdef HAVE_CONSOLE up_restoreuartint(priv, ier); +#endif + return ch; } diff --git a/nuttx/configs/nucleus2g/include/board.h b/nuttx/configs/nucleus2g/include/board.h index 138f38e68..ea1ccef5d 100755 --- a/nuttx/configs/nucleus2g/include/board.h +++ b/nuttx/configs/nucleus2g/include/board.h @@ -198,6 +198,13 @@ enum lpc17_ledstate_e }; #endif +enum output_state +{ + RELAY_OPEN = 0, + RELAY_CLOSED = 1, + RELAY_TOGGLE = 2, +}; + /************************************************************************************ * Public Data ************************************************************************************/ @@ -218,7 +225,7 @@ extern "C" { * * Description: * All LPC17xx architectures must provide the following entry point. This entry point - * is called early in the intitialization -- after all memory has been configured + * is called early in the initialization -- after all memory has been configured * and mapped but before any devices have been initialized. * ************************************************************************************/ @@ -238,6 +245,22 @@ EXTERN void lpc17_led1(enum lpc17_ledstate_e state); EXTERN void lpc17_led2(enum lpc17_ledstate_e state); #endif +/************************************************************************************ + * Name: nucleus_bms_relay 1-4 + * + * Description: + * once booted these functions control the 4 isolated FET outputs from the + * master BMS controller + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_BOARD_NUCLEUS2G_BMS +EXTERN void nucleus_bms_relay1(enum output_state state); +EXTERN void nucleus_bms_relay2(enum output_state state); +EXTERN void nucleus_bms_relay3(enum output_state state); +EXTERN void nucleus_bms_relay4(enum output_state state); +#endif + #undef EXTERN #if defined(__cplusplus) } diff --git a/nuttx/configs/nucleus2g/src/Makefile b/nuttx/configs/nucleus2g/src/Makefile index 7aca7b05e..998916f68 100755 --- a/nuttx/configs/nucleus2g/src/Makefile +++ b/nuttx/configs/nucleus2g/src/Makefile @@ -1,7 +1,7 @@ ############################################################################ # configs/nucleus2g/src/Makefile # -# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Copyright (C) 2010-2011 Gregory Nutt. All rights reserved. # Author: Gregory Nutt <spudmonkey@racsa.co.cr> # # Redistribution and use in source and binary forms, with or without diff --git a/nuttx/configs/nucleus2g/src/nucleus2g_internal.h b/nuttx/configs/nucleus2g/src/nucleus2g_internal.h index fe9551c33..172fbaaf6 100755 --- a/nuttx/configs/nucleus2g/src/nucleus2g_internal.h +++ b/nuttx/configs/nucleus2g/src/nucleus2g_internal.h @@ -1,149 +1,156 @@ -/************************************************************************************
- * configs/nucleus2g/src/nucleus2g_internal.h
- * arch/arm/src/board/nucleus2g_internal.n
- *
- * Copyright (C) 2010 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ************************************************************************************/
-
-#ifndef _CONFIGS_NUCLEUS2G_SRC_NUCLEUS2G_INTERNAL_H
-#define _CONFIGS_NUCLEUS2G_SRC_NUCLEUS2G_INTERNAL_H
-
-/************************************************************************************
- * Included Files
- ************************************************************************************/
-
-#include <nuttx/config.h>
-#include <nuttx/compiler.h>
-
-/************************************************************************************
- * Definitions
- ************************************************************************************/
-
-/* NUCLEUS-2G GPIO Pin Definitions **************************************************/
-/* Board GPIO Usage:
- *
- * P0[0]/RD1/TXD3/SDA1 P0[0]/CAN_RX1
- * P0[1]/TD1/RXD3/SCL P0[1]/CAN_TX1
- * P0[2]/TXD0/AD0[7] TX0
- * P0[3]/RXD0/AD0[6] RX0
- * P0[4] P0[4]/CAN1_STB
- * P0[5] P0[5]/CAN2_STB
- * P0[6]/I2SRX_SDA/SSEL1/MAT2[0] GPI/O_CS1
- * P0[7]/I2STX_CLK/SCK1/MAT2[1] SCLK1
- * P0[8]/I2STX_WS/MISO1/MAT2[2] MISO1
- * P0[9]/I2STX_SDA/MOSI1/MAT2[3] MOSI1
- * P0[10] P0[10]/CAN1_TERM
- * P0[11] P0[11]/CAN2_TERM
- * P0[15]/TXD1/SCK0/SCK MMC_CLK
- * P0[16]/RXD1/SSEL0/SSEL MMC_CD
- * P0[17]/CTS1/MISO0/MISO MMC_DATA0
- * P0[18]/DCD1/MOSI0/MOSI MMC_MISO
- * P0[19]/DSR1/SDA1 GPI/O_CS2
- * P0[20]/DTR1/SCL1 GPI/O_CS3
- * P0[21]/RI1/MCIPWR/RD1 P0[21]
- * P0[22]/RTS1/TD1 P0[22]
- * P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] AD0
- * P0[24]/AD0[1]/I2SRX_WS/CAP3[1] AD1
- * P0[25]/AD0[2]/I2SRX_SDA/TXD3 AD2
- * P0[26]/AD0[3]/AOUT/RXD3 AD3
- * P0[27]/SDA0/USB_SDA SDA
- * P0[28]/SCL0 SCL
- * P0[29]/USB_D+ USB+
- * P0[30]/USB_D- USB-
- *
- * P1[0] - P1[17] Not connected
- * P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] USB_LINK
- * P1[19]-P[29] P[19]-P[29]
- * P1[30]/VBUS/AD0[4] USB_+5
- * P1[31]/SCK1/AD0[5] AD5
- *
- * P2[0] P2[0]/LED1_A
- * P2[1] P2[1]/LED1_B
- * P2[2] P2[2]/LED2_A
- * P2[3] P2[3]/LED2_B
- * P2[4] P2[4]
- * P2[5]/PWM1[6]/DTR1/TRACEDATA[0] 232_POWERAVE
- * P2[6]/PCAP1[0]/RI1/TRACECLK 232_VALID
- * P2[7]/RD2/RTS1 P2[7]/CAN_RX2
- * P2[8]/TD2/TXD2 P2[8]/CAN_TX2
- * P2[9]/USB_CONNECT/RXD2 USB_CONNECT
- * P2[10]/EINT0/NMI BOOTLOADER
- * P2[11]/EINT1/I2STX_CLK HEARTBEAT
- * P2[12]/EINT2/I2STX_WS EXTRA_LED
- * P2[13]/EINT3/I2STX_SDA 5V_ENABLE
- *
- * P3[25]-P3[26] Not connected
- *
- * P4[28]-P4[29] P4[28]-P4[29]
- */
-
-#define NUCLEUS2G_LED1_A (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN0)
-#define NUCLEUS2G_LED1_B (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN1)
-#define NUCLEUS2G_LED2_A (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN2)
-#define NUCLEUS2G_LED2_B (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN3)
-#define NUCLEUS2G_232_ENABLE (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN5)
-#define NUCLEUS2G_232_POWERSAVE (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN5)
-#define NUCLEUS2G_232_VALID (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN5)
-#define NUCLEUS2G_HEARTBEAT (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN11)
-#define NUCLEUS2G_EXTRA_LED (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN12)
-#define NUCLEUS2G_5V_ENABLE (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN13)
-#define NUCLEUS2G_5V_DISABLE (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN13)
-
-#define NUCLEUS2G_MMCSD_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN16)
-
-/************************************************************************************
- * Public Types
- ************************************************************************************/
-
-/************************************************************************************
- * Public data
- ************************************************************************************/
-
-#ifndef __ASSEMBLY__
-
-/************************************************************************************
- * Public Functions
- ************************************************************************************/
-
-/************************************************************************************
- * Name: lpc17_sspinitialize
- *
- * Description:
- * Called to configure SPI chip select GPIO pins for the NUCLEUS-2G board.
- *
- ************************************************************************************/
-
-extern void weak_function lpc17_sspinitialize(void);
-
-#endif /* __ASSEMBLY__ */
-#endif /* _CONFIGS_NUCLEUS2G_SRC_NUCLEUS2G_INTERNAL_H */
-
+/************************************************************************************ + * configs/nucleus2g/src/nucleus2g_internal.h + * arch/arm/src/board/nucleus2g_internal.n + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef _CONFIGS_NUCLEUS2G_SRC_NUCLEUS2G_INTERNAL_H +#define _CONFIGS_NUCLEUS2G_SRC_NUCLEUS2G_INTERNAL_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include <nuttx/config.h> +#include <nuttx/compiler.h> + +/************************************************************************************ + * Definitions + ************************************************************************************/ + +/* NUCLEUS-2G GPIO Pin Definitions **************************************************/ +/* Board GPIO Usage: + * + * P0[0]/RD1/TXD3/SDA1 P0[0]/CAN_RX1 + * P0[1]/TD1/RXD3/SCL P0[1]/CAN_TX1 + * P0[2]/TXD0/AD0[7] TX0 + * P0[3]/RXD0/AD0[6] RX0 + * P0[4] P0[4]/CAN1_STB + * P0[5] P0[5]/CAN2_STB + * P0[6]/I2SRX_SDA/SSEL1/MAT2[0] GPI/O_CS1 + * P0[7]/I2STX_CLK/SCK1/MAT2[1] SCLK1 + * P0[8]/I2STX_WS/MISO1/MAT2[2] MISO1 + * P0[9]/I2STX_SDA/MOSI1/MAT2[3] MOSI1 + * P0[10] P0[10]/CAN1_TERM + * P0[11] P0[11]/CAN2_TERM + * P0[15]/TXD1/SCK0/SCK MMC_CLK + * P0[16]/RXD1/SSEL0/SSEL MMC_CD + * P0[17]/CTS1/MISO0/MISO MMC_DATA0 + * P0[18]/DCD1/MOSI0/MOSI MMC_MISO + * P0[19]/DSR1/SDA1 GPI/O_CS2 + * P0[20]/DTR1/SCL1 GPI/O_CS3 + * P0[21]/RI1/MCIPWR/RD1 P0[21] + * P0[22]/RTS1/TD1 P0[22] + * P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] AD0 + * P0[24]/AD0[1]/I2SRX_WS/CAP3[1] AD1 + * P0[25]/AD0[2]/I2SRX_SDA/TXD3 AD2 + * P0[26]/AD0[3]/AOUT/RXD3 AD3 + * P0[27]/SDA0/USB_SDA SDA + * P0[28]/SCL0 SCL + * P0[29]/USB_D+ USB+ + * P0[30]/USB_D- USB- + * + * P1[0] - P1[17] Not connected + * P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] USB_LINK + * P1[19]-P[29] P[19]-P[29] + * P1[30]/VBUS/AD0[4] USB_+5 + * P1[31]/SCK1/AD0[5] AD5 + * + * P2[0] P2[0]/LED1_A + * P2[1] P2[1]/LED1_B + * P2[2] P2[2]/LED2_A + * P2[3] P2[3]/LED2_B + * P2[4] P2[4] + * P2[5]/PWM1[6]/DTR1/TRACEDATA[0] 232_POWERAVE + * P2[6]/PCAP1[0]/RI1/TRACECLK 232_VALID + * P2[7]/RD2/RTS1 P2[7]/CAN_RX2 + * P2[8]/TD2/TXD2 P2[8]/CAN_TX2 + * P2[9]/USB_CONNECT/RXD2 USB_CONNECT + * P2[10]/EINT0/NMI BOOTLOADER + * P2[11]/EINT1/I2STX_CLK HEARTBEAT + * P2[12]/EINT2/I2STX_WS EXTRA_LED + * P2[13]/EINT3/I2STX_SDA 5V_ENABLE + * + * P3[25]-P3[26] Not connected + * + * P4[28]-P4[29] P4[28]-P4[29] + */ + +#define NUCLEUS2G_LED1_A (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN0) +#define NUCLEUS2G_LED1_B (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN1) +#define NUCLEUS2G_LED2_A (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN2) +#define NUCLEUS2G_LED2_B (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN3) +#define NUCLEUS2G_232_ENABLE (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN5) +#define NUCLEUS2G_232_POWERSAVE (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN5) +#define NUCLEUS2G_232_VALID (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN5) +#define NUCLEUS2G_HEARTBEAT (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN11) +#define NUCLEUS2G_EXTRA_LED (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN12) +#define NUCLEUS2G_5V_ENABLE (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN13) +#define NUCLEUS2G_5V_DISABLE (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN13) + +#define NUCLEUS2G_MMCSD_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN16) + +#define NUCLEUS_BMS_RELAY1 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN20) +#define NUCLEUS_BMS_RELAY2 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN21) +#define NUCLEUS_BMS_RELAY3 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN22) +#define NUCLEUS_BMS_RELAY4 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN23) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc17_sspinitialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the NUCLEUS-2G board. + * + ************************************************************************************/ + +extern void weak_function lpc17_sspinitialize(void); + +extern void up_relayinit(void); + +#endif /* __ASSEMBLY__ */ +#endif /* _CONFIGS_NUCLEUS2G_SRC_NUCLEUS2G_INTERNAL_H */ + diff --git a/nuttx/configs/nucleus2g/src/up_boot.c b/nuttx/configs/nucleus2g/src/up_boot.c index a1e60401b..27e181225 100755 --- a/nuttx/configs/nucleus2g/src/up_boot.c +++ b/nuttx/configs/nucleus2g/src/up_boot.c @@ -1,109 +1,115 @@ -/************************************************************************************
- * configs/nucleus2g/src/up_boot.c
- * arch/arm/src/board/up_boot.c
- *
- * Copyright (C) 2010 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ************************************************************************************/
-
-/************************************************************************************
- * Included Files
- ************************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <debug.h>
-
-#include <arch/board/board.h>
-
-#include "up_arch.h"
-#include "up_internal.h"
-
-#include "lpc17_internal.h"
-#include "nucleus2g_internal.h"
-
-/************************************************************************************
- * Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
-/************************************************************************************
- * Public Functions
- ************************************************************************************/
-
-/************************************************************************************
- * Name: lpc17_boardinitialize
- *
- * Description:
- * All LPC17xx architectures must provide the following entry point. This entry point
- * is called early in the intitialization -- after all memory has been configured
- * and mapped but before any devices have been initialized.
- *
- ************************************************************************************/
-
-void lpc17_boardinitialize(void)
-{
- /* Enable +5V needed for CAN */
-
-#if defined(CONFIG_LPC17_CAN1) || defined(CONFIG_LPC17_CAN2)
- lpc17_configgpio(NUCLEUS2G_5V_ENABLE);
-#else
- lpc17_configgpio(NUCLEUS2G_5V_DISABLE);
-#endif
-
- /* If UART0 is used, enabled the MAX232 driver */
-
-#ifdef CONFIG_LPC17_UART0
- lpc17_configgpio(NUCLEUS2G_232_ENABLE);
-#else
- lpc17_configgpio(NUCLEUS2G_232_POWERSAVE);
-#endif
-
- /* Configure SSP chip selects if 1) at least one SSP is enabled, and 2) the weak
- * function lpc17_sspinitialize() has been brought into the link.
- */
-
-#if defined(CONFIG_LPC17_SSP0) || defined(CONFIG_LPC17_SSP1)
- if (lpc17_sspinitialize)
- {
- lpc17_sspinitialize();
- }
-#endif
-
- /* Configure on-board LEDs if LED support has been selected. */
-
-#ifdef CONFIG_ARCH_LEDS
- up_ledinit();
-#endif
-}
+/************************************************************************************ + * configs/nucleus2g/src/up_boot.c + * arch/arm/src/board/up_boot.c + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include <nuttx/config.h> + +#include <debug.h> + +#include <arch/board/board.h> + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_internal.h" +#include "nucleus2g_internal.h" + +/************************************************************************************ + * Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc17_boardinitialize + * + * Description: + * All LPC17xx architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc17_boardinitialize(void) +{ + /* Enable +5V needed for CAN */ + +#if defined(CONFIG_LPC17_CAN1) || defined(CONFIG_LPC17_CAN2) + lpc17_configgpio(NUCLEUS2G_5V_ENABLE); +#else + lpc17_configgpio(NUCLEUS2G_5V_DISABLE); +#endif + + /* If UART0 is used, enabled the MAX232 driver */ + +#ifdef CONFIG_LPC17_UART0 + lpc17_configgpio(NUCLEUS2G_232_ENABLE); +#else + lpc17_configgpio(NUCLEUS2G_232_POWERSAVE); +#endif + + /* Configure SSP chip selects if 1) at least one SSP is enabled, and 2) the weak + * function lpc17_sspinitialize() has been brought into the link. + */ + +#if defined(CONFIG_LPC17_SSP0) || defined(CONFIG_LPC17_SSP1) + if (lpc17_sspinitialize) + { + lpc17_sspinitialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + up_ledinit(); +#endif + + /* Configure the relay outptus for use on the BMS master board */ + +#ifdef CONFIG_ARCH_BOARD_NUCLEUS2G_BMS + up_relayinit(); +#endif +} diff --git a/nuttx/configs/nucleus2g/tools/olimex.cfg b/nuttx/configs/nucleus2g/tools/olimex.cfg index 6b98458e6..8183ffd92 100755 --- a/nuttx/configs/nucleus2g/tools/olimex.cfg +++ b/nuttx/configs/nucleus2g/tools/olimex.cfg @@ -59,3 +59,4 @@ flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME lpc1700 80000 calc_c # 4MHz / 6 = 666kHz, so use 500 jtag_khz 100 + diff --git a/nuttx/configs/nucleus2g/tools/oocd.sh b/nuttx/configs/nucleus2g/tools/oocd.sh index 7a105c78d..23bc96703 100755 --- a/nuttx/configs/nucleus2g/tools/oocd.sh +++ b/nuttx/configs/nucleus2g/tools/oocd.sh @@ -1,16 +1,23 @@ #!/bin/sh TOPDIR=$1 +CFGFILE=$2 USAGE="$0 <TOPDIR> [-d]" + if [ -z "${TOPDIR}" ]; then echo "Missing argument" echo $USAGE exit 1 fi +if [ -z "${CFGFILE}" ]; then + echo "Using olimex.cfg" + CFGFILE=olimex.cfg +fi + OPENOCD_PATH="/cygdrive/c/OpenOCD/openocd-0.4.0/src" OPENOCD_EXE=openocd.exe -OPENOCD_CFG="${TOPDIR}/configs/nucleus2g/tools/olimex.cfg" +OPENOCD_CFG="${TOPDIR}/configs/nucleus2g/tools/${CFGFILE}" OPENOCD_ARGS="-f `cygpath -w ${OPENOCD_CFG}`" if [ "X$2" = "X-d" ]; then diff --git a/nuttx/configs/nucleus2g/tools/scarab.cfg b/nuttx/configs/nucleus2g/tools/scarab.cfg new file mode 100755 index 000000000..a94c6071a --- /dev/null +++ b/nuttx/configs/nucleus2g/tools/scarab.cfg @@ -0,0 +1,63 @@ +#daemon configuration +telnet_port 4444 +gdb_port 3333 + +#interface +interface ft2232 +ft2232_device_desc "usbScarab A" +ft2232_layout "olimex-jtag" +ft2232_vid_pid 0x0403 0xbbe0 + +# NXP LPC1768 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, clocked with 4MHz internal RC oscillator + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME lpc1768 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x4ba00477 +} + +#delays on reset lines +jtag_nsrst_delay 200 +jtag_ntrst_delay 200 + +# LPC2000 & LPC1700 -> SRST causes TRST +reset_config trst_and_srst srst_pulls_trst + +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME + +# LPC1768 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM) +$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size 0x8000 -work-area-backup 0 + +# REVISIT is there any good reason to have this reset-init event handler?? +# Normally they should set up (board-specific) clocking then probe the flash... +$_TARGETNAME configure -event reset-init { + # Force NVIC.VTOR to point to flash at 0 ... + # WHY? This is it's reset value; we run right after reset!! + mwb 0xE000ED08 0x00 +} + +# LPC1768 has 512kB of user-available FLASH (bootloader is located in separate dedicated region). +# flash bank lpc1700 <base> <size> 0 0 <target#> <variant> <cclk> [calc_checksum] + +set _FLASHNAME $_CHIPNAME.flash +flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME lpc1700 80000 calc_checksum + +# 4MHz / 6 = 666kHz, so use 500 +jtag_khz 100 +#jtag_rclk 1000 + |