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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-12-16 13:32:46 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-12-16 13:32:46 +0000 |
commit | b081b723a309bbe18fbbb0f25dbf86c33c2df891 (patch) | |
tree | 58c5563354e4e2e482972b5d11c6e974efffaa93 | |
parent | df5aca04bdf127475b90bf6fdc246f402f039649 (diff) | |
download | nuttx-b081b723a309bbe18fbbb0f25dbf86c33c2df891.tar.gz nuttx-b081b723a309bbe18fbbb0f25dbf86c33c2df891.tar.bz2 nuttx-b081b723a309bbe18fbbb0f25dbf86c33c2df891.zip |
Update how ADC channel number is obtained
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4190 42af7a65-404d-4744-a932-0658087f49c3
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_adc.c | 48 |
1 files changed, 28 insertions, 20 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_adc.c b/nuttx/arch/arm/src/stm32/stm32_adc.c index 5903158db..a3ccf15d9 100644 --- a/nuttx/arch/arm/src/stm32/stm32_adc.c +++ b/nuttx/arch/arm/src/stm32/stm32_adc.c @@ -112,6 +112,7 @@ struct stm32_dev_s uint8_t irq; /* Interrupt generated by this ADC block */ uint8_t nchannels; /* Number of channels */ uint8_t intf; /* ADC interface number */ + uint8_t current; /* Current ADC channel being converted */ xcpt_t isr; /* Interrupt handler for this ADC block */ uint32_t base; /* Base address of registers unique to this ADC block */ @@ -355,8 +356,8 @@ static void adc_rccreset(struct stm32_dev_s *priv, bool reset) * * Input Parameters: * - * enable - true: enable ADC convertion - * false: disable ADC convertion + * enable - true: enable ADC conversion + * false: disable ADC conversion * * Returned Value: * @@ -532,6 +533,10 @@ static void adc_reset(FAR struct adc_dev_s *dev) regval |= ((uint32_t)priv->nchannels << ADC_SQR1_L_SHIFT); adc_putreg(priv, STM32_ADC_SQR1_OFFSET, regval); + + /* Set the channel index of the first conversion */ + + priv->current = 0; irqrestore(flags); avdbg("CR1: 0x%08x CR2: 0x%08x\n", @@ -676,7 +681,6 @@ static int adc_interrupt(FAR struct adc_dev_s *dev) uint32_t adcsr; int32_t value; uint8_t ch; - int i; avdbg("intf: %d\n", priv->intf); @@ -692,26 +696,30 @@ static int adc_interrupt(FAR struct adc_dev_s *dev) if ((adcsr & ADC_SR_EOC) != 0) { - /* Call adc_receive for each channel that completed */ + /* Read the converted value */ -# warning "Does the DR register need to be read numerous times? Once for each channel?" -# warning "I don't know how this is supposed to work, but I will add some guesses here -- please fix" + value = adc_getreg(priv, STM32_ADC_DR_OFFSET); + value &= ADC_DR_DATA_MASK; + + /* Give the ADC data to the ADC dirver. adc_receive accepts 3 parameters: + * + * 1) The first is the ADC device instance for this ADC block. + * 2) The second is the channel number for the data, and + * 3) The third is the converted data for the channel. + */ - for (i = 0; i < priv->nchannels; i++) - { - /* Read the converted value */ + adc_receive(dev, priv->current, value); - value = adc_getreg(priv, STM32_ADC_DR_OFFSET); - value &= ADC_DR_DATA_MASK; - - /* Give the ADC data to the ADC dirver. adc_receive accepts 3 parameters: - * - * 1) The first is the ADC device instance for this ADC block. - * 2) The second is the channel number for the data, and - * 3) The third is the converted data for the channel. - */ - - adc_receive(dev, i, value); + /* Set the channel number of the next channel that will complete conversion */ + + if (++priv->current >= priv->nchannels) + { + /* Restart the conversion sequence from the beginning */ +#warning "Is there anything that you have to do to restart the conversion sequence?" + + /* Reset the index to the first channel to be converted */ + + priv->current = 0; } } |